Ch 12 Digital logic

Key components of an FPGA

1. Logic Block- configurable logic block where computation takes place. 2. I/O Block- connect I/O pins to circuitry on the chip 3. Interconnect- signal paths for establishing connections among I/O blocks & logic blocks.

Three ways of defining a combinational circuit

1. Truth table 2. Graphical symbols (symbols of gates) 3. Boolean equations

Values of true or false in Boolean algebra

1= True 0= false

Complement of a set A

A (over bar), equivalent to NOT

Field Programmable Gate Array (FPGA)

A PLD featuring a general structure that allows for a high logic capacity. FPGAs offer more narrow logic resources than CPLDs. There is also a higher ration of flip-flops to logic resources.

Why is Boolean algebra convenient?

Analysis: economical way of describing function Design: Boolean algebra can be used to implement a function

extending operations to more than two variables

Any operation except NOT can be extended to more than two variables.

OR gate

Blunt arrow shape

NOR gate

Blunt arrow with dot

XOR gate

Blunt arrow with vertical line

Excitation table

a table that provides the value of the next output when the inputs and the present output are known

Shift register

accepts and/or transfers information serially. With each clock pulse, data are shifted right one position. Shift registers are usually used to interface with I/O.

Synchronous counter

all of the flip-flops change state at the same time and is much faster.

Tabular Technique aka Quine-McCluskey method

an alternative to the karnough map that is useful for cases with many variables. A computer program can be written to do it automatically.

Combinational Circuit

an interconnected set of gates whose output at any time is a function of only the input at that time.

Functionally complete set of gates

any Boolean function can be implemented using only the gates in the set. NAND and NOR gates are each functionally complete sets by themselves.

postulates

basic rules, which are stated without proof. This includes the distributive, commutative, identity and inverse properties.

Multiplexer

connects multiple inputs to a single output. At any time, one of the inputs is selected to be passed to the output.

Parallel registers

consists of a set of 1-bit memories that can be read or written simultaneously. It is used to store data, and are the registers usually referenced in the book.

Claude Shannon

created techniques that were used in the analysis and design of digital circuits.

Other identities

derived from postulates. This includes DeMorgan's theorem

Carry look-ahead

determines carry values without having to ripple through all the previous stages. This allows each single-bit adder to function independently. It is usually done 4 to 8 bits at a time

Canonical form

each term in the expression must contain each variable. The expression must be in canonical form to make a karnough map.

Loading of a program counter is an ____

example of where a multiplexer is used. The PC's data could come from: - Binary counter (next instruction) - Instruction register - Output of ALU

J-K flip-flop

like S-R flip flop, it has two inputs. However, all possible combinations of values are valid.

Truth table

lists the value of an operation for every possible combination of values of operands.

D Flip-Flop

only allows a single input, avoiding issues with the condition where both R and S=1. the output of the D flip-flop is always equal to the most recent value passed in. Sometimes referred to as the "data" or "delay" flip-flop.

Clocked S-R Flip Flop

only passes the R and S inputs to the NOR gates during the clock pulse.

demultiplexer

performs the opposite function as a multiplexor. It connects on input to one of several outputs. With an additional input line, a decoder can be used as a demultiplexor.

Sequential circuit

provides memory or static information for the computer. The current output of a sequential circuit depends not only on the current input, but also on the past history of inputs (current state)

Characteristic table

similar to a truth table. It shows the next state or states of a sequential circuit as a function of the current states and inputs.

ripple counter/ asynchronous counter

the change that occurs to increment the counter starts at one end and "ripples" to the other end.

NAND operation

the complement of the AND operation

NOR operation

the complement of the OR operation

Boolean Algebra

the digital circuitry in computers and other digital systems is designed, and its behavior is organized, with the use of the mathematical discipline known as Boolean algebra.

Gate

the fundamental building block of all digital logic circuits. It produces an output signal that is a simple Boolean operation of its input signals.

Gate delay

the propagation time of signals through a gate

flip-flop

the simplest form of sequential circuits. It can exist in one of two states (bistable) and has two outputs that are complements.

assert a signal

to cause a signal line to transition from a logically false (0) state to its logically true (1) state.

Implicit AND

two variables next to each other represent AND (just like multiplication)

Algebraic Simplification

uses identities to reduce the Boolean expression to one with fewer elements.

More than two inputs for a gate

yup it's a thing

intersection of two sets A and B

∩ same function as the Boolean operator AND

Sum-of-Products (SOP)

Groups of AND statements are jointed by ORs. Expresses that the output is one if any of the input combinations are true.

Product of sums (POS) form

Groups of OR statements are joined by ANDs.

Programmable Logic Device (PLD) aka Field Programmable device (FPD)

A general term that refers to any type of integrated circuit used for implementing digital hardware, where the chip can be configured by the end user to realize different designs.

Complex PLD (CPLD)

A more complex PLD that consists of a arrangement of multiple SPLD- like blocks on a single chip

Programmable logic array (PLA)

A relatively small PLD that contains two levels of logic, an AND-plane and and OR-plane, where both levels are programmable

Programmable Array Logic (PAL)

A relatively small PLD that has a programmable AND-plane followed by a fixed OR-plane

AND, OR, and NOT symbols for Boolean algebra

AND is a dot OR is a plus NOT is an overbar

Order of operations for AND and OR

AND takes precedent over OR (think like multiplication over division)

Adjacent squares on karnough map

Adjacent squares only vary in one variable being negated. Thus, this variable can be removed from the overall expression. This can also be extended around the edges.

Field programmable logic array (FPLA)

Every possible connection is made through a fuse at every intersection point. The undesired connections can then be removed by blowing the fuses.

ROM as a combinational circuit

ROM is implemented as a combinational circuit because given the same input (address), the same data will always be put on the data lines.

AND gate

Square and semicircle shape

NAND gate

Square and semicircle shape with dot

Exclusive OR (XOR)

The XOR of two logical operands is 1 (true) if and only if exactly one of the operands has a value of 1 (true).

NOT gate

Triangle with dot

union of two sets A and B

U the set of all elements that belong to A, B, or both. It is the equivalent to OR

Binary Coded Decimal (BCD)

a binary number format in which each number is represented as a four-digit binary code Ex: 0000=0, 1001=9

Set

a collection of elements together with a rule Ex: {1,2,3,4,10}

Decoder

a combinational circuit with a number of output lines, one of which is asserted at any time. Which output line is asserted depends on the pattern of input lines.

S-R flip flop aka S-R latch

a common configuration with two inputs: S (set) and R (reset) and two outputs, Q and Q(overbar). The output Q is the value of the bit

karnough map

a convenient way of representing a Boolean function of a small number (up to four) variables. the map is an array of 2^n squares.

Lookup table

a memory consisting of 16 1-bit elements so that 4 input lines are required to select one of the 16 bits (2^4=16)

Counter (a sequential circuit)

a register whose value is easily incremented by 1 modulo the capacity of the register. An example would be the CPU counter

Logic Block

a relatively small circuit block that is replicated in an array in an FPD. When a circuit is implemented in an FPD, it is first decomposed into smaller subcircuits that can each be mapped into a logic block. Logic block can also refer to circuitry in a CPLD.

Adder

a set of adders are put together to carry out binary addition. Each adder takes in a value from each operand and a carry value and results in a new carry value and a sum.