Chapter 3 - Logic Gates

If a 3-input AND gate has eight input possibilities, how many of those possibilities will result in a HIGH output?

1

If a 3-input NOR gate has eight input possibilities, how many of those possibilities will result in a HIGH output?

1

The number of input combinations for a 4-input gate is

16

TTL operates from a

5-volt supply

If a 3-input OR gate has eight input possibilities, how many of those possibilities will result in a HIGH output?

7

The number of input combinations for a 3-input gate is

8

The output of an OR gate with three inputs, A, B, and C, is LOW when

A = 0, B = 0, C = 0

The output of an AND gate with three inputs, A, B, and C, is HIGH when

A = 1, B = 1, C = 1

If A is LOW or B is LOW or BOTH are LOW, then X is LOW. If A is HIGH and B is HIGH, then X is HIGH. These rules specify the operation of a(n)

AND Gate

The basic types of programmable arrays are made up of

AND gates and OR gates

CMOS IC packages are available in

DIP and SOIC configurations

As a rule, CMOS has the lowest power consumption of all

IC families.

With regard to an AND gate, which statement is true?

If one input to a 2-input AND gate is HIGH, the output reflects the other input.

When the inputs to a 3-input NOR gate are 110, the output is

LOW

When does the output of a NAND gate = 0?

Only when all inputs = 1

When does the output of a NOR gate = 0?

Whenever a 1 is present at an input

The Boolean expression for a 3-input OR gate is

X = A + B + C

The Boolean expression for a 3-input AND gate is

X = ABC

A 2-input gate that can be used to pass a digital waveform unchanged at certain times and inverted at other times is a(n)

XOR Gate

The output of a NAND gate is LOW if

all inputs are HIGH

The output of a NOR gate is HIGH if

all inputs are LOW

A NAND gate output is LOW only if

all the inputs are HIGH.

The switching speed of CMOS is now

competitive with TTL

A major advantage of ECL logic over TTL and CMOS is

high speed

An inverter input

is the complement of its input

A CMOS IC operating from a 3-volt supply will consume

less power than a TTL IC

A 2-input NOR gate is equivalent to a

negative-AND gate

One advantage TTL has over CMOS is that TTL is

not sensitive to electrostatic discharge

The terms "low speed" and "high speed," applied to logic circuits, refer to the

propagation delay time

An OR array is programmed by blowing fuses to eliminate

selected variables from the output functions.

The output of a NOT gate is HIGH when

the input is LOW

The output of an exclusive-NOR gate is HIGH if

the inputs are equal

The output of an exclusive-OR gate is HIGH if

the inputs are unequal

An exclusive-OR gate output is HIGH when

the inputs are unequal.

When does the output of a NAND gate = 1?

the two inputs are unequal

Fan-out is specified in terms of

unit loads