Computer organization and design

SISD Computers

A single processor computer generates a single stream of instructions which acts upon single data stream and is called von Newmann computer.

Computer Organization

Encompasses all physical aspects of computer systems.E.g circuit design,memory type

The most common example of this is

a transaction processing application. In an environment where multiple users are making independent inquiries to a database running on multiprocessor system, each transaction can be executed on a separate processor.

There are various possible interconnection configurations in loosely-coupled MIMD computers:

a) nearest neighbour mesh; b) nodes with six links; c) nodes with eight links; d) exhaustive; e) cubic; f) tree.

RAM

an acronym for random access memory, a type of computer memory that can be accessed randomly; that is, any byte of memory can be accessed without touching the preceding bytes. •random access memory means that memory contents can be accessed directly if u know its location

Bus Arbitration

an elaborate system for resolving bus control conflicts and assigning priorities to the requests for control of the bus.

A conventional computer has a

single pass between a memory unit and control unit of processor. This often referred to von Newmann bottle neck. It caries out instructions sequentially and hence, inherently slow.

Pentium 4.20GHZ

the microprocessor is the brain of system Pentium (intel) running at 4.20(billion)Hz

The fundamental way to extract more computation per cycle from a given technology is to introduce(__A___) into design, and there are only a few ways to do so:

(A)parallelism 1) build multiprocessor computers, machines that achieve parallelism by using many separate processors; 2) build processor arrays, computers that achieve parallelism by using many processing units

Conventional computer has the following structure:

- ALU - Arithmetic Logic Unit perform arithmetic and logic operations; - Control unit - controls computer operations; - Register set - hold operands and results; - PC (Program Counter) hold an address of instruction to be executed.

There are eight different types of computational models:

- COSH; - DASH; - DESH; - PASH; - COME; - DAME; - DENE; - PAME.

Benefits of MIMD computers are the following:

- High performance; MIMD computers use multiprocessors with one or more main memory units to execute several streams of instructions. In contrast single processor system can execute only one stream of instructions, so, MIMD computers can execute more processes in a given period of time. -- flexibility; Multiprocessing offers a way to increase computer resources as applications needs grow. - An existing applications written for single processor systems can run unaltered on tightly-coupled multiprocessor;

User benefits of multiprocessing

- Overall throughput is improved by executing two or more processes at the same time. Two or more processes run on separate processors much more faster than on single processor.

The classification of systems uses as its basic two mechanisms existing in every computer:

- control mechanism; - data mechanism.

Disadvantages of MIMD computers:

- loosely-coupled multiprocessor systems tend to be costly, since entire system are employed rather than single system with multiple processors; - There is also considerable overhead to synchronize data in loosely-coupled MIMD computers; - communication in loosely-coupled MIMD computers is typically slow.

Any COSH computer consists of the following functional units:

- processor(s); - memory unit; - i/o controllers (devices); - interconnection unit.

Classification of Computer Systems First of all two alternative classes of computer can be defined:

- program stored computer; - neural computers.

Level 1: Control Level

-A control unit decodes and executes instructions and moves data through the system. -Control units can be microprogrammed or hardwired. -A microprogram is a program written in a low-level language that is implemented by the hardware. Hardwired control units consist of hardware that directly executes machine instructions

COSH

-It is inherently difficult to express parallelism in a COSH computer, because the control mechanism is based on the concept of single sequence of operations and access to the shared data needs synchronization, as each of parallel computational units is capable of modifying the data. -The COSH model is implemented by conventional computer architecture, such as the Intel processors (Pentium, i3-i7cores, Xeon).

Type of system bus

-Memory Consists of N words of equal length . Each word assigned a unique address. A word of data can be read or written . Operation specified by control signals . Location specified by address signals. -I/O Module Similar to memory from computers viewpoint . Consists of M external device ports. External data paths for input and output . Sends interrupt signal to the processor. -Processor Reads in instructions and data. Writes out data after processing. Uses control signals to control the system. Receives interrupt signals.

The interconnection structure must support the following types of transfers:

-Memory to processor: processor reads an instruction or a unit of data from memory. -Processor to memory: processor writes a unit of data to memory. - I/O to processor: processor reads data from an I/O device via an I/O module. -Processor to I/O: processor sends data to the I/O device via an I/O module. -I/O to or from memory: an I/O module is allowed to exchange data directly with memory, without going through the processor, using direct memory access (DMA).

Level 0: Digital Logic Level

-This level is where we find digital circuits (the chips). -Digital circuits consist of gates and wires. -These components implement the mathematical logic of all other levels.

nanosecond

1 billionth of a second. Main memory access times are often 50 to 70 nanoseconds

There are four different subclasses of COSH computers:

1) conventional; 2) harvard architecture machine; 3) pipeline instruction processing computer; 4) cache computer.

•The International Organization for Standardization (ISO)

1)Establishes worldwide standards for everything from screw threads to photographic film. 2)Is influential in formulating standards for computer hardware and software, including their methods of manufacture. Note: ISO is not an acronym. ISO comes from the Greek, isos, meaning "equal."

Data Transfer Type

1)Read: 2. Write: In the case of a multiplexed address/data bus, the bus is first used for specifying the address and then for transferring the data. -In the case of dedicated address and data buses, data and address sent in same cycle over separate bus lines. 2)Read-modify-write read-modify-write operation is simply a read followed immediately by a write to the same address. The address is only broadcast once at the beginning of the operation. 3)Read-after-write Read-after-write is an indivisible operation consisting of a write followed immediately by a read from the same address. 4)Block data transfer In this case, one address cycle is followed by n data cycles. The first data item is transferred to or from the specified address; the remaining data items are transferred to or from subsequent addresses.

Basic level of computer ,computer consists of 3pieces.

1-A processor to interpret and execute programs 2-A memory to store both data and programs 3-A mechanism for transferring data to and from outside world

BUS - shared communication link

1.A computer transfers data between components. Cannot afford to have separate circuits between every pair of devices. The solution is a

A bus operating at 133MHZ has a cycle time of 7.52 nano seconds

133,000,000 cycle/s = 7.52ns/cycle

32KB L1 cache ,256KB L2 cache

2 levels of cache memory, (L1)level 1 cache is smaller and probably faster than (L2 cache) Note that these cache size are measured in KB Cache is a type of temporary memory that can be accessed faster than ram

Bus Characteristics

A bus is characterised by the amount of information that can be transmitted at once (Bus Speed). The bus speed is defined by: Bus width: he number of physical lines over which data is sent simultaneously. Bus frequency or clock rate (in Hertz): the number of data packets sent or received per second

system bus

A bus that connects major computer components (processor, memory, I/O) is called a(__) -If you look at the bottom of a motherboard you'll see a whole network of lines or electronic pathways that join the different components together. This network of wires or electronic pathways is called the 'Bus'.

Data Bus

A collection of wires through which data is transmitted from one part of a computer to another is called(-) (-) can be thought of as a highway on which data travels within a computer. (-)This bus connects all the computer components to the CPU and main memory. (-)The size (width) of bus determines how much data can be transmitted at one time.

address bus

A collection of wires used to identify particular location in main memory is called (-) Or in other words, the information used to describe the memory locations travels along the (-). -The address goes in one direction, from CPU to components.

the interconnection structure.

A computer consists of a set of components or modules (processor, memory, I/O) that communicate with each other. There must be paths for connecting these modules. These collection of paths

Control-Driven Mechanism

A problem is decomposed into a specific sequence of instructions which are encoded and stored in the memory. A variety of control constructs, such as branches, loops and procedures, are used to build sequence of instructions - program. Using these constructs, instructions determine their successor explicitly. If a computational unit does not choose its successor explicitly, a default successor is chosen by the program counter. The control driven mechanism is used in conventional computers. Computational units are program instructions.

400MHz 256MB DDR SDRAM

A system bus moves data within the computer the faster the bus the better this one runs at 400(million)HZ This system has 256MB of fast synchronous dynamic Ram (SDRAM) System bus can be augmented by dedicated I/O buses pci peripheral component interface is one such bus

Byte

A unit of storage 1KB= 2^10=1024 Byte 1MB=2^20=1,048,576 Byte

Level 4: Assembly Language Level

Acts upon assembly language produced from Level 5, as well as instructions programmed directly at this level.

Level 2: Machine Level

Also known as the Instruction Set Architecture (ISA) Level. Consists of instructions that are particular to the architecture of the machine. Programs written in machine language need no compilers, interpreters, or assemblers.

Neural Networks

Attempt to model human brain to some extent, and do not have a stored sequence of instructions. Traditional architecture are quite good at fast arithmetic and executing deterministic programs. Neural networks are useful in situations were we can't formulate an exact algorithm solution, and were processing is based on an accumulation of previous behavior. Whereas von Neumann computers are based on the processor/memory structure, neural networks are based on the parallel architecture of human brains. They attempt to implement simplified versions of biological neural networks. That represents an alternative form of computing with high degree of connectivity and simple processing elements. •Neural networks, like biological networks, can learn from experience. •Neural networks are composed of a large number of simple processing elements that individually handle one piece of much larger problem. •Neural network consists of processing elements(PE), which multiply inputs by various set of weights, yielding a single output value.

Method of Arbitration

Centralized Centralized bus arbitration requires hardware (arbiter)that will grant the bus to one of the requesting devices. This hardware can be part of the CPU or it can be a separate device on the motherboard. Decentralized Decentralized arbitration there isn't an arbiter, so the devices have to decide who goes next. This makes the devices more complicated, but saves the expense of having an arbiter.

Hertz (Hz)

Clock cycles /S frequency 1MHZ= 1,000,000HZ Processors speed are measured in MHZ or GHZ

Computer Mainmemory

Computer with large main memory capacity can run large programs with greater speed that computer having small memories

ITU the international telecommunications union

Concerns itself with the interoperability of telecommunications system including data communication and telephony •national groups establish standards within their respective countries The American national standards institute (ANSI) The British standards institutions (BSI)

Level 3: System Software Level

Controls executing processes on the system. Protects system resources. Assembly language instructions often pass through Level 3 without modification.

There are three type of buses

Data Bus Address Bus Control Bus

Elements of Bus Design

Dedicated or Multiplexed Width Arbitration Data Transfer Type

Harvard Architecture Machine

Harvard architecture machine are a class similar to conventional machine except that they provide separate pathways for instruction addresses and instructions as well as data addresses and data. So, the harvard architecture machine allow the processor to access instructions and data simultaneously.

Classification of Computer Systems

Hence there is a pressing need for faster computer there are two potential solutions: - change the technology; - change the computer architecture.

Main Memory (RAM)

Is measured in MB Disk storage is measured in GB for small system, TB for large system

Computer Architecture

Logical aspects of system implementation as seen by the programmer. E.g instruction set,instructions formats, data types.

MIMD Computers

MIMD systems have the following characteristics: - they distribute processing over a number of independent processors; - each processor operate independently and concurrently; - each processor run its own process; - they share resources including the main memory. -The MIMD computers can be categorized as being either tightly-coupled (communication through the shared memory) or loosely-coupled (communication is running by message passing). Tightly-coupled MIMD computers uses a single memory unit shared by various processors and they have single OS. The IBM 3030 and SUN SPARK SERVER 1000 are examples of tightly-coupled system. Loosely-coupled MIMD computers are several independent computer systems connected via a communication unit.

Typical control lines include the following:

Memory write: causes data on the bus to be written to the addressed memory location. Memory read: causes data from the addressed memory location to be placed on the bus. I/O write: causes data on the bus to be output to the addressed I/O port. I/O read: causes data from the addressed I/O port to be placed on the bus. Bus request: indicates that a module needs to gain control of the bus. Bus grant: indicates that a requesting module has been granted control of the bus

Monitor 19" .24mm AG. 1280 x 1024 at 75hz

Number of times/s that the image on a monitor is repainted is its refresh rate the dot pitch of a monitor tells us how clear the image is a dot pitch lg 0.24 mm and refresh rate of 75HZ

Von Neumann Model

Processor module: instructions are calculated Memory module: Where instructions and data are stored (CPU and Primary Memory)

Flynn's Classification of Computer Systems

Processor of computer system can be split into control and processing units. So, control unit directs a flow of instructions and a flow of data from memory to processing unit According to the amount instruction and data flows Flynn classifies computers in the following way: - SISD (Single Instruction Stream Single Data Stream); - SIMD (Single Instruction Stream Multiple Data Stream); - MISD (Multiple Instruction Stream Single Data Stream); - MIMD (Multiple Instruction Stream Multiple Data Stream).

Level 6: The User Level

Program execution and user interface level. The level with which we are most familiar.

the institute of electrical a d electronics engineers (IEEE)

Promote the interests of the worldwide electrical engineering community Establish standards for computer components data representation,signaling protocols among mant other things

SIMD Computers

SIMD computers have the following characteristics: - they perform the same computation on all data elements; - they distribute processing over a large amount of hardware; - they operate concurrently on many different data element. SIMD computers differ in the way their processing units access memory: - global memory computers (one global memory unit is shared by all of the processing units); - local memory computers (one memory exists for each processing unit).

multiple processors.

SIMD computers with local memory may also have global memory and they are called

8GB serial ATA hard drive (7200 RPM)

Stores 80GB 7200RPM IS Rotational speed lf the disk generally the faster a disk rotates the faster it can deliver data to RAM there are many other factors involved ATA stand for advanced technology attachment which describes how the HD interface with or connects to other system components

Control Mechanisms01

The control mechanism determines the order in which computational units are executed.

Control Mechanisms

The control mechanism determines the order in which computational units are executed. Four possible mechanisms are known: - control-driven; - data-driven; - demand-driven; - pattern-driven;

data bus

The data goes in two directions, from CPU to components and vise versa. E.g.: A 16-bit bus can transmit 16 bits of data at a time. 32-bit bus can transmit 32 bits at a time.

Data Mechanism

The data mechanism defines the way computational units exchange data between them. Two data mechanisms can be distinguished: - shared data; - message passing. Shared data assumes that one single copy of argument is place in the memory, which is accessible to each computational unit.

Level 5: High-Level Language Level

The level with which we interact when we write programs in languages such as C, Pascal, Lisp, and Java.

adress bus

The size of address bus determines how many unique memory locations can be addressed. E.g.: A system with 4-bit address bus can address 24 = 16 Bytes of memory. A system with 16-bit address bus can address 216 = 64 KB of memory. A system with 20-bit address bus can address 220 = 1 MB of memory.

Bus Width

The width of a bus is the number of lines. A "32 bit bus" has 32 data lines. The width of the data bus has an impact on system performance: The wider the data bus, the greater the number of bits transferred at one time The more address lines, the larger the maximum amount of memory that can be accessed. The greater the width, the more hardware required to implement the bus.

128 MB pci express video card 56k pci data/fax modem 64-bit pci sound card

This system has 3 pci devices a video card a sound card and data/fax modem The videos card contains memory and programs that support monitor

Adress bus

When the software wants to access some particular memory location or I/O device, it places the corresponding address on the address bus. Circuitry associated with the memory or I/O device recognizes this address and instructs the memory or I/O device to read the data from or place data on to the data bus. In either case, all other memory locations ignore the request. Only the device whose address matches the value on the address bus responds.

Dedicated

With a dedicated bus there are separate wires for data and addresses.

Multiplexed

With a multiplexed bus, the same lines are used at different times to hold either data or addresses. Bus first used to specify an address, bus then used to transfer data. Advantage » Fewer lines - saves space, lower cost Disadvantage »More complex control »Potential reduction in performance

Supervised learning

assumes prior knowledge of correct results, which are fed to the neural net during the training phase. -By giving the network a number of inputs and their corresponding outputs -See how closely the actual outputs match the desired ones -Modify the parameters to better approximate the desired outputs Unsupervised learning does not provide the correct output to the network during training.

Neural computers

attempt to model human brain to some extent, and do not have a stored sequence of instructions

48x cd-rw drive

cd can store about 650mb of data this drive support rewritable cds cd rw that can be written to many times 48x descriibes its speed

Computational model is a

combination of two mechanisms: control mechanism and data mechanism. Each computational model based on computational units.

Program stored computers

held a program of instructions (or other computational units to define the order of computation).

bus

is a communication pathway connecting two or more devices. Multiple devices can be connected to the same bus at the same time. -Typically, a bus consists of multiple communication pathways, or lines. Each line is capable of transmitting signals representing binary 1 or binary 0. - A wire or a collection of wires that carry some multi-bit information is known as bus. Main purpose of bus is to transfer information form one system to another.

The control bus

is an eclectic collection of signals that control how the processor communicates with the rest of the system. Consider for a moment the data bus. The CPU sends data to memory and receives data from memory on the data bus. This prompts the question, "Is it sending or receiving?" There are two lines on the control bus, read and write, which specify the direction of data flow.

Message passing assumes

one copy of the argument for each computational unit. Whenever an argument must be passed to another unit, it is copied, and this copy is passed as a message to the destination unit. A typical example of message passing is the call-by-value mechanism of high-level programming language. A procedure parameter, passed by value is only a copy of the original data and is local to the call.

micron (micrometer)

one millionth of a meter Circuits on computer chip are measured in microns •cycle time is the reciprocal of clock frequency

The shared data (memory) mechanism was

one of the main concepts of conventional computers. Shared data mechanism causes many problems in parallel systems. Access to data has to be synchronized by arbitration mechanism, as each of computational units working in parallel is capable of modifying it.

Millisecond

one thousandth of a second. Hard disk access times are often 10 tp 20 milliseconds.

A processing unit is a

processor without control unit. 3)build machines that achieve parallelism by using pipelining. Architects first decompose instructions processing cycle into sequences of short stage, for example, instruction fetching, instruction decoding operand fetching, execution, and result storing. Than they provide special unit for each stage, which they pipeline.

Computer Level Hierarchy

•Computers consist of many things besides chips. •Before a computer can do anything worthwhile, it must also use software. •Writing complex programs requires a "divide and conquer" approach, where each program module solves a smaller problem. •Complex computer systems employ a similar technique through a series of virtual machine layers. •Each virtual machine layer is an abstraction of the level below it. •The machines at each level execute their own particular instructions, calling upon machines at lower levels to perform tasks as required. •Computer circuits ultimately carry out the work.

von neumann model

•Inventors of the ENIAC, John Mauchley and J. Presper Eckert, conceived of a computer that could store instructions in memory. •The invention of this idea has since been ascribed to a mathematician, John von Neumann, who was a contemporary of Mauchley and Eckert. •Stored-program computers have become known as von Neumann Architecture systems.

Measure of capacity and speed

•Kilo-(k)=1 thousand = 10^3 & 2^10 •mega-(M)=1million= 10^6 & 2^20 •giga-(G)=1billon =10^9 & 2^30 •tera-(T)=1 trillion = 10^12 & 2^40 •peta -(P)=1 quadrillion=10^15 & 2^50 •Exa -(E)=1quintillion=10^18 & 2^60 •Zetta -(Z)=1 sextillion = 10^21 & 2^70 •Yotta-(y)=1 septillion = 10^24 & 2^8

measure of time and space

•Milli-(m) =1 thousandth =10^-3 •micro-(u)= 1 millionth =10^-6 •Nano-(n)=1 billionth =10^-9 •pico-(p)=1 trillionth=10^-12 •Femto-(f)=1 quadrillionth=10^-15 •Atto-(a)=1 quintillionth =10^-18 •Zepto-(z) = 1 sextillionth=10^-21 •Yocoto-(y)=1 septillionth=10^-24

Von Neumann model

•On the ENIAC, all programming was done at the digital logic level. •Programming the computer involved moving plugs and wires. •A different hardware configuration was needed to solve every unique problem type. Configuring the ENIAC to solve a "simple" problem required many days labor by skilled technicians.

8USB PORTS,1 serial port,1 parallel port

•System has 10 ports •Ports allow movement of data between a system and its external device •Serial port send data as a series of puleses along one or 2 data lines •Parallel ports sends data as a single pulse along at least 8 data lines •USB universal serial bus is an intelligent serial interface that is self configuring (its support plug and play)

Standard (Organization)

•There are many organizations that set computer hardware standards to include the interoperability of computer components •some of the most important standards setting groups are...

Von Neumann Model(1)

•This is a general depiction of a von Neumann system: • •These computers employ a fetch-decode-execute cycle to run programs as follows . . . •The control unit fetches the next instruction from memory using the program counter to determine where the instruction is located. •The instruction is decoded into a language that the ALU can understand. •Any data operands required to execute the instruction are fetched from memory and placed into registers within the CPU. The ALU executes the instruction and places results in registers or memory

Von Nuemann model

•Today's stored-program computers have the following characteristics: -Three hardware systems: •A central processing unit (CPU) •A main memory system •An I/O system -The capacity to carry out sequential instruction processing. -A single data path between the CPU and main memory. •This single path is known as the von Neumann bottleneck.

Protected Environments

•Virtual machines are a protected environment that presents an image of itself -- or the image of a totally different architecture -- to the processes that run within the environment. •A virtual machine is exactly that: an imaginary computer. •The underlying real machine is under the control of the kernel. The kernel receives and manages all resource requests that emit from processes running in the virtual environment.