Computer Software & Hardware Architecture CIS

SPARC

) is a 32- and 64-bit microprocessor architecture from Sun Microsystems that is based on reduced instruction set computing (RISC)

Control Registers

A control register is a processor register which changes or controls the general behavior of a CPU or other digital device; never seen by the programmer

General Purpose Registers

A register is a discrete memory location within the CPU designed to hold temporary data and instructions. A modern CPU will has many internal registers; some languages will allow the programmer access (assembler, C++)

Condition Code/Flag Registers

A status register, flag register, or condition code register is a collection of status flag bits for a processor; (yes/no in file)

Cloud Carrier

An intermediary that provides connectivity and transport of cloud services from Cloud provider to cloud consumers.

BUaaS

BackUp as a service; provides service to customers in the form of space to backup information in the cloud

CISC

Complex instruction set computing (CISC /ˈsɪsk/) is a processor design, where single instructions can execute several low-level operations (such as a load from memory, an arithmetic operation, and a memory store) or are capable of multi-step operations or addressing modes within single instructions

Two-Pass Compiler

First pass is to make sure everything is valid; second pass is to make machine code execute.

IaaS

Infrastructure as a service; provides the customer access to the underlying cloud infrastructure

IOT

Internet of Things

Constant

It never changes

Assembly Language

Low level language and its used to write operating systems.

Public Cloud

Major advantage is the cost. Services may be free or offered on a per per usage model; infrastructure is made available to the general public or a large industry group and is owned by an organization selling cloud services. Cloud provider is responsible both for the cloud infrastructure and for the control of data and operations within the cloud.

Control Hazard

Occurs when the pipeline makes the wrong decision on a branch prediction and therefore brings instructions into the pipeline that must subsequently be discarded.

Pipeline Hazard

Occurs when the pipeline or some portion of the pipeline must stall because conditions do no permit continued execution. AKA pipeline bubble.

Data Hazard

Occurs when there is a conflict in the access of an operand location. Two instructions in a program are to be executed in sequence and both access a particular memory or register operand. If instructions are executed in pipeline the program produces an incorrect result because of the use of pipelining. AKA Concurrency problem. EX: Atm deposit and withdrawal.

Resource Hazard

Occurs when two or more instructions that are already in the pipeline need the same resource. The result is that the instructions must be executed in serial rather than parallel for a portion of the pipeline. AKA Structural Hazard.

PaaS

Platform as a service; provides service to customers in the form of a platform on which the customer's applications can run

User Visible Registers

Processors generally have a small number of User visible registers, which are, as you said, registers used to minimize memory use.

RISC

Reduced instruction set computing, or RISC (pronounced 'risk', /ɹɪsk/), is a CPU design strategy based on the insight that a simplified instruction set provides higher performance when combined with a microprocessor architecture capable of executing those instructions using fewer microprocessor cycles per instruction.

SaaS

Software as a service; provides service to customers in the form of software applications

One-Pass Compiler

Starts faster, but cant handle DO process; everything needs to be defined before.

Condition Code

Status of program; final category of registers that are bits set by the processor hardware as the result of operations. ex: an arithmetic operation may produce a positive, negative, zero or overflow result. in addition to the result itself being stored in a register or memory, a condition code is also set.

Stacks

Storage technique; Reserved blocks of locations. Stack is a linear array of locations. It is sometimes referred to as a pushdown list or last-in-first-out queue. Items are appended to the top of the stack so that, at any given time, the block is partially filled.

Modularity

The degree to which a system's components may be separated and recombined.

Boolean Algebra

The digital computers and other digital systems is designed and its behavior is analyzed with the use of mathematical discipline known as boolean algebra

Pipelining

The execution of an instruction involves multiple stages of operation, including fetching the instruction, decoding the opcode and fetching operands.

Unconditional branch

a branch instruction in which the branch is always taken; a "GOTO" instruction that goes to a different part of the program, regardless of resultsGlobal Variable - is a variable with global scope, meaning that it is visible (hence accessible) throughout the program, unless shadowed; variable available everywhere in the program

Service Arbitrage

a broker has the flexibility to choose services from multiple agencies. Similar to service aggregation except that the services being aggregated are not fixed. EX: cloud broker can use credit-scoring service to measure and select an agency with the best score

Cloud Provider

a person, organization or entity responsible for making a service available to interested parties

Cloud broker

an entity that manages the use, performance, and delivery of cloud services, and negotiates relationships between CPs and cloud consumers; Offers three areas of support

Multiplexer

connects multiple inputs to a single output.

Resource Pooling

get all the stuff together

Program Status Word (PSW)

is a collection of data 8 bytes (or 64 bits) long, maintained by the operating system. It keeps track of the current state of the system.

Community Cloud

is a multi-tenant infrastructure that is shared among several; organizations several organizations from a specific group with common computing concerns; not open to any subscriber, the cloud resources are shared among a number of independent organizations. The organizations that share the community cloud have similar requirements and a need to exchange data with each other. EX: health care industry

Hybrid Cloud

is an integrated cloud service utilizing both private and public clouds to perform distinct functions within the same organization; a composition of two or more clouds (private, community, public) that remain unique entities but are bound together by standardized or proprietary technology that enables data and application portability.

Private Cloud

is dedicated to a single organization; the organization may choose to manage the cloud in house or contract the management function to a third party. Cloud servers and storage devices may exist on premise or off premise. Key advantage is security. There are tighter controls over the physical location of data storage and other security aspects.

Address Registers

is the CPU register that either stores the memory address from which data will be fetched to the CPU or the address to which data will be sent and stored

Data Registers

is the register of a computer's control unit that contains the data to be stored in the computer storage

Data Transfer Instruction

it specifies a several things at a time

Rapid Elasticity

never run out of space (unlimited storage)

Local Variable

references in the function or block in which it is declared override the same variable name in the larger scope; variable is available within one procedure

Conditional branch

the branch is made update program counter to equal address specified in operand only if condition is met; if something is true or false (depending on the condition) the program will go to a different part of the program; A programming instruction that directs the computer to another part of the program based on the results of a compare

Service aggregation

the broker combines multiple cloud services to meet consumer needs not specifically addressed by a single CP or to optimize performance or minimize cost

Gate

the fundamental building block of all digital logic circuits is the gate

Branch Prediction

the processor looks ahead in the instruction code fetched from memory and predicts which branches or groups of instructions are likely to be processed.

Service intermediation

value added services such as identity management, performance reporting and enhanced security