[2] Digital Electronics
21. The Boolean expression for the circuit of the given figure A. A {F + (B + C) (D + E)} B. A [F + (B + C) (DE)] C. A + F + (B + C) (D + E)] D. A [F + (BC) (DE)] Answer & Explanation
A
Used state = 2n = 2 x 4 = 8 Unused state = 16 - 8 = 8. ________________________________________ 8. It is desired to display the digit 7 using a seven segment display. The LEDs to be turned on are A. a, b, c B. b, c, d C. c, d, e D. a, b, d Answer & Explanation
A
________________________________________ 22. What will be BCD number when the output is 0.37 V? A. 00110111 B. 10110111 C. 11001000 D. 01001000 Answer & Explanation
A
________________________________________ 25. Out of S, R, J, K, Preset, Clear inputs to flip flops, the synchronous inputs are A. S, R, J, K only B. S, R, Preset, Clear only C. Preset, Clear only D. S, R only Answer & Explanation
A
________________________________________ 29. The minimum number of NAND gates required to implement the Boolean function A +AB+ ABC is equal to A. 0 B. 1 C. 4 D. 7 Answer & Explanation
A
________________________________________ 30. For the K map of the given figure, the simplified Boolean expression is A. A C D + BC B. A B D + BC C. A C D + AC D. A C D + AC + BC Answer & Explanation
A
________________________________________ 37. The number of inputs and outputs of a full adder are A. 3 and 2 respectively B. 2 and 3 respectively C. 4 and 2 respectively D. 2 and 4 respectively Answer & Explanation
A
________________________________________ 40. In a mod-12 counter the input clock frequency is 10 kHz. The output frequency is A. 0.833 kHz B. 1.0 kHz C. 0.91 kHz D. 0.77 kHz Answer & Explanation
A
________________________________________ 42. In digital circuits Schottky transistors are preferred over normal transistors because of their A. lower propagation delay B. lower power dissipation C. higher propagation delay D. higher power dissipation Answer & Explanation
A
________________________________________ 44. A 4 bit parallel type A/D converter uses a 6 volt reference. How many comparators are required and what is the resolution in volts? A. 0.375 V B. 15 V C. 4.5 V D. 10 V Answer & Explanation
A
________________________________________ 5. In a D latch A. data bit D is fed to S input and D to R input B. data bit D is fed to R input and D to S input C. data bit D is fed to both R and S inputs D. data bit D is not fed to any input Answer & Explanation
A
________________________________________ 9. For a MOD-12 counter, the FF has a tpd = 60 ns The NAND gate has a tpd of 25 n sec. The clock frequency is A. 3.774 MHz B. > 3.774 MHz C. < 3.774 MHz D. 4.167 MHz Answer & Explanation
A
. ________________________________________ 45. Quantization error occurs in A. D/A converter B. A/D converter C. both D/A and A/D converter D. neither D/A nor A/D converter Answer & Explanation
B
26. The Boolean expression A ⊕ B is equivalent to A. AB + AB B. AB + AB C. B D. A Answer & Explanation
B
41. The total number of input words for 4 input OR gate is A. 20 B. 16 C. 12 D. 8 Answer & Explanation
B
6. A 4 : 1 multiplexer requires __________ data select line. A. 1 B. 2 C. 3 D. 4 Answer & Explanation
B
BCD number is (00110111). ________________________________________ 23. The first machine cycle of an instruction is always A. a memory read cycle B. a fetch cycle C. a input/output read cycle D. a memory write cycle Answer & Explanation
B
________________________________________ 15. Available multiplexer IC package can have a maximum of 8 inputs. A. True B. False Answer & Explanation
B
________________________________________ 18. AECF16 + 15ACD16 = __________ . A. C47BB16 B. C47BE16 C. A234F16 D. A111116 Answer & Explanation
B
________________________________________ 20. Wired AND connection can be used in TTL with totem pole output. A. True B. False Answer & Explanation
B
________________________________________ 28. What will be minimum conversion rate in 6 bit dual slope A/D converter uses a reference of -6v and a 1 MHz clock. It uses a fixed count of 40 (101000). A. 9000 B. 9259 C. 1000 D. 1000 Answer & Explanation
B
________________________________________ 35. If the inputs to a 3 bit binary adder are 1112 and 1112, the output will be 1102 A. True B. False Answer & Explanation
B
________________________________________ 38. A VF display operates on the principle of a vacuum diode. A. True B. False Answer & Explanation
B
________________________________________ 39. In a 3 input NAND gate, the number of states in which output is 1 equals A. 8 B. 1 C. 6 D. 5 Answer & Explanation
B
________________________________________ 43. A flip flop is a A. combinational circuit B. memory element C. arithmetic element D. memory or arithmetic element Answer & Explanation
B
________________________________________ 47. Out of latch and flip flop, which has clock input? A. Latch only B. Flip flop only C. Both latch and flip flop D. None Answer & Explanation
B
________________________________________ 48. A mod 4 counter will count A. from 0 to 4 B. from 0 to 3 C. from any number n to n + 4 D. none of the above Answer & Explanation
B
________________________________________ 50. Which of the following finds application in pocket calculators? A. TTL B. CMOS C. ECL D. Both (a) and (c) Answer & Explanation
B
tpd = Mod 12 - 4FFs = 4 x 60 = 240 nsec. Total tpd = 250 + 25 = 265 nsec. = fc and fc = 3.774 MHz. ________________________________________ 10. 1001012 is equal to decimal number A. 47 B. 37 C. 21 D. 17 Answer & Explanation
B
1. Assertion (A): A demultiplexer can be used as a decoder. Reason (R): A demultiplexer can be built by using AND gates only. A. Both A and R are correct and R is correct explanation of A B. Both A and R are correct but R is not correct explanation of A C. A is true, R is false D. A is false, R is true Answer & Explanation
C
16. A16 X 216 __________ . A. 1616 B. 1516 C. 1416 D. 1316 Answer & Explanation
C
36. Which display device resembles vacuum tube? A. LED B. LCD C. VF D. None of these Answer & Explanation
C
46. Which of these are universal gates? A. Only NOR B. Only NAND C. Both NOR and NAND D. NOR, NAND, OR Answer & Explanation
C
________________________________________ 13. Which of the following is error correcting code? A. EBCDIC B. Gray C. Hamming D. ASCII Answer & Explanation
C
________________________________________ 14. A universal shift register can shift A. from left to right B. from right to left C. both from left to right and right to left D. none of the above Answer & Explanation
C
________________________________________ 19. A XOR gate has inputs A and B and output Y. Then the output equation is A. Y = AB B. Y = AB + A B C. Y = A B + A B D. Y = A B + A B Answer & Explanation
C
________________________________________ 2. Assertion (A): The output of a NOR gate is equal to the complement of OR of input variables. Reason (R): A XOR gate is a universal gate. A. Both A and R are correct and R is correct explanation of A B. Both A and R are correct but R is not correct explanation of A C. A is true, R is false D. A is false, R is true Answer & Explanation
C
________________________________________ 24. A counter has N flip flops. The total number of states are A. N B. 2 N C. 2N D. 4 N Answer & Explanation
C
________________________________________ 32. A divide by 78 counter can be obtained by A. 6 numbers of mod-13 counters B. 13 numbers of mod-6 counters C. one mod-13 counter followed by mod-6 counter D. 13 number of mod-13 counters Answer & Explanation
C
________________________________________ 49. In the given figure shows a 4 bit serial in parallel out right shift register. The initial contents as shown are 0110. After 3 clock pulses the contents will be A. 0000 B. 0101 C. 1010 D. 1111 Answer & Explanation
C
________________________________________ 7. The number of unused states in a 4 bit Johnson counter is A. 2 B. 4 C. 8 D. 12 Answer & Explanation
C
11. A Karnaugh map with 4 variables has A. 2 cells B. 4 cells C. 8 cells D. 16 cells Answer & Explanation
D
31. The dual of A + [B + (AC)] + D is A. A + [(B (A + C))] + D B. A [B + AC] D C. A + [B (A + C)] D D. A [B (A + C)] D Answer & Explanation
D
It complete 2 cycles in 32 Pulses. In the rest 5 Pulses, it moves down from 0110 = 610 - 510 = 110 or (001)2 . ________________________________________ 34. The number of address lines in EPROM 4096 x 8 is A. 2 B. 4 C. 8 D. 12 Answer & Explanation
D
________________________________________ 12. An 8 bit data is to be entered into a parallel in register. The number of clock pulses required is A. 8 B. 4 C. 2 D. 1 Answer & Explanation
D
________________________________________ 17. For the binary number 11101000, the equivalent hexadecimal number is A. F 9 B. F 8 C. E 9 D. E 8 Answer & Explanation
D
________________________________________ 27. Which of these are two state devices? A. Lamp B. Punched card C. Magnetic tape D. All of the above Answer & Explanation
D
________________________________________ 3. The number of bits in ASCII is A. 12 B. 10 C. 9 D. 7 Answer & Explanation
D
________________________________________ 33. The initial state of MOD-16 down counter is 0110. What state will it be after 37 clock pulses? A. Indeterminate B. 0110 C. 0101 D. 0001 Answer & Explanation
D
________________________________________ 4. 4 bit 2's complement representation of a decimal number is 1000. The number is A. + 8 B. 0 C. - 7 D. - 8 Answer & Explanation
D