8051 Addressing Modes

Immediate Addressing

The operand data is directly mentioned in the instruction. Will have a #.e.g. MOV A,#2Ah; MOV DPTR, #8B9Ch; MOV R2, #0EAh; ADD A, #08h.

Restrictions of register indirect addressing

1. Only R0 and R1 of any bank may be used to hold the address for indirect addressing. 2. Indirect addressing may refer only to the internal RAM (00-7Fh) - NEVER to an SFR. You can't put the address of D0 in R0 and then MOV @R0,#75h.

Indexed Addressing

A 16 bit addr in a 16bit base reg is added to a positive offset in the A to form an effective jump indirect instr. For jmp, base is always DPTR. For MOVC, may be DPTR or PC. e.g. JMP @A + DPTR; MOVC A, @A + DPTR; MOVC A,@A+PC. Note MOVC can only move TO A.

Direct Addressing

Address of a particular memory location or register is directly mentioned in the instruction. All 80h byte of internal RAM and the SFRs above 80h may be addressed directly using an 8 bit address if \EA =1. For \EA = 0, 00-FF of ext memory chip is addressable e.g. MOV 5Ch, A; MOV 00h,12h -->00h is actual R0 of bank 0; ADDC A,4Eh. A reqd in such arith instns.

Indirect Addressing

Instruction contains the name of a register (R0 or R1 of any bank), which has the address where the actual operand is stored. This indirect address can't be an SFR. Name of indirect register is preceded by @. A need not be involved in such MOV as long as actually between two memories. A reqd in ADD variants. e.g. MOV @R1, 4Fh; MOV @R1, #3Fh; MOV @R0, D0h --> D0h is effectively PSW; SUBB A, @R0.

Register Addressing

Register names are used as part of the mnemonic, i.e. in instruction. Operand is stored in the register addressed. Reg can be both GPR and SFR. e.g. MOV A, R2; MOV b/w two regs not allowed without A; ADD A, R4.

Absolute Addressing

Used by ACALL and AJMP, which branch within a given page of 2k addresses. The branch address is obtained by successively concatenating the 5 high order bits of the PC + lower 11 bit of address specified in instruction.

Long Addressing

Used by LCALL addr16 and LJMP addr16. 3 byte instructions. Branch to anywhere within the full 64k bytes of program memory address space.

Relative Addressing

Used with certain jump instructions, also called program counter relative addressing, or relative branching. A relative address of 8 bit signed is provided, which is added to PC to form address of next instruction. e.g. JZ (rel_addr).