COE121 FINALS

Using 100010dw mmregr/m in applicable for the converting the following assembly languages to machine codes except: a. MOV AX, [BX] b. MOV ES, AX c. MOV [BP+4891H], DL d. MOV [1000H], DL

b

Which is not a valid logical instruction? a. AND b. NAND c. XO d. OR

c

The source file is converted into a(n) _____ wherein it contains all the actual binary information a. Machine code b. Pseudo-opcode c. List file d. Object file

d

This type of assemblers work with one source line at a time and are restricted in operation. A. One-liner-assemblers B. Special-assemblers C. Cross-assemblers D. Single-line-assemblers

d

A _____ is a collection of bytes stored sequentially in memory, whose length can be up to _______. A. String, 64KB B. String, 8KBytes C. Char, 1KB D. Char, 64KB

a

A processor design, where single instruction can execute several low-level operations or addressing modes within single instruction? a. CISC processor b. RISC processor c. Celeron d. Athion

a

A storage of address that can be directly accessed is a) internal data RAM and SFRS b) internal data ROM c) external data RAM d) external data ROM and SFRS

a

A symbol, 'addr 16' represents the 16-bit address which is used by the instructions to specify the a) destination address of call or jump b) source address of JUMP c) destination address of CALL d) source address of call or jump

a

A type of addressing mode, the offset address of the operand is given by the sum of contents of BX/BP registers and 8-bit/16-bit displacement. a. Based Addressing Mode b. Direct Mode c. Immediate Mode d. Register Indirect Addressing Mode

a

A type of addressing mode, the offset address of the operand is given by the sum of contents of the BX/BP registers and 8- bit/16-bit displacement. A. Based addressing mode B. Immediate Mode C. Direct Mode D. Register Indirect Addressing Mode

a

Address is referred to ________ when the processor's address bus is formed by some combination of segment register and an additional numerical offset. A. Effective Address B. Immediate Addressing C. Register Addressing D. Base Addressing

a

An _________ is a special program that will understand the contents of the object file A. Assembler B. Compiler C. Linker D. Library

a

An example of Indexed Addressing Mode a. ADD AL, [DI+16] b. MOV DX, [BX+04] c. MOV AL, FFH d. MOV CX, AX

a

An example of immediate addressing mode A. MOV AL, FFH B. MOV CX, AX C. MOV DX, [BX+04] D. MOV AX, [BX]

a

An example of indexed addressing mode A. ADD AL, [DI+16] B. MOV DX, [BX+04] C. MOV AL, FFH D. MOV CX, AX

a

An example of register addressing mode A. MOV CX, AX B. MOV AL, FFH C. MOV DX, [BX+04] D. MOV AX, [BX]

a

D-bit indicates the _____. a. Direction of Data flow b. Destination of transfer c. Source of transfer d. Both B and C

a

How is the effective address of baseregister calculated? A. By addition of index register contents to the partial address in instruction B. By addition of implied register contents to the partial address in instruction C. By addition of index register contents to the complete address in instruction D. By addition of implied register contents to the complete address in instruction

a

If AL contains FFH, what does it contain after INC AL executes? a. 00H b. FEH c. 100H d. none

a

If SP = 1E00H before PUSH AX, what does it equal after PUSH AX? a. 1DFEH b. 1E02H c. 1E00H d. none of the above

a

It is another way of referring to a subroutine and has to do with the assembler directives PROC and ENDP used in the source file a. Procedures b. Processor c. CALL d. RET

a

The addressing mode which makes use of in-direction pointers is ______ . a) Indirect addressing mode b) Index addressing mode c) Relative addressing mode d) Offset addressing mode

a

The addressing mode, where you directly specify the operand value is _______ . a) Immediate b) Direct c) Definite d) Relative

a

The following is true for r/m except: a. r/m refers to registers that are enclosed in a bracket b. When mod = 11, r/m indicates a REG field c. r/m specifies the addressing mode d. Both B and C

a

The instruction, ADD A, R7 is an example of a) register instructions b) register specific instructions c) indexed addressing d) none

a

This input is used to force the Pentium to limit addressable memory to 1MB to emulate the memory space the memory of the 8086. a. A20M (Address 20Mask) b. ADS (Address Strobe) c. AHOLD (Address Hold) d. AP (Address Parity)

a

This instruction clears the carry flag. a. CLC b. STC c. CMC d. CLD

a

What do ARM stands for, it developed the large variations in superscalars as per application-specific needs. a. Advance RISC Machines b. Advance Response Machines c. Advance Robotic Machines d. Advance Reprogrammable Machines

a

What does IN AL, DX do? a. reads byte of data from I/O port (addressed by DX) into AL b. writes byte of data from AL into I/O port (addressed by DX) c. puts a copy of DX 'in' AL d. none of the above

a

What segment is used to store a destination string? a. CS b. DS c. ES d. none of the above

a

Which of the following examples is an Immediate Addressing Mode? a. MOV AL, FFH b. MOV AX, [BX+4] c. MOV [DI-8], BL d. MOV [500H], AL

a

Which of the following is a logical instruction a. TEST b. CMP c. ADC d. SHL

a

Which two bit value has the highest priority of Requestor Privilege level in a Segment Selector for a Protected-mode Operation? a. 00 b. 01 c. 10 d. 11

a

_____ addressing mode is most suitable to change the normal sequence of execution of instructions . a) Relative b) Indirect c) Index with Offset d) Immediate

a

mm=___ is automatically used for direct addressing a. 00 b. 01 c. 10 d. 11

a

Add #45, when this instruction is executed the following happen/s, a) The processor raises an error and requests for one more operand b) The value stored in memory location 45 is retrieved and one more operand is requested c) The value 45 gets added to the value on the stack and is pushed onto the stack d) None of these

b

BSWAP swaps bytes in a ______ A. 16-bit general purpose register B. 32-bit general purpose register C. 16-byte general purpose register D. 32-byte general purpose register

b

Base registers, BX or BP, is used as a pointer to the desired memory location in this type of addressing. A. Indirect Addressing B. Base Addressing C. Register Addressing D. Immediate Addressing

b

Based addressing mode example A. MOV CX, AX B. MOV DX, [BX+04] C. MOV AL, FFH D. MOV AX, [BX]

b

Based addressing mode example a. MOV CX, AX b. MOV DX, [BX+04] c. MOV AL, FFH d. MOV AX, [BX]

b

Bit manipulation is used for __________. A. AND, OR, NOR, NOT B. AND, OR, XOR, NOT C. AND, NOR, OR, XOR D. TEST, NOR, AND, OR

b

CISC stands for______. a. Complicated Instruction System Computer b. Complex Instruction Set Computer c. Complex Instruction System Computer d. Complicated Instruction Set Computer

b

If SI = 1000H, what does MOV [SI], BH do? a. reads byte of data from memory location 1000H into BH b. writes byte of data from BH into memory location 1000H c. illegal, only DI can be used between [ ] 's d. none of the above

b

In this addressing mode, the operands offset address is found by adding the contents of SI or DI register and 8-bit/16-bit displacements. A. Based addressing mode B. Indexed addressing mode C. Direct Mode D. Register Indirect Addressing Mode

b

It is a type of a flag register that indicates if result equals to zero. A. Carry Flag (CF) B. Zero Flag (ZF) C. Sign Flag (SF) D. Interrupt Flag (IF)

b

It is an addressing mode in which the data operand is a part of the instruction itself. A. Implied Mode B. Immediate Mode C. Direct Mode D. Register Mode

b

It transfers a byte or a word between a register and a memory location addressed by an index or base register a. Base-Relative-Plus Index Addressing Mode b. Register Indirect Addressing Mode c. Based Addressing Mode d. Indexed Addressing Mode

b

It transfers the source immediate byte or word of data into the destination register or memory location a. Register Addressing Mode b. Immediate Addressing Mode c. Based Addressing Mode d. Based Indexed Addressing

b

MOV AX, [BX+4] is a sample of which type of addressing? A. Indirect Addressing B. Base Addressing C. Register Addressing D. Immediate Addressing

b

The addressing mode, in which the instructions has no source and destination operands is a) register instructions b) register specific instructions c) direct addressing d) indirect addressing

b

The addressing mode/s, which uses the PC instead of a general purpose register is ______ . a) Indexed with offset b) Relative c) direct d) both a and c

b

The data address of look-up table is found by adding the contents of a) accumulator with that of program counter b) accumulator with that of program counter or data pointer c) data register with that of program counter or accumulator d) data register with that of program counter or data pointer

b

The instruction, Add #45,R1 does, a) Adds the value of 45 to the address of R1 and stores 45 in that address b) Adds 45 to the value of R1 and stores it in R1 c) Finds the memory location 45 and adds that content to that of R1 d) None of the above

b

The instruction, RLA performs a) rotation of address register to left b) rotation of accumulator to left c) rotation of address register to right d) rotation of accumulator to right

b

This instruction sets the carry flag. a. CLC b. STC c. CMC d. CLD

b

Which technique does the Pentium Pro employs here the processor looks ahead into the instruction stream, executing instructions out of order, so that the instruction pipeline can be kept busy a. Predication b. Speculative Execution c. Superthreading d. Register renaming

b

In case of, Zero-address instruction method the operands are stored in _____ . a) Registers b) Accumulators c) Push down stack d) Cache

c

In this addressing mode, the operands offset address is found by adding the contents of SI or DI register and 8- bit/16-bit displacements a. Based Addressing mode b. Direct Mode c. Indexed Addressing Mode d. Register Indirect Addressing Mode

c

It is a collection of instructions that is called from one or many other different locations within a program. a. Jump b. Loop c. Subroutine d. Relative offset

c

It is a special type of high speed RAM where data and the address of the data are stored. a. Clock b. Burst Ready c. Cache d. Bus Lock

c

It is used to examine the state of individual bits, or groups of bits. a. CMP b. TEST c. Bit Scan forward d. Bit test

c

The addressing mode in which the effective address of the memory location is visibly part of the instruction a. Implied Mode b. Immediate Mode c. Direct Mode d. Register Mode

c

The addressing mode in which the effective address of the memory location is written directly in the instruction. A. Implied Mode B. Immediate Mode C. Direct Mode D. Register Mode

c

The effective address of the following instruction is , MUL 5(R1,R2) a) 5+R1+R2 b) 5+(R1*R2) c) 5+[R1]+[R2] d) 5*([R1]+[R2])

c

The instruction, ADD A, #100 performs a) 100(decimal) is added to contents of address register b) 100(decimal) is subtracted from accumulator c) 100(decimal) is added to contents of accumulator d) none

c

What are the contents of AH and AL after MOV AX, 4 executes? a. AH = ?? , AL = 04 b. AH = 04, AL = ?? c. AH = 0, AL = 04 d. none of the above

c

What is the result of SHL AL, CL if AL = 3EH and CL = 04H a. AL = 03H b. AL = E4H c. AL = E0H d. none of the above

c

Which of the following examples is a direct addressing mode? a. MOV CL, [BX-DI+2] b. MOV AX, [BX+4] c. MOV [500H], AL d. none of the above

c

______ contains many new pseudocodes to help the assembler generate the correct machine code for the object file. A. Module B. Operands C. Segments D. Linker

c

An example of direct addressing mode A. MOV CX, AX B. MOV AL, FFH C. MOV DX, [BX+04] D. MOV AX, [1592H]

d

Data transfer group contains instructions that transfer from ____________. A. Memory to register, register to memory, memory to memory, register to register B. Memory to memory, register to register, register to memory C. Memory to memory, memory to register, register to memory D. Memory to register, register to register, register to memory

d

Data transfer group contains instructions that transfer from a. Memory to register, register to memory, memory to memory, register to register b. Memory to memory, register to register, register to memory c. Memory to memory, memory to register, register to memory d. Memory to register, register to register, register to memory

d

In the following indexed addressing mode instruction, MOV 5(R1),LOC the effective address is ______ . a) EA = 5+R1 b) EA = R1 c) EA = [R1] d) EA = 5+[R1]

d

In which of these addressing modes, a constant is specified in the instruction, after the opcode byte? a) register instructions b) register specific instructions c) direct addressing d) immediate mode

d

It moves a byte or a word between a memory location and a register a. Register Addressing Mode b. Immediate Addressing c. Indirect Addressing Mode d. Direct Addressing Mode

d

MOV CX, 7 is a sample of which type of addressing? A. Indirect Addressing B. Base Addressing C. Register Addressing D. Immediate Addressing

d

MOV DL, [SI] is a sample of which type of addressing? A. Indirect Addressing B. Base Addressing C. Register Addressing D. Register Indirect Addressing

d

MOV DL, [SI] is a sample of which type of addressing? a. Indirect Addressing b. Register Addressing c. Base Addressing d. Register Indirect Addressing

d

MOVS is used to _______ a. Move the signed value to the destination b. Copy the source to the destination c. Move the source to the destination d. Copy the source of the string to the destination string.

d

MOVS is used to ___________ A. Move the signed value to the destination B. Move the source to the destination C. Copy the source to the destination D. Copy the source of the string to the destination string.

d

RISC stands for_____. a. Reduced Instructive System Computer b. Reused Instruction Set Computer c. Reused Instruction System Computer d. Reduced Instruction Set Computer

d

The ____ part specifies the addressing mode for the selected instruction a. REG (reg) b. R/M (r/m) c. Addr-low d. MOD (mm)

d

The address register for storing the 16-bit addresses can only be a) stack pointer b) accumulator c) instruction register d) data pointer

d

The address register for storing the 8-bit addresses can be a) R0 of selected bank of register b) R1 of selected bank of register c) stack pointer d) all of the mentioned

d

The direction flag is cleared by this instruction. a. CLC b. STC c. CMC d. CLD

d

The only memory which can be accessed using indexed addressing mode is a) RAM b) ROM c) main memory d) program memory

d

The source file is converted into an __________ wherein it contains all the actual binary information. A. Machine code B. Pseudo-opcode C. List file D. Object file

d

These instructions are used to preserve the contents of the outer loop counter. a. PUSH and LOOP b. LOOP and POP c. PUSH and PUSH d. PUSH and POP

d

This addressing mode allows data to be addressed at any memory location through an offset address held in any of the following registers: BP, BX, DI & SI A. Implied Mode B. Immediate Mode C. Direct Mode D. Register Indirect Addressing Mode

d

This group of instructions allows the programmer to choose where the processor fetches its next instruction from a. Bit Manipulation Instructions b. Arithmetic Instructions c. Logical Instructions d. Program Transfer Instruction

d

This instruction pushes all registers to the stack a. PUSHD b. PUSH c. PUSHF d. PUSHA

d

This instruction pushes all registers to the stack. A. PUSHD B. PUSH C. PUSHF D. PUSHA

d

This is an example of register Indirect Addressing Mode A. MOV CX, AX B. MOV AL, FFH C. MOV DX, [BX+04] D. MOV AX, [BX]

d

This is an example of register Indirect Addressing Mode a. MOV CX, AX b. MOV AL, FFH c. MOV DX, [BX+04] d. MOV AX, [BX]

d

When we use auto increment or auto decrement, which of the following is/are true 1) In both, the address is used to retrieve the operand and then the address gets altered. 2) In auto increment the operand is retrieved first and then the address altered. 3) Both of them can be used on general purpose registers as well as memory locations. a) 1,2,3 b) 2 c) 1,3 d) 2,3

d

Which addressing mode execute its instruction within CPU without the necessity of reference memory for operands? a. Implied Mode b. Immediate Mode c. Direct Mode d. Register Mode

d

Which addressing mode execute its instructions within CPU without the necessity of reference memory for operands? A. Implied Mode B. Immediate Mode C. Direct Mode D. Register Mode

d

Which of the following are Bit Manipulation Instructions a. Shift Instructions b. Logical Instructions c. Rotate Instructions d. All of the above

d

Which of the following examples is an Register Addressing Mode? a. MOV CL, [BX-DI+2] b. MOV DL, [SI] c. MOV AL, 12H d. none of the choices

d

Which of the following is not an addressing mode of 8051? a) register instructions b) register specific instructions c) indexed addressing d) none

d