computer architecture ch 3.

EOR:

(exclusive or) A logical bit-by-bit operation with two operands that calculates the exclusive OR of the two operands. That is, it calculates a 1 only if the values are different in the two operands.

conditional branches are written

B.conditional. example B.EQ. branch on equals. B.MI branch on minus

Machine language:

Binary representation used for communication within a computer system.

In addition to the 10 conditional branch instructions in the figure below, LEGv8 includes these four branches to complete the testing of the individual condition code bits:

Branch on minus (B.MI): N=1; Branch on plus (B.PL): N=0; Branch on overflow set (B.VS): V=1; Branch on overflow clear (B.VC): V=0.

Note that unlike other programming languages, each line of this language can contain at most one instruction.

Another difference from C is that comments always terminate at the end of a line.

Doubleword:

Another natural unit of access in a computer, usually a group of 64 bits; corresponds (happens to be) [to] the size of a register in the LEGv8 architecture.

CBNZ

compare branch not zero. read skip if not zero

3.12 translating and starting a program.

describes the four steps in transforming a C program in a file from storage (disk or flash memory) into a program running on a computer.

Although we could simply write instructions using numbers for registers, from 0 to 31, the LEGv8 convention is X followed by the number of the register, except for a few register names that we will cover later.

example. ADD X9, X20, X21

CB-type

for conditional branch. (The conditional branch instructions that rely on condition codes also use the CB-type format, but they use the final field to select among the many possible branch conditions.)

By historical precedent, stacks "grow":

from higher addresses to lower addresses. This convention means that you push values onto the stack by subtracting from the stack pointer. Adding to the stack pointer shrinks the stack, thereby popping values off the stack.

GP

global pointer, register reserved to point to the static area

The full set of comparisons are

less than (<), less than or equal (≤), greater than (>), greater than or equal (≥), equal (=), and not equal (≠).

The data transfer instruction that copies data from memory to a register is traditionally called:

load. The format of the load instruction is the name of the operation followed by the register to be loaded, then register and a constant used to access memory. The sum of the constant portion of the instruction and the contents of the second register forms the memory address. The real LEGv8 name for this instruction is LDUR, standing for load register.

Load byte (LDURB)

loads a byte from memory, placing it in the rightmost 8 bits of a register.

Load half (LDURH)

loads a halfword from memory, placing it in the rightmost 16 bits of a register. Like load byte, load half (LDURH) treats the halfword as a signed number and thus sign-extends to fill the 48 leftmost bits of the register.

Using frequency to justify the inclusions of constants is another example of the great idea of:

making the common case fast.

We number the bits 0, 1, 2, 3, ... from right to left in a doubleword.

most significant bit is at the left ( highest)

MOVK

move wide with keep

MOVZ

move wide with zeros zeros the rest of the bits of the register and the latter leaves the remaining bits unchanged. The 16-bit field to be loaded is specified by adding LSL and then the number 0, 16, 32, or 48 depending on which quadrant of the 64-bit word is desired. in other words the LSL tells which of the four 16 bit quadrants get the values. 0 being the first 16 second etc.

shift

moves all the bits in a double word to the left or right. full name logical shift left (LSL) or logical shift right (LSR). bonus benefit of shifting by 4 is the same as multiplying by 2^4 or 16.

The process of putting less frequently used variables (or those needed later) into memory is called:

spilling registers.

The instruction complementary to load is traditionally called:

store; it copies data from a register to memory. The actual LEGv8 name is STUR, standing for store register.

the BL instruction:

stores the return address in register LR and then branches to the target address

Store byte (STURB)

takes a byte from the rightmost 8 bits of a register and writes it to memory.

Store half (STURH)

takes a halfword from the rightmost 16 bits of a register and writes it to memory.

Loader:

A systems program that places an object program in main memory so that it is ready to execute

Symbol table:

A table that matches names of labels to the addresses of the memory words that instructions occupy.

One major difference between the variables of a programming language and registers is the limited number of registers, typically 32 on current computers, like LEGv8.

... Thus, continuing in our top-down, stepwise evolution of the symbolic representation of theLEGv8 language, in this section we have added the restriction that the three operands of LEGv8 arithmetic instructions must each be chosen from one of the 32 64-bit registers. The reason for the limit of 32 registers may be found in the second of our three underlying design principles of hardware technology:

comments in ARMv8:

//

data transfer instruction

A command that moves data between memory and registers. (cause arithmetic operations can only happen in registers in LEGv8)

Pseudoinstruction:

A common variation of assembly language instructions often treated as if it were an instruction in its own right.

Stack:

A data structure for spilling registers organized as a last-in- first-out queue.

Instruction format:

A form of representation of an instruction composed of fields of binary numbers.

Executable file:

A functional program in the format of an object file that contains no unresolved references. It can contain symbol tables and debugging information. A "stripped executable" does not contain that information. Relocation information may be included for the loader.

Return address:

A link to the calling site that allows a procedure to return to the proper address; in LEGv8 it is stored in register LR (X30).

NOT:

A logical bit-by-bit operation with one operand that inverts the bits; that is, it replaces every 1 with a 0, and every 0 with a 1.

OR:

A logical bit-by-bit operation with two operands that calculates a 1 if there is a 1 in either operand.

Word:

A natural unit of access in a computer, usually a group of 32 bits. given. popular size of a group of 32 bits. ( like bytes is 8 bits, a word is 32 and a doubleword is 64).

Biased notation:

A notation that represents the most negative value by 00 ... 000two and the most positive value by 11 ... 11two, with 0 typically having the value 10 ... 00two, thereby biasing the number such that the number plus the bias has a non-negative representation.

One's complement:

A notation that represents the most negative value by 10 ... 000two and the most positive value by 01 ... 11two, leaving an equal number of negatives and positives but ending up with two zeros, one positive (00 ... 00two) and one negative (11 ... 11two). The term is also used to mean the inversion of every bit in a pattern: 0 to 1 and 1 to 0.

Callee:

A procedure that executes a series of stored instructions based on parameters provided by the caller and then returns control to the caller.

General-purpose register (GPR):

A register that can be used for addresses or for data with virtually any instruction.

Alignment restriction:

A requirement that data be aligned in memory on natural boundaries.

Basic block:

A sequence of instructions without branches (except possibly at the end) and without branch targets or branch labels (except possibly at the beginning).

Assembly language:

A symbolic language that can be translated into binary machine language.

Frame pointer:

A value denoting the location of the saved registers and local variables for a given procedure.

Stack pointer:

A value denoting the most recently allocated address in a stack that shows where registers should be spilled or where old register values can be found. In LEGv8, it is register SP.

address

A value used to delineate the location of a specific data element within a memory array.

Design Principle 2: Smaller is faster

A very large number of registers may increase the clock cycle time simply because it takes electronic signals longer when they must travel farther.

two's complement representation:

A way to represent signed integer in which we count up from zero to represent positive values and we count down from zero to represent negative values. leading 0s mean positive, and leading 1s mean negative. leading 0 indicates a positive number and a leading 1 indicates a negative number. The complement of a value is obtained by complementing each bit (0 → 1 or 1 → 0), and then adding one to the result. every computer today uses it for signed numbers

Push:

Add element to stack.

Procedure frame:

Also called activation record. The segment of the stack containing a procedure's saved registers and local variables.

Binary digit:

Also called binary bit. One of the two numbers in base 2, 0 or 1, that are the components of information.

Branch address table:

Also called branch table. A table of addresses of alternative instruction sequences.

Linker:

Also called link editor. A systems program that combines independently assembled machine language programs and resolves all undefined labels into an executable file. takes all the independently assembled machine language programs and "stitches" them together. The reason a linker is useful is that it is much faster to patch code than it is to recompile and reassemble.

PC-relative addressing:

An addressing regime in which the address is the sum of the program counter (PC) and a constant in the instruction.

Branch-and-link instruction:

An instruction that branches to an address and simultaneously saves the address of the following instruction in a register (LR or X30 in LEGv8). written BL ProcedureAddress

Conditional branch:

An instruction that tests a value and that allows for a subsequent transfer of control to a new address in the program based on the outcome of the test.

see pic on page 3.12 for hierarchy steps.

C program --> Compiler--> Assembly language program --> Assembler--> Object: Machine language module/ Object: library routing (machine language)-->linker --> Executable: Machine language program--> loader--> memory.

just an example of something

CBNZ X19, Exit // go to Exit if X19 ≠ 0

another type of instruction format is called:

D-type or D-format. used by data transfer instruction ( loads and stores ) see pic.

There is also

I-type format for immediates

Java bytecode:

Instruction from an instruction set designed to interpret Java programs.

sign extension

Moving the sign bit to the new leftmost position and filling in with copies of the sign bit is called _________. a. sign extension b. range extension c. bit extension d. partial extension

Java Virtual Machine (JVM) :

The program that interprets Java bytecodes. a software interpreter. an interpreter is a program that simulates an instruction set architecture. upside is portability

Program counter (PC):

The register containing the address of the instruction in the program being executed. aka instruction address register.

Thus, we copy a byte with the sequence

LDURB X9,[X0,#0] // Read byte from source STURB X9,[X1,#0] // Write byte to destination

arithmetic operations occur only on registers in LEGv8 instructions; thus,

LEGv8 must include instructions that transfer data between memory and registers. Such instructions are called data transfer instructions

Dynamically linked libraries (DLLs):

Library routines that are linked to a program during execution. Not before.

To identify the type of file, UNIX follows a suffix convention for files: C source files are named x.c, assembly files are x.s, object files are named x.o, statically linked library routines are x.a, dynamically linked library routes are x.so, and executable files by default are called a.out.

MS-DOS uses the suffixes .C, .ASM, .OBJ, .LIB, .DLL, and .EXE to the same effect.

To access a word or doubleword in memory, the instruction must supply the memory address.

Memory is just a large, single-dimensional array, with the address acting as the index to that array, starting at 0.

Addressing mode:

One of several addressing regimes delimited by their varied use of operands and/or addresses. Multiple forms of addressing are generically called addressing modes.

There are three steps for the linker:

Place code and data modules symbolically in memory. Determine the addresses of data and instruction labels. Patch both the internal and external references.

the instruction format above is called:

R-type ( for resister ) or R-format

The loader follows these steps in UNIX systems:

Reads the executable file header to determine size of the text and data segments. Creates an address space large enough for the text and data. Copies the instructions and data from the executable file into memory. Copies the parameters (if any) to the main program onto the stack. Initializes the processor registers and sets the stack pointer to the first free location. Branches to a start-up routine that copies the parameters into the argument registers and calls the main routine of the program. When the main routine returns, the start-up routine terminates the program with an exit system call.

Pop:

Remove element from stack.

object file

The assembler turns the assembly language program into an object file, which is a combination of machine language instructions, data, and information needed to place instructions properly in memory.

4. PC-relative addressing:

The branch address is the sum of the PC and a constant in the instruction

branch register instruction (BR),

The branch table is therefore just an array of doublewords containing addresses that correspond to labels in the code. The program loads the appropriate entry from the branch table into a register. It then needs to jump using the address in the register. To support such situations, computers like LEGv8 include a branch register instruction (BR), meaning an unconditional branch to the address specified in a register.

Stored-program concept:

The idea that instructions and data of many types can be stored in memory as numbers and thus be easy to change, leading to the stored-program computer.

The linker uses:

The linker uses the relocation information and symbol table in each object module to resolve all undefined labels.

Just In Time compiler (JIT) :

The name commonly given to a compiler that operates at runtime, translating the interpreted code segments into the native code of the computer.

1. Immediate addressing:

The operand is a constant within the instruction itself

2. Register addressing:

The operand is a register

3. Base addressing / displacement addressing:

The operand is at the memory location whose address is the sum of a register and a constant in the instruction

spilling registers

The process of putting less commonly used variables (or those needed later) into memory

How can a computer represent and access large data structures like arrays?

The processor can keep only a small amount of data in registers, but computer memory contains billions of data elements. Hence, data structures (arrays and structures) are kept in memory.

Caller:

The program that instigates a procedure and provides the necessary parameter values.

Text segment:

The segment of a UNIX object file that contains the machine language code for routines in the source file.

Instruction set:

The vocabulary of commands understood by a given architecture.

load exclusive register (LDXR) store exclusive register (STXR)

These instructions are used in sequence: if the contents of the memory location specified by the load exclusive are changed before the store exclusive to the same address occurs, then the store exclusive fails and does not write the value to memory. The store exclusive is defined to both store the value of a (presumably different) register in memory and to change the value of another register to a 0 if it succeeds and to a 1 if it fails. Thus, STXR specifies three registers: one to hold the address, one to indicate whether the atomic operation failed or succeeded, and one to hold the value to be stored in memory if it succeeded.

In many architectures, words must start at addresses that are multiples of 4 and doublewords must start at addresses that are multiples of 8.

This requirement is called an _alignment restriction_. ARMv8 and Intel x86 do not have alignment restrictions, but ARMv7 and MIPS do.

The hardware principle relating size and speed suggests that memory must be slower than registers, since there are fewer registers.

This suggestion is indeed the case; data accesses are faster if data are in registers instead of memory.

The big picture.

Today's computers are built on two key principles: 1. Instructions are represented as numbers. 2.Programs are stored in memory to be read or written, just like data. These principles lead to the stored-program concept; its invention let the computing genie out of its bottle. The following figure shows the power of the concept; specifically, memory can contain the source code for an editor program, the corresponding compiled machine code, the text that the compiled program is using, and even the compiler that generated the machine code. One consequence of instructions as numbers is that programs are often shipped as files of binary numbers. The commercial implication is that computers can inherit ready-made software provided they are compatible with an existing instruction set. Such "binary compatibility" often leads industry to align around a small number of instruction set architectures.

Data race:

Two memory accesses form a data race if they are from different threads to same location, at least one is a write, and they occur one after another. where the results of the program can change depending on how events happen to occur.

LEGv8 software follows the following convention for procedure calling in allocating its 32 registers:

X0-X7: eight parameter registers in which to pass parameters or return values. LR (X30): one return address register to return to the point of origin.

To avoid saving and restoring a register whose value is never used, which might happen with a temporary register, LEGv8 software separates 19 of the registers into two groups:

X9 - X17: temporary registers that are not preserved by the callee (called procedure) on a procedure call X19 - X28: saved registers that must be preserved on a procedure call (if used, the callee saves and restores them)

AND

a bit by bit operations with two operands that leaves 1 only if there are 1's in each spot.

A sign and magnitude representation is:

a signed number representation where a single bit is used to represent the sign, and the remaining bits represent the the magnitude. abandoned.

ADDI

add immediate. allows the third variable to be a constant without having to load one from memory. faster

Procedure:

aka function. A stored subroutine that performs a specific task based on the parameters with which it is provided.

in twos complement:

all 1's is -1

atomic exchange or atomic swap

an operation for building synchronization operations which interchanges a value in a register for a value in memory.

Design Principle 1: Simplicity favors regularity.

better to have three spots for addition and have to add more than once to promote regularity.

BR

branch register instruction

CBZ

combare and branch if zero

3.13 C sort example

skipped for now

LEGv8 instruction format B-type

instruction format used.

The LEGv8 assembly language notation ADD a, b, c

instructs a computer to add the two variables b and c and to put their sum in a. see diagram. not it takes longer to add four variables

shortcuts for twos complement

invert every bit, and add one to the result.

procedures that do not call others are called:

leaf procedures

Architects long ago figured out how to handle all these cases by keeping just four extra bits that record what occurred during an instruction. These four added bits, called condition codes or flags are named:

negative (N) - the result that set the condition code had a 1 in the most significant bit; zero (Z) - the result that set the condition code was 0; overflow (V) - the result that set the condition code overflowed; and carry (C) - the result that set the condition code had a carry out of the most significant bit or a borrow into the most significant bit.

ATOMICALLY read and modify a memory location

nothing else can interpose itself between the read and the write of the memory location

Java was invented with different goals.

one being to run on any computer even if slower

LEGv8 fields

opcode : Basic operation of the instruction, and this abbreviation is its traditional name. (field that denotes the operation and format of an instruction) 11 bits Rm: The second register source operand. 5 bits shamt: Shift amount. 6 bits Rn: The first register source operand. 5 bits Rd: The register destination operand. It gets the result of the operation. 5 bits

3.6 logical operations.

other operations

f the number that is the proper result of such operations cannot be represented by these rightmost hardware bits:

overflow is said to have occurred. It's up to the programming language, the operating system, and the program to determine what to do if overflow occurs.

stored-program concept means:

programs are stored in memory along with data.

LR

register 30 (one return address register to return to point of origin)

remember. register XZR is

register X31, and always has a value of 0 in LEGv8 through hardware, programmers can't change it.

The animation below illustrates the load instruction. Assume that A is an array of 100 doublewords. We'll be making a slight adjustment to the LDUR instruction, but we'll use the below simplified version for now. In an LDUR instruction, a base address is the starting address of an array in memory (5000 below), a base register is a register that holds an array's base address (X22 below), and an offset is a constant value added to a base address to locate a particular array element (8 below).

see pic.

LEGv8 assembly language revealed in this chapter

see table 3.2.2

Registers are primitives used in hardware design that are also visible to the programmer when the computer is completed, so you can think of registers as the bricks of computer construction.

see vid at. https://www.youtube.com/watch?v=fpnE6UAfbtU a group of latches operating [with the input and readwrite input and a memory output] is called a register, which holds a single number, and the number of bits in a register is called its width

registers are much much faster and energy efficient then RAM and DRAM

these large differences led to caches, which take advantage of this.

Unlike programs in high-level languages, the operands of arithmetic instructions are restricted;

they must be from a limited number of special locations built directly in hardware called registers. an operand is the quantity on which an operation is to be done.

remember the ADD (and other) instruction expects

three REGISTER operands

LEGv8 dedicates a register XZR

to be hard-wired to the value zero. (It corresponds to register number 31.) the constant zero provides useful variations to the instruction set.