cs2450 final review

How many clock cycles does the LC-3 microarchitecture take to perform the fetch stage?

3

How many memory accesses are required for the processing of an LDI instruction?

3

If there are 225 opcodes and 120 registers, what is the maximum number of UNUSED bits in the instruction encoding?

3

What is the maximum value that can be represented in 2 bits for A (A[1:0])? (In other words, what is the maximum value that can be represented in unsigned 2 bits?)

3

How many AND gates are needed to implement a 5 input decoder?

32

Consider the memory in Figure 3.42 (problem 3.34) in your text. What is the addressability?

4

How many select lines are needed to select the output of a 16 input multiplexer?

4

Assume a memory with an addressability of 8-bits and an address space of 16. How many address lines are needed to implement this memory? How many data lines?

4,8

If there are 80 opcodes and 32 registers, how many bits are needed for the DR (destination register) field?

5

Suppose an instruction set is designed so that each instruction is 16 bits, 6 bits are reserved for the opcode, 5 bits are reserved for a destination register and 5 bits are reserved for a source register. What is the maximum number of opcodes that can be represented in this instruction set?

64

For the instruction: ADD R3, R2, R1or in binary: 0001 011 010 000 001which of the ALU inputs (A or B) will receive the value of R1?

B

Give an example instruction (just one example) that causes the multiplexer in figure 5.18 whose control signal is labeled ADDR2MUX to choose its second to the leftmost input (the one coming from [8:0] SEXT)

BR

Consider the multiple in figure 3.13. What is the output (A, B, C, or D) of the multiplexer (OUT), if the input on S1 and S0 is 10 (S1 = 1, S0 = 0)?

C

The total number of uniquely identifiable locations in a memory is known as the memory's

address space

The number of bits stored in each memory location of a memory is known as the memory's

addressability

The combinational circuit that is part of the processing unit which performs arithmetic is known as the

arithmetic logic unit

A circuit whose output depends only upon current input (that is, it always gives the same output for a given set of inputs) is

combinational circuit

A full-adder is an example of

combinational circuit

In figure 5.18, what are those lines with unfilled arrow heads called? (These lines cause certain behavior to happen, for example, allow a value to be loaded into a register or the ALU to perform a certain computation.)

control lines

Suppose the instruction involved is an ADD instruction. In which phases is the MAR register written to?

fetch

Suppose the instruction involved is an ADD instruction. In which phases is the PC register written to?

fetch

Suppose the instruction involved is an JMP instruction. In which phases is the IR register written to?

fetch

Suppose the instruction involved is an JMP instruction. In which phases is the MDR register written to?

fetch

Suppose the instruction involved is an LDR instruction. In which phases is the PC register written to?

fetch

Suppose the instruction involved is an JMP instruction. In which phases is the PC register written to?

fetch, execute

Suppose the instruction involved is an LDR instruction. In which phases is the MDR register written to?

fetch, fetch operands

In which clock cycle of the fetch phase is the PC updated? (Answer: first, second, third, fourth, fifth, sixth, seventh, eighth, or ninth)

first

Probably the most significant contribution of John Von Neumann is the paper he wrote describing the stored program computer. A stored program computer is one in which

instructions and data are both stored in memory

Which of the following SOP equations expresses what the circuit computes?

((NOT A) AND B) OR (A AND (NOT C))

ABCD + AB(C)'D + A(B)'(C)'(D)' + A(B)'C(D)'

(A AND B AND D) OR (A AND (NOT B) AND (NOT D))

Consider the memory in Figure 3.42 (problem 3.34) in your text. What is the data at address 2? Give your answer in decimal.

1

How many memory accesses are required for the processing of an LEA instruction?

1

How many outputs does a 16-input multiplexer have?

1

This is based upon problem 3.43 in your text book. Which of the following is the list of values that would appear in the D0 column in the truth table (top to bottom)?

0, 0, 0, 0, 1, 1, 0, 0

What are the values in the O column (top to bottom)?

0, 0, 0, 0, 1, 1, 1, 1

What are the values in the D1 column (top to bottom)?

0, 0, 0, 1, 0, 1, 0, 0

In other words, provide the value of Znext in the table

0, 0, 0, 1, 1, 1, 0, 1

This is based upon problem 3.43 in your text book. Which of the following is the list of values that would appear in the D1 column in the truth table (top to bottom)?

0, 0, 0, 1, 1, 1, 1, 1

((A)'+B)' = A(B)'

0, 0, 1, 0

What are the values in the Y column (top to bottom)?

0, 0, 1, 1, 0, 0, 1, 1

This is based upon problem 3.43 in your text book. Which of the following is the list of values that would appear in the Z column in the truth table (top to bottom)?

0, 0, 1, 1, 1, 1, 1, 1

What are the values in the D0 column (top to bottom)?

0, 1, 0, 0, 0, 1, 0, 1

What are the values (top to bottom) for Y[2]?

0,0,0,0,0,0,0,0,0,0,1,1,0,0,1,0

Consider the following LC-3 instruction0001 0010 0110 0001Referring to figure 5.18, what value will be produced by the combinational circuit that performs sign extension of the immediate value?

0000 0000 0000 0001

Consider the following LC-3 instruction0001 0010 0110 1001Referring to figure 5.18, what value will be produced by the combinational circuit that performs sign extension of the immediate value?

0000 0000 0000 1001

What is the binary value in location 3?

0100 0111 0100 1111

What is the function of the tristate device labeled GatePC?

Allows the value of the PC onto the global bus

The operation performed by the CPU when it writes a value to a location in memory is known as a:

store

In figure 5.18, which of the following labels are labels of components that are combinational logic circuits?

+1, pcmux, alu

If there are 100 opcodes and 64 registers, what is the range of values that can be represented by the immediate (IMM)? Assume IMM is a two's complement value.

-4096 through 4095

Which of the following set of operations is logically complete?

-NAND -NOR -OR, NOT

what are the values in column D in this truth table corresponding to the circuit in problem 3.6?

1,0,1,0

what are the values in column C in this truth table corresponding to the circuit in problem 3.6

1,1,0,0

Consider the following LC-3 instruction0001 0010 0111 0001Referring to figure 5.18, what value will be produced by the combinational circuit that performs sign extension of the immediate value?

1111 1111 1111 0001

Consider the following LC-3 instruction0001 0010 0111 1001Referring to figure 5.18, what value will be produced by the combinational circuit that performs sign extension of the immediate value?

1111 1111 1111 1001

How many AND gates are needed to implement a 16 input multiplexer?How many OR gates?

16,1

How many memory accesses are required for the processing of an LD instruction?

2

How many memory accesses are required for the processing of an LDR instruction?

2

What advantage does the Gated D latch provide over the R-S latch?

All inputs to the Gated D latch are valid

If there are 225 opcodes and 120 registers, what is the minimum bits required to represent the destination register (DR)?

7

If there are 80 opcodes and 32 registers, how many bits are needed for the OPCODE field?

7

How many outputs does a 3 input decoder have?

8

If there are 225 opcodes and 120 registers, what is the minimum bits required to represent the OPCODE?

8

What is the maximum possible value for Y?

9

AB + A(B)' + AC

A

ABCD + AB(C)'D + A(B)'(C)'D + A(B)'CD

A AND D

Give an example instruction (just one example) that causes the SR2MUX multiplexer in figure 5.18 to choose its leftmost input (the one coming from [4:0] SEXT)

ADD

This problem is based on problem 3.6 in your textbook. Please refer to the figure in that problem. What operation (AND, OR, NOT, XOR, NAND, or NOR) does this circuit compute?

AND

This problem is based upon problem 3.43 in your textbook. Which of the following is the SOP expression for D0?

D0 = (NOT S0) AND S1

This problem is based upon problem 3.43 in your textbook. Which of the following is the SOP expression for D1?

D1 =(X AND S0) OR S1

This problem is based on problem 3.4 in your textbook. Refer to the figure in that problem. What inputs to the circuit will cause C to produce an output value of 0?

Either A = 1 or B = 1 or both

The sequential circuit that is used to store the instruction currently being executed is known as the

IR

In figure 5.18, what is the component labeled +1?

It is a combinational circuit that outputs the value of its input + 1

In figure 5.18, what is the component with the label +?

It is a combinational circuit used for evaluating the address

In figure 5.18, what is the function of the component SEXT[10:0]?

It sign extends an 11 bit immediate value coming from the IR

The register that holds the address of a location in memory being read from or written to is the

MAR

Which of the following is equivalent to A NOR B?

NOT(A OR B), (NOT A) AND (NOT B)

A short description of the behavior of the circuit in problem 3.27 is:

The circuit stores the value of A when S is set to 0

In figure 5.18, what are the lines labeled DR?

These are control lines that specify the destination register for a result.

This problem is based upon problem 3.43 in your textbook. Which of the following is the SOP expression for Z?

Z = S1 OR S0

In figure 5.18, which of the following labels are labels of control signals that enable a value to be loaded into a register?

ld.ir, ld.reg

The three main components of a von Neumann machine are:

memory, processing unit, control unit

The type of transistor that acts like a piece of wire when its gate is supplied with 2.9 volts (logical 1) is a/an (n-type or p-type)

n-type

The portion of an instruction that specifies the action to be performed is known as the

opcode

An instruction also specifies data to be used by an operation. This data is known as the

operand

A set of logic operations (size of set could be 1) is logically complete if:

operations in set can be used to compute AND, OR and NOT

The type of transistor that acts like a piece of wire when its gate is supplied with 0 volts (logical 0) is a/an (n-type or p-type)

p-type

In figure 5.18, which of the following labels are labels of components that represent sequential logic circuits or a storage element?

pc, finite state machine, reg file

Which of the following labels in the figure 5.18 are labels of multiplexers?

pcmux, sr2mux

The sequential circuit that is used to store the address of the next instruction is known as the

program counter

A sequential circuit that is part of the processing unit which is used only for storage is known as a

register

A circuit whose output depends upon a current state as well as current input is

sequential circuit

An R-S latch is an example of

sequential circuit

A byte-addressable memory is one in which

the size of each location is a byte