CSC 242

Pataasin ang iyong marka sa homework at exams ngayon gamit ang Quizwiz!

Is there a sequence of LC-3 instructions that will cause the condition codes at the end of the sequence to be N = 1, Z = 1, and P = 0?

No. The result of an operation will never have more than one condition code set so it is not possible to have both negative and zero set.

ADD

Operate

NOT

Operate

For the JMP instruction, indicate the addressing mode(s) that can be used.

Register

For the NOT instruction, indicate the addressing mode(s) that can be used.

Register

Register

Register

Which addressing mode is used by the instruction 0001 010 000 0 00 001

Register

For the ADD instruction, indicate the addressing mode(s) that can be used.

Register, Immediate

What is an addressing mode?

Specifies the location of the operand

Memory

Storage of information (data/program)

Store Result

Write the result of the operation to memory or register

Answer the following questions given the values of registers and memory: Registers: R1: x7FFF R2: xA0A0 R3: x1111 R4: x3101 Memory x3100 x0000x3101 x6D32x3102 x8123 List the condition codes after the execution of each of the questions. The condition code prior to executing the instruction is Z, CC: Z. Treat each question independently of the others, i.e. CC: Z prior to the execution of the instructions. CC is either N, Z, or P for all the questions. Remember to capitalize. 0110 110 100 111111 CC: HINT: Sign extension required 0001 110 001 1 00001 CC: 1001 110 010 111111 CC:

Z N P

Convert problem statement into _____ using ______refinement.

algorithm, stepwise

Refer to the table below. The binary value within each location can be interpreted in many ways. We have seen that binary values can represent unsigned numbers, 2's complement signed numbers, floating point numbers and so forth. Interpret location 4 as an ASCII value.

e

single stepping

execute one instruction at a time

logic errors

generate wrong results but legal

data errors

input data is different than expected

List the three constructs to decompose a task:

iterative, sequential, conditional

Input

means of getting data into the computer

Execute

perform the calculation necessary for the instruction

Output

representation of data

breakpoints

simulator command to stop executing when reaching a specific instruction

watchpoints

stop simulator when a location/memory location are changed or equals a value

Systematic decomposition purpose is to break down the problem into simpler _______________.

subtask

Stepwise refinement is also known as _______________ decomposition.

systematic

syntax errors

typing errors resulting in an illegal operation

Suppose a 32-bit instruction takes the following format: OPCODE | SR | DR | IMM. If there are 80 opcodes and 32 registers, what is the range of values that can be represented by the immediate (IMM)? Assume IMM is a 2's complement value.

-16384 to 16383

Refer to the table below. The binary value within each location can be interpreted in many ways. We have seen that binary values can represent unsigned numbers, 2's complement signed numbers, floating point numbers and so forth. Interpret location 1 as a 2's complement decimal integer. Note: Do not include commas or periods or + symbol if the signed decimal number is positive.

-4059

We would like to have an instruction that does nothing. Many ISAs actually have an opcode devoted to doing nothing. It is usually called NOP, for NO OPERATION. The instruction is fetched, decoded, and executed. The execution phase is to do nothing! Which of the following three instructions could be used for NOP and have the program still work correctly?

0000 000 000000000

Refer to the table below. What 16-bit binary value does location 3 contain? Note: Answer should group the bits in 4's or a nibble, e.g. 1111 0000 1111 0000. There is a space between each nibble. This adds to clarity of your input. If you don't include the spacing as described this will be marked incorrect.

0000 0000 0000 0000

You're tasked to write a LC3 program to determine if a number is stored in at memory location x30FF is even or odd. In order to complete this task you must first copy the contents of memory location x30FF to a register using a data movement instruction. To determine if a value is even or odd, you only need to check to see if the LSB (bit 0) is 0 (even) or 1 (odd). R7 = 1 if odd and R7 = 0 if even. Fill in the missing pieces of the program. NOTE: First answer is 6 bits and second is 4 bits. R0: x30FF R1: x0001, R7:x0000 x30000110010000XXXXXx30010101010010100001x3002ZZZ111111000010

000000 0001

Using only one LC-3 instruction and without changing the contents of any register, how might one set the condition codes based on the value that resides in R1? NOTE only select instructions alter the condition code. These instructions are instructions that modify a register. So how do you modify a register without changing it or any other register. There are two instructions that can be used to do this.

0001 001 001 1 00000

How might one use a single LC-3 instruction to move the value in R2 into R3?

0001 011 010 1 00000

The figure below shows a snapshot of the 8 registers of the LC-3 before and after an instruction is executed. Determine what instruction caused the new register state. HINT: Look at the register that has changed values after instruction executed. How can you get the changed value based on the other registers either with an add, not, and. Remember you can add two registers or add an IMM5 value to a register. The IMM5 has a range so, it can be negative, zero, or positive within that range. RegisterBeforeAfterR0x0000x0000R1x1111x1111R2x2222x2222R3x3333x3333R4x4444x4444R5x5555x5555R6x6666x1102R7x7777x7777

0001 110 001 1 10001

An LC-3 program is located in memory from x3000 to x3006. It starts executing at x3000. If we keep track of all values loaded into the MAR as the program executes, we will get a sequence that starts as follows. Such a sequence of values is referred to as a trace. The trace says, that during execution of instruction at x3000, memory is access at x3005, then x3001 and so on. What type of instruction will cause the a memory access at PC (x3001+0004) locations away? This is your hint for the instruction, which must be a data movement instruction. MAR Trace x3000 x3005 x3001 x3002 x3006 x4001 x3003 x0021 We have shown below some of the bits stored in locations x3000 to x3006. Your job is to fill in each line with the appropriate 0's or 1's to match the MAR trace output. x30000010000x30010001000000100001x30021011000x3003x30041111000000100101x30050000000000110000x3006 FORMAT: xxxx yyyy xxxx yyyy (enter the full 16-bit instruction in nibbles) Enter the new lines below:x3000x30010001000000100001x3002x3003x30041111000000100101x30050000000000110000x3006

0010 0000 0000 0100 1011 0000 0000 0011 1111 0000 0010 0001 0100 0000 0000 0001

Recall the machine busy example from Section 2.7.1. Assuming the BUSYNESS bit vector is stored in R2, we can use the LC-3 instruction 0101 011 010 1 00001 (AND R3, R2, #1) to determine whether machine 0 is busy or not. If the result of this instruction is 0, then machine 0 is busy. Write an LC-3 instruction that determines if none of the machines are busy. Use R0 as the destination register and R2, of course, as the BUSYNESS bit vector. The format should be used from above for the AND instruction. This boils down to how you embed the in the instruction the appropriate immediate value. In this case you want to check all of the bits to see if they are on. NOTE: enter your answer in machine instruction, i.e. 16 bit binary. You can use the format from the book for the instruction or 16-bits with no spacing.

0101 000 010 1 11111 The immediate 5 will be sign extended: 1 1111 ==> 1111 1111 1111 1111. ANDing R2 with 1111 1111 1111 1111 will produce 0's at bit positions corresponding to a busy machine.

Write an LC-3 instruction that clears the contents of R2.

0101 010 010 1 00000

Recall the machine busy example from Section 2.7.1. Assuming the BUSYNESS bit vector is stored in R2, we can use the LC-3 instruction 0101 011 010 1 00001 (AND R3, R2, #1) to determine whether machine 0 is busy or not. If the result of this instruction is 0, then machine 0 is busy. Write an LC-3 instruction that determines whether machine 2 is busy.

0101 011 010 1 00100

Recall the machine busy example from Section 2.7.1. Assuming the BUSYNESS bit vector is stored in R2, we can use the LC-3 instruction 0101 011 010 1 00001 (AND R3, R2, #1) to determine whether machine 0 is busy or not. If the result of this instruction is 0, then machine 0 is busy. Write an LC-3 instruction that determines whether both machines 2 and 3 are busy. NOTE: machines 0 - 7

0101 011 010 1 01100

Complete the following questions, given R3 contains 0111 0000 0000 0000 (x7000). Fill in the missing part of the instruction to shift left 1-bit the contents of R3. Of course the shifted value should reside in R3. Instruction: 0001 011 011 0 00 Format XXX Which condition code will be set after the execution of the shift instruction from above? N, Z, or P. CC= FORMAT capital letter N, Z or P

011, N

Shown below are the contents of memory and registers before and after the LC-3 instruction at location x3010 is executed. Your job: Identify the instruction stored in x3010. Note: There is enough information below to uniquely specify the instruction x3010. Registers: BeforeAfterR0:x3208x3208R1:x2d7cx2d7cR2:xe373xe373R3:x2053x2053R4:x33ffx33ffR5:x3f1fx3f1fR6:xf4a2xf4a2R7:x5220x5220 Memory: BeforeAfter...x3400:x3001x3001x3401:x7a00x7a00x3402:x7a2bx7a2bx3403:xa700xa700x3404:xf011xf011x3405:x2003x2003x3406:x31bax2053x3407:xc100xc100x3408:xefefxefef...

0111 011 100 000111

The LC-3 has no subtract instruction. How could one perform the following operation using only three LC-3 instructions: R1 <- R2 - R3

1001 011 011 111111 0001 011 011 1 00001 0001 001 010 0 00 011

Refer to the table below. A binary value can also be interpreted as a memory address. Say the value stored in location 5 is a memory address. Using the location determined in the previous answer, what 16-bit binary value does that location contain? Report answer in nibbles (4bits followed by space, XXXX XXXX XXXX XXXX).

1111 1110 1101 0011

Refer to the table below. What 16-bit binary value does location 6 contain? Note: Answer should group the bits in 4's or a nibble, e.g. 1111 0000 1111 0000. There is a space between each nibble. This adds to clarity of your input. If you don't include the spacing as described this will be marked incorrect. AddressData 0000 0001 1110 0100 001100011111 0000 0010 010100100110 1111 0000 000100110000 0000 0000 000001000000 0000 0110 010101010000 0000 0000 011001101111 1110 1101 001101110000 0110 1101 1001

1111 1110 1101 0011

If the computer requires on average two cycles to process each instruction and the frequency is 250,000,000 cycles/second. How many instructions can the computer process in 1 second? You may specify your answer in normal notation. Do not use commas or other separators.

125000000

Suppose a 32-bit instruction takes the following format: OPCODE | DR | SR1 | SR2 | UNUSED. If there are 259 opcodes and 120 registers, what is the maximum number of UNUSED bits in the instruction encoding?

2

If a machine cycle is 4 nanoseconds (i.e., 4e-9 seconds), how many machine cycles occur each second? You may specify your answer in normal notation. Do not use commas or other separators. E.g. answer: 3240000

250000000

Refer to the table below. A binary value can also be interpreted as a memory address. Say the value stored in location 5 is a memory address. To which location does it refer?

6

Say we have a memory consisting of 256 locations, and each location contains 16 bits. If a control instruction is in location 3, what is the PC-relative offset of address 10? Assume that the control transfer instructions work the same way as the LC-3. NOTE PC Relative is PC + offset. Provide the offset value in integer not binary.

6

Say we have a memory consisting of 256 locations, and each location contains 16 bits. If we use the PC-relative addressing mode, and want to allow control transfer between instructions 20 locations away, how many bits of a branch instruction are needed to specify the PC-relative offset?

6

Refer to the table below. The binary value within each location can be interpreted in many ways. We have seen that binary values can represent unsigned numbers, 2's complement signed numbers, floating point numbers and so forth. Interpret location 1 as an unsigned integer.

61477

Suppose a 32-bit instruction takes the following format: OPCODE | DR | SR1 | SR2 | UNUSED. If there are 259 opcodes and 120 registers, what is the minimum number of bits required to represent the Destination Register (DR)?

7

Refer to the table below. The binary value within each location can be interpreted in many ways. We have seen that binary values can represent unsigned numbers, 2's complement signed numbers, floating point numbers and so forth. Interpret location 0 as a 2's complement decimal integer. Note: Do not include commas or periods or + symbol if the signed decimal number is positive.

7747

Refer to the table below. The binary value within each location can be interpreted in many ways. We have seen that binary values can represent unsigned numbers, 2's complement signed numbers, floating point numbers and so forth. Interpret location 0 as an unsigned decimal integer. Note: Do not include commas or periods or + symbol if the signed decimal number is positive.

7747

Say we have a memory consisting of 256 locations, and each location contains 16 bits. How many bits are required for the address? ___ bits are required. Use integer to report answer.

8

Suppose a 32-bit instruction takes the following format: OPCODE | DR | SR1 | SR2 | UNUSED. If there are 259 opcodes and 120 registers, what is the minimum number of bits required to represent the OPCODE?

9

Which of the two algorithms for multiplying two numbers is preferable and why? A. 88 * 3 = 88+88+88 B. 88 * 3 = 3+3+3+3+....+3

A

Refer to the table below. In the von Neumann model, the contents of a memory location can also be an instruction. If the binary pattern in location 0 were interpreted as an instruction, what instruction would it represent?

ADD

Which LC3 instruction can be used to shift a word (16-bits) left?

ADD

Evaluate Address

Calculate the address of the memory location needed to process the instruction

Processing Unit

Computation of information

JMP

Control

LEA

Data Movement

Control Unit

Ensures all other parts perform their tasks

Recall the machine busy example from Section 2.7.1. Assuming the BUSYNESS bit vector is stored in R2, we can use the LC-3 instruction 0101 011 010 1 00001 (AND R3, R2, #1) to determine whether machine 0 is busy or not. If the result of this instruction is 0, then machine 0 is busy. True/False: It is possible to write an LC-3 instruction that determines whether machine 6 is busy while not checking any of the other machines, i.e. a busy mask of 0000 0000 0100 0000.

False

Fetch

Get instruction from memory. Increment the PC.

Fetch Operands

Get the source of the operands

For the LEA instruction, indicate the addressing mode(s) that can be used.

Immediate

Name three places an instruction's operands might be located.

Immediate, Register, Memory

The FETCH phase of the instruction cycle does two important things. One is that it loads the instruction to be processed next into the IR. What is the other important thing?

Increments PC

Immediate

Instruction

What is a more appropriate name for the Program Counter? (I.e, a name better suited for the task of the PC)

Instruction Pointer

Decode

Interpret the instruction by passing the OPCODE through a 4-to-16 decoder.

We wish to execute a single LC-3 instruction that will subtract the decimal number 20 from register 1 and put the result into register 2. Choose the instruction below that accomplishes this.

It is not possible

Base + Offset

Memory

Direct memory

Memory

Indirect Memory

Memory


Kaugnay na mga set ng pag-aaral

The Legal Environment of Business Chapter 19

View Set

1320 PREP U ch 8 the labor process

View Set

Cancer (1) A- Hallmarks of Cancer

View Set

Chapter 70: Management of Patients With Oncologic or Degenerative Neurologic Disorders

View Set

Ch.5.3 Helpdesk: Starting the Computer: The Boot Process

View Set

cisco networking modules 8-10 communications exam

View Set

OB - Ch 24: Nursing Management of the Newborn at Risk: Acquired and Congenital Newborn Conditions (PrepU Questions)

View Set

Insurance CH 1 : Application, Underwriting, Application delivery

View Set