CSCE 312 - Midterm Review - Q1-4, P1-3
Using only DMUX8's, what is the minimum number of DMUX8's chips needed to create a RAM512?
(512/8) = 64; (64/8) = 8; (8/8) = 1; 64+8+1=73. 73 DMUX8's.
In sequential design, the next state is a function of (I) _____ and (II) _____.
(I) Inputs and (II) Present State
You may drop leading ___'s in Hex, Decimal, and Octal Representations.
0's.
What does the following term simplify to?: (CC')
0, this will always be false.
What is the prefix for numbers represented in hexadecimal?
0x______
How many half-adder slices can you use in a 32-bit adder employed to add two 32-bit binary numbers?
1
What does the following term simplify to?: (C+C').
1, this will always be true.
What is the output for the following?: F=(ab)+c+d; where a=1, b=0, c=1, d=1.
1.
Hexadecimal representations: 0=0 1=1, 2=2, 3=3 4=4, 5=5, 6=6, 7=7, 8=8, 9=9, 10=?, 11=?, 12=?, 13=?, 14=?, 15=?.
10 = A, 11 = B, 12 = C, 13 = D, 14 = E, 15 = F.
Unsigned decimal: 9 Binary: ???
1001
In a RCA10 built solely with RCA6, the adder slice from which cout (overflow) is drawn is:
10; 0..9 will tell you the sum and the next one, pin10, will give the overflow
Binary: 1011 Unsigned Decimal: ???
11
What is the result of adding the following two 6-bit binary numbers in binary: 010101 + 01110?
110011
How many DFF's will be needed to make a 16-bit RAM16?
16*16=256.
The number of DFF's needed to construct a RAM16 composed of 8-bit registers is
16*8=128
How many carry out's are generated when adding the numbers 7 and 2 in binary?
2
What is the maximum value possible represented by a 5-bit unsigned binary number?
31
Unsigned decimal: ??? Binary: 100000
32
Assuming all logic gate delays are 1ns, the delay of a 16-bit RCA that uses only full adders is:
32ns. Since 16 * 2ns = 32ns.
How many RCA4's will you need to construct a 4-input 4-bit adder?
3; 2 RCA4's to add a+b and c+d and one more to add (a+b)+(c+d).
Binary: 100 Unsigned decimal: ???
4
The minimum number of RCA8's needed to construct a RCA25 built solely with RCA8's is:
4
How many MUX Select lines do we need to implement a MUX32Way with 32 inputs?
5 = (log_2(32))
A 16-bit RAM32 would need a ___-bit wide address input.
5-bit wide. Log_2(32) = 5.
Assuming an AND gate has a delay of 2ns, and an OR gate has a delay of 3ns, and assuming the inputs are present at the same time (t=0), the logic delay of the carry out pin of a full adder will be:
5ns
How many rows will you need in the truth table to completely specify the adder function to add two 3-bit numbers?
64 = 2^(3+3 input columns) = 2^6 = 64
The number of MUX-2's needed to construct a 8-bit register using DFF's is:
8; each DFF in a register gets it's input from a MUX, thus you need 8 MUX's for all 8 DFF's.
Simplify the Boolean Expression: A+AB
A
Compared to a full-adder, a half adder lacks __________.
A carry-in pin, c.
Distributive Law in Boolean Algebra
A+A'B = (A+A')(A+B) = A+B
Simplify the Boolean Expression: A+A'B
A+B
Simplify the Boolean Expression: A+A'B+B'C
A+B+C
Let F=A'B'+AB, what is the simplified Boolean Expression for F'= ?
AB'+A'B
Commutative Law in Boolean Algebra
ABC' = AC'B = C'AB = C'BA. I.e. the order does not matter (this isn't matrix multiplication, lol)
Logic where the outputs are a function of their inputs and do not depend on the prior state of the output(s).
Combinational Logic
What does the width of address inputs for RAM chips depend on and what does it not depend on?
It does depend on the number of registers (i.e. a 32-bit RAM16 has 16 registers); it does not depend on the bit-size of the RAM.
What does a DMUX in a RAM chip do?
It is attached to the load input and connects the load inputs of the RAM's registers.
NOR Gates are sensitive to:
Logic 1; if any of it's inputs are 1, the output is 0 regardless of the other inputs; i.e. the only case where the output is 1 is when both input values are 0.
What type of logic would be desired in a situation where an alarm should go off when just one out of many motion sensors is detected?
OR
[2]NOR[1] -> [1]NOR[1] = _____
OR
What is the method in which you represent a negative number in Two's Complement?
Represent the abs(num) in binary; flip the number's bits, add 1 to the lsb.
Logic where the outputs are a function of the inputs and the prior state of the outputs.
Sequential Logic
Explain the difference between combinational and sequential logic circuits?
Sequential also depends on the current state of input.
How are Period and Frequency related?
T = 1/F F = 1/T
What is the quick solution to the following problem: a car has a low-tire pressure sensor that outputs the current tired pressure as a 5-bit binary number; create a circuit using logic gates that illuminates the indicator light when the pressure drops below 16.
T = In[4]' Since if the 5th bit, In[4], is 0 the light should be on, otherwise it should be off.
In a vending machine that is operated with coins only, a drink is dispensed for $0.25. Assuming denominations of nickel, dime, and quarters (no pennies!), how many bits would be necessary to represent all possible states?
There are 6 states so 2^3=8 is the minimum number of representations, i.e., 3 bits are necessary.
In a vending machine that is operated with coins only, a drink is dispensed for $0.25. Assuming denominations of nickel, dime, and quarters (no pennies!), how many states are possible in a state diagram created to model the controller of the vending machine? Initial state = 0.
Total 6 states: 0, 5, 10, 15, 20, 25.
To design an adder with ALL Full-adder slices all we need to do is to connect a 0 to the CarryIn 'C' pin of the full adder at the LSB position.
True
True or False: A single bit typically delays by a single clock cycle.
True
True or False: The next state in a state machine is both a function of its present state and its inputs. In some state machines, for example in simple clocked counters, next state is only a function of its current state.
True.
What is DeMorgan's Law?
When distributing, it looks like this: (ab)'=(a'+b'), (a+b)'=(a'b').
F= A'B' + AB represents what logic?
XNOR
F = AB' + A'B represents what logic?
XOR
There is a circuit box that has the special property that if you know the value of one of the inputs then you can always guess the value of the other inputs; what logic gate does this simulate?
XOR
Given 3 inputs, which combinational logic gate would be 1 if and only if only one of the 3 inputs is true (and, naturally, false when 0, 2, 3 of the inputs are true)?
XOR(A,B,C)
For a positive number in binary, to represent it in Two's Complement you do:
nothing; it is already in the correct form