Final Exam RTOS Practice
Define a memory-mapped switches which is mapped to CPU 0x22001200 address.
#define SWITCHES ((volatile char *) 0x22001200)
Assuming that your UART is configured as 8-N-1 protocol, with baud rate 9600 bps, how many seconds will it need to finish the transmission of 100 bytes?
(100*8)*(1/9600) = 0.083 s
Using the #define statement, how would you declare a manifest constant that returns the number of seconds in a year? Disregard leap years in your answer
#define SECONDS_PER_YEAR (60*60*24*365)
For the variable definition in the following, which one is preferred?
uint32_t TxData[16];
Implement a memory manager for fixed sized blocks. Let the block size be #define SIZE 100 // size in bytes Let the number of blocks be #define NUM 10 // number of blocks #define NULL 0 // empty pointer char *FreePt; // points to first free block char Heap[SIZE*NUM]; Initialization must be performed before the heap can be used. Heap_Init partitions the heap into blocks and links them together. FreePt points to a linear linked list of free blocks. Initially these free blocks are contiguous and in order, but as the manager is used the positions and order of the free blocks can vary. It will be the pointers that will thread the free blocks together. For these two definitions, 1000 bytes of memory will be managed. Create three functions: initialization, allocate and deallocate.
void Heap_Init(void){char *pt;FreePt = &Heap[0];for(pt = &Heap[0]; pt!= &Heap[SIZE*(Num-1)]; pt = pt+SIZE){ *(long*)pt = (long)(pt+SIZE);} *(long*)pt = NULL; } void *Heap_Allocate(void){FreePt = (char*) *(char**)pt;char *pt; } pt = FreePt;return(pt);if(pt != NULL){return(pt); } void Heap_Deallocate(void*pt){ char *oldFreePt; oldFreePt = FreePt; FreePt = (char*)pt; *(long*)pt = (long) oldFreePt; }
What is a non reentrant code?
A computer program or routine is described as reentrant if it can be safely called again before its previous invocation has been completed (i.e it can be safely executed concurrently). To be reentrant, a computer program or routine: Must hold no static (or global) non-constant data
You are designing a real-time scheduler for this system. There are three periodic tasks that have minimal interaction with each other. Task 1: Executes every 1000 µs, execution time varies from 5 to 100µs. Task 2: Executes every 400 µs, execution time varies from 10 to 100µs. Task 3: Executes every 100 µs, execution time varies from 1 to 10µs. Without actually writing the scheduler, you can determine whether or not a real-time solution is likely. Is it possible to schedule these tasks? If no, prove it. If yes, justify your answer.
(100/1000)*100 + (100/400)*100 + (10/100)*100 = 45%, yet it should be possible according to Rate Monotonic Theorem. Since the periods overlap, there is no scheduler that runs without jitter.
Assume the system tick clock frequency is 16 MHz. Assuming 106 ~ 220. What is the maximum time between periodic interrupts for which one can setup using the SysTick timer?
(2^24)/(16*10^6) = 1 second.
assuming unsigned char xyz is 1 byte unsigned char xyz; Set the variable xyz bit 6 HIGH without modifying the other bits, using one C-code only.
// xyz = 0000 0000 xyz = xyz | 0x40;
What is the size (number of bytes) of myvar with the fallowing declarations int8_t myvar
1
__8__ int (*a[10])(int); // An array of 10 pointers to functions that take an integer argument and return an integer __4__ int a[10]; // An array of 10 integers __2__ int *a; // A pointer to an integer __5__ int *a[10]; // An array of 10 pointers to integers __1__ int a; // An integer __6__ int (*a)[10]; // A pointer to an array of 10 integers __7__ int (*a)(int); // A pointer to a function a that takes an integer argument and returns an integer __3__ int **a; // A pointer to a pointer to an integer
1. An integer 2. A pointer to an integer 3. A pointer to a pointer to an integer 4. An array of ten integers 5. An array of ten pointers to integers 6. A pointer to an array of ten integers 7. A pointer to a function that takes an integer as an argument and returns an integer 8. An array of ten pointers to functions that take an integer argument and return an integer.
For each definition, select and match the term that best describes it. __5__A scheduler that can not suspend execution of a thread without the thread's permission. The thread must suspend itself. __27__ It is a special type of binary value which is used for controlling access to the shared resource. It includes a priority inheritance mechanism to avoid extended priority inversion problems. It allows current higher priority tasks to be kept in the blocked state for the shortest time possible. __20__ Storage that is allocated for the convenience of the operating system but contains no information. This space is wasted. __18__ The communication between sender and receiver can occur simultaneously. The sender and receiver can both transmit and receive at the same time. __9__ An I/O synchronization scheme that transfers data one byte at a time directly from an input device into memory, or directly from memory to an output device. __23__ It is a scenario in scheduling in which a high priority task is indirectly preempted by a lower priority task effectively inverting the relative priorities of the two tasks. __24__ It is simply a variable that is non-negative and shared between threads. It is a signaling mechanism, and a thread that is waiting on it can be signaled by another thread. It uses two atomic operations, 1)wait, and 2) signal for the process synchronization. __12__ Locations within a software module, which if an interrupt were to occur at one of these locations, then an error could occur (e.g., data lost, corrupted data, program crash, etc.) __10__ An indirect function call added to a software system that allows the user to attach their programs to run at strategic times. These attachments are created at run time and do not require recompiling the entire system. __7__ A software module that can be started by one thread, interrupted and executed by a second thread. __25__ A system that implements best effort to execute critical tasks on time, typically using a priority scheduler. Once a deadline as passed, the value of completing the task diminishes over time. __4__ A scenario that occurs when two or more threads are all blocked each waiting for the other with no hope of recovery. __21__ A load word or store word instruction uses only one memory address. The lowest address of the four bytes is used for the address of a block of four contiguous bytes. __15__ utilized by inserting a complementary bit after a fixed number of bits of equal value. __2__ A DC motor with built in controller. The microcontroller specifies desired position and the motor adds/subtracts power to move the shaft to that position. __1__ A condition when the largest file or memory block that can be allocated is less than the total amount of free space on the disk or memory. __19__ The communication between sender and receiver occurs in both directions, but only one at a time. The sender and receiver can both send and receive the information, but only one is allowed to send at any given time __17__ Mechanism for storing multiple byte numbers such that the most significant byte exists first in the smallest memory address. __22__ The scheduling is done when the process changes from running state to ready state or from waiting for the state to ready state. In this scheduling, the resources are allocated to execute the process for a certain period. After this, the process is taken away in the middle and is placed in the ready queue its bursts time is left and this process will stay in ready line until it gets its turn to execute. __14__Thread synchronization where at most one thread at a time is allowed to enter. __16__ Software execution that cannot be divided or interrupted. __3__ A memory module that interfaces to two separate address/data buses, and allows both systems read/write access the data. __11__ Hardware that allows bits (information, error checking, synchronization or overhead) to transfer only in one direction. Contrast with half duplex and full duplex channels. __6__ A set of software routines that abstract the I/O hardware such that the same high-level code can run on multiple computers. __26__ A system that can guarantee that a process will complete a critical task within a certain specified range. There is an upper bound on the latency between when a task is supposed to be performed and when it is actually performed. __8__ An I/O synchronization scheme that transfers an entire block of data all at once directly from an input device into memory, or directly from memory to an output device. __13__ The maximum slope of a signal. If the time-varying signal V(t) is in volts, it is the maximum dV/dt in volts/s.
1.externalfragmentation 2. Servo 3. dual port memory 4. deadlock 5.cooperative multitasking non-preemptive 6.Boad Support Package 7. reentrant 8. burst DMA 9. cycle steal DMA 10. Hook 11. simplex channel 12. critical section 13. slew rate 14. mutual exclusion 15. stuff bits 16. Atomic 17. Big Endian 18. Full Duplex Channel 19. Half Duplex Channel 20. Internal Fragmentation 21. Little Endian 22. Preemptive Scheduler 23. Priority Inversion 24. Semaphore Initialization 25. Soft Real Time 26. Hard Real Time 27. mutex
What is the Output of the program #include <stdio.h> extern int var = 0; int main() { var = 10; printf("%d ", var); return 0; }
10
Assume that float takes 4 bytes, predict the output of following program. void fun(int *p) { int q = 10; p = &q; } int main() { int r = 20; int *p = &r; fun(p); printf("%d", *p); return 0; }
20
Predict the output of following program. #include <stdio.h> int main() { int a[5] = {1,2,3,4,5}; int *ptr = (int*)(&a+1); printf("%d %d", *(a+1), *(ptr-1)); return 0; } int main() { int r = 20; int *p = &r; fun(p); printf("%d", *p); return 0; }
25
What is the size (number of bytes) of myvar with the following declarations assuming that the Keil compiler will assign a 32-bit integer for each enumerate value (RED, BLUE or GREEN): typedef enum color {RED=0, BLUE=1,GREEN=2 } color_type; color_type myvar = BLUE;
4 bytes
#include <stdio.h> int main() { int a[5] = {1,2,3,4,5}; int *ptr = (int*)(&a+1); printf("%d %d", *(a+1), *(ptr-1)); return 0; } #include void main() {int k=5; int *p=&k; int **m=&p; printf("%d %d %d",k,*p,**m);}
5 5 5
What is the size (number of bytes) of myvar with the following declarations: char myvar[]="555555"; (count NULL character as a byte)
7
Assume the bus clock frequency is 80MHz. Two TM4C123 microcontrollers are communicating using UART. How many total bits are transmitted when sending the message: Hello_mBed using 8-N-1 protocol.
8 bits per character plus 2 bits (Start and Stop) multiplied by 10 frames, 1 frame per character. Total comes to 100 bits.
Assume that float takes 4 bytes, predict the output of following program. #include <stdio.h> int main() { float arr[5] = {12.5, 10.0, 13.5, 90.5, 0.5}; float *ptr1 = &arr[0]; float *ptr2 = ptr1 + 3; printf("%f ", *ptr2); printf("%d", ptr2 - ptr1); return 0; }
90.500000 3
Please explain whether the following codes are good practices for certain standards, if not, please correct them. if (timer.done) // A single statement needs braces! timer.control = TIMER_RESTART;
Adding brackets is always a good practice to have if(timer.done){ // Even if empty, always add the curly brackets}
What term is used to describe the smallest difference in input voltage that an ADC can reliably distinguish?
Amplitude Resolution
The following 'C' statement : int * f [ ] ( ); declares:
Array of functions returning pointers to integers
Compare these two code snippets, explain why one is better than the other. 1) *(--pt) = buffer[n++]; 2) --pt; *pt = buffer[n]; n++
Both code snippets are doing the same thing, but the second option is easier to read and debug for the coder
Please explain the signals of CPOL and CPHA in SPI protocol
CPOL is Clock Polarity and this drives the initial logic state of the clock signal, whether it be a logic low or a logic high. CPHA is the Clock Phase and this drives the relationship between the data transitions and the clock transitions.
In order to improve signal to noise ratio on data sampled by the ADC we can deploy over-sampling. Assume for this problem, hardware averaging is not activated. This means for every one output we need, we will sample the ADC N times. Which of the following operations will improve the signal to noise ratio over sampling just once? There may be multiple answers, if so list all operations that improve the signal to noise ratio.
Calculate the mean of the samples.
What is the debugging term used to store important information into arrays? This debugging technique can be used to replace printing (printf) information while the program is running.
Dump into array
In thread mode, you can modify CONTROL register to switch CPU between unprivileged and privileged access levels.
False
Consider the two fallowing C lines int var1; extern int var2;
First statement declares and defines var1, but second statement only declares var2
On the TI TM4C123GXL Launchpad, PF0 is connected to SW2, please explain how you program to make PF0 as SW2 input. You don't have to write codes, just explain what you need to do.
First, enable the clock port in the RCGC register second, Unlock the port in the LOCK register three, Enable writing to pin in the CR (commit) register four, Configure pin as input in DIR (Direction) register five, enable pull-up resistor on pin in the PUR (Pull Up Resistor) register last, Enable digital function on pin in the DEN (Digital Enable) register
In the class, we discussed the Unix/Linux filesystem, which uses a form of indexed allocation that stores separate index tables for each file in so-called inodes on disk. Each file is associated with exactly one inode given in its corresponding directory entry. Each inode contains metainformation about the file (such as permissions) next to the index table of allocated blocks. Assume that the master directory is stored in disc block 0, followed by up to N inodes. Furthermore, assume that disc blocks have a size of 1kB, that 8 bytes in each inode are used to store meta-information, and that each block index number in the inodes has 32 bits. Does this filesystem have internal or external fragmentation? If so, why? If not, why not?
For internal fragmentation, there is an average of 500 bytes that are wasted in the last block in the file. There is no External fragmentation.
With UART transmission we send one start bit, 8 data bits and one stop bit. What term do we use to define these 10 bits?
Frame
Please explain in a RTOS such as FreeRTOS system, why it can provide deterministic execution for a higher priority task.
FreeRTOS is given all of the CPU control and lower priority tasks are suspended and put on stand by until they have the highest priority.
Please explain the master and slave modes in SPI communication.
In SPI communication, the SPI allows bits of data to be shifted out of a master device into a slave, and at the same time, bits can be shifted out of the slave into the master. The slaves cannot communicate with other slaves, only the master, but the master can communicate with any of the slaves.
In a real-time system, it is important to respond to critical events. What is the term used to describe the delay between the time a critical event occurs and the time the event is processed? For example, the time between touching a switch and the time the software recognizes the switch is touched.
Interrupt Latency
Consider a priority scheduled real-time system running three periodic tasks with the following priorities and execution times. You can assume zero context switch and interrupt overhead. Task Airbag (A) Warning (W) Engine (E) Priority High Medium Low Execution Time 10 us 20 us 30 us Period 30 us 60 us 120 us Now assume that tasks A and E share a mutex (binary semaphore) that they acquire at the beginning of each execution and hold for the whole duration of their execution. Draw one iteration of the schedule. Is the task set schedulable? Is there any priority inversion? If so, mark the beginning and end of the inversion.
Look at drawing
Consider a priority scheduled real-time system running three periodic tasks with the following priorities and execution times. You can assume zero context switch and interrupt overhead. Task Airbag (A) Warning (W) Engine (E) Priority High Medium Low Execution Time 10 us 20 us 30 us Period 30 us 60 us 120 us Draw the task executions over time. Assume that all tasks become ready to execute, i.e. start their first period at time zero. Draw one iteration of the schedule until it starts repeating. Is the task set schedulable, i.e. do all task finish their execution before the start of their next period (=deadline)? Is there any priority inversion? If so, mark the duration of the inversion.
Look at image
Out of all four SPI lines (MOSI, MISO, CLK, SS) which one needs to have tri-state output capability? Why?
MISO needs to have the tri-state output capability because the signal needs to become high impedance when the device is not selected. MISO is Master in Slave out, the master is connected to multiple slaves so tri-state output capability will be needed to help with communication.
What is the difference between Call by Value and Call by Reference?
Need correct answer
What is the size (number of bytes) of myvar with the fallowing declarations: typedef struct os_tcb { unsigned char *px; struct os_tcb *pt; char dir; char p[5];} OS_TCB; OS_TCB myvar;
Need correct answer
What is wrong with this C macro definition?: #define MUL(a,b) a*b
Need correct answer
assuming unsigned char xyz is 1 byte unsigned char xyz; Set the variable xyz bit 4, bit 5 and bit 6 LOW without modifying the other bits. Use only one line C-code.
Need correct answer
assuming unsigned char xyz is 1 byte unsigned char xyz; Set the variable xyz bit 7, 6, 5 and 4 as the value 0101 (binary) without modifying other bits, using only one line C-code.
Need correct answer
Please list the advantage(s) of using the defined datatype "uint32_t" instead of "int".
Need the correct answer
Write one line C code to define the type of int8_t. (Only use one space as delimiter, for example, struct abct ABC, no space starting the definition)
Need the correct answer
The following FIFO has one or more critical sections. This FIFO is used in a multithreaded application, such that data is passed from main program (Fifo_Put) to ISR (Fifo_Get). Add code to this module to remove the critical section(s). : uint16_t Buf[3]; // place for three 16-bit numbers uint8_t Size; // 0 means empty, 1 means one, 2 means 2, 3 means full int Fifo_Init(void){ Size = 0; // runs during initialization with interrupts disabled return 0; } int Fifo_Put(uint16_t data){ // store data into FIFO if(Size >= 3){ return 1; // full, fail } Buf[Size] = data; Size++; // one more return 0; // success } int Fifo_Get(uint16_t *p){ // remove data from FIFO if(Size == 0){ return 1; // empty, fail } *p = Buf[0]; // return data Buf[0] = Buf[1]; // shift buffer Buf[1] = Buf[2]; // shift buffer Size--; // one less return 0; // success }
Need to get correct anwer
Please explain whether the following codes are good practices for certain standards, if not, please correct them. /* a = a + 1; /* comment */ b = b + 1; */
Not good coding standard, you should not nest comments or use comments to disable a block of code. You can do something like this: #if 0 a = a+1; /* comment */ b = b+1; #endif
Please explain whether the following codes are good practices for certain standards, if not, please correct them. if (var++ || num == 11){...}
Not good coding standards, always use parentheses where they are necessary. For example: if((var++) || (num == 11)){...}
PendSV will be used to implement a cooperative thread switcher. Implement a round robin scheduler. The TCB structure is different from the one in the book. struct tcb{ struct tcb *next; // linked-list pointer long *sp; // pointer to stack, valid for threads not running }; typedef struct tcb tcbType; tcbType *RunPt; All active threads exist in a circular linked list with RunPt pointing to the thread currently running. There are NO interrupts in this operating system and SysTick is not used. Write the PendSV handler in assembly language that implements a thread switch.
PendSV_Handler CPSID I PUSH {R4-R11} LDR R0, =RunPt LDR R1, [R0] STR SP, [R1, #4] LDR R1, [R1] STR R1, [R0] LDR SP, [R1, #4] POP {R4-R11} CPSIE I BX LR
What data structure do you use to stream data from an ISR to the main program given the situation where data arrives into the ISR bursts but is processed one byte at a time in the main?
Queue
Which registers are pushed on the stack by hardware NVIC when an interrupt is serviced?
R0, R1, R2, R3, R12, LR, PC, and PSR
how is RTOS different from other OS?
RTOS can effectively handle interrupts based on priority to control scheduling, but RTOS has limited resources compared to OS.
Windows OS has multiple processes with different process priority switches between multiple processes, how is RTOS different from that?
RTOS has hard deadlines for each task and something like a windows OS doesn't really worry about hard deadlines.
What qualifier do we add to an otherwise global variable so that the scope is restricted to software located within that same file?
Static
Are the following good examples of "comments"? If not, please correct them and make the comments meaning. time++; // add one to time mode = 0; // set mode to zero
The comments are not good enough because they are explaining what is being done to each local variable, but not why it is being done. Better examples would be: time++; // maintain elapsed time in msec mode = 0; // switch to idle mode because no more data is available
In the class, we discussed the Unix/Linux filesystem, which uses a form of indexed allocation that stores separate index tables for each file in so-called inodes on disk. Each file is associated with exactly one inode given in its corresponding directory entry. Each inode contains metainformation about the file (such as permissions) next to the index table of allocated blocks. Assume that the master directory is stored in disc block 0, followed by up to N inodes. Furthermore, assume that disc blocks have a size of 1kB, that 8 bytes in each inode are used to store meta-information, and that each block index number in the inodes has 32 bits. How could the file system be changed to support larger file sizes?
The file system can be changed by creating multiple levels of inodes. We can designate some of the inode entries as special pointers to other inodes, thus effectively creating a tree of inodes. That or we can let the inodes be larger than 1 disk block.
In most ARM MCUs, it has a memory space called "bit-banded alias of I/O ports", explain the function and the advantage of this address mode for one GPIO pin.
The function is to allow for atomic bitwise operations to memory areas. An advantage like the ARM Cortex doesn't have something like BIT, CSET, or BIT CLEAR commands, like most of the 8-bit microcontrollers do and the bid banded alias of I/O ports allows for a work around the circuit.
In the class, we discussed the Unix/Linux filesystem, which uses a form of indexed allocation that stores separate index tables for each file in so-called inodes on disk. Each file is associated with exactly one inode given in its corresponding directory entry. Each inode contains metainformation about the file (such as permissions) next to the index table of allocated blocks. Assume that the master directory is stored in disc block 0, followed by up to N inodes. Furthermore, assume that disc blocks have a size of 1kB, that 8 bytes in each inode are used to store meta-information, and that each block index number in the inodes has 32 bits. What is the largest supported disk size? What is the largest file that can be created?
The largest supported disk size is a 32-bit index numbers each of 2^32 blocks of 1 kB each which gives 4TB The largest file size is 1024/4 - 2 index entries per inode = 254 blocks of 1 kB each which gives us around 254 kB
What is the keyword of "volatile"
The volatile keyword is intended to prevent the compiler from applying any optimizations on objects that can change in ways that cannot be determined by the compiler. Objects declared as volatile are omitted from optimization because their values can be changed by code outside the scope of current code at any time.'
What is 'stack overflow' error in C?
This error may occur if the program tries to access the memory beyond its available maximum limit. We can also say that if a pointer exceeds the stack limitations (boundaries). When this error occurs program terminates and does not execute further instructions. Therefore, we must be careful while using the pointer and limit boundaries.
Please explain whether the following codes are good practices for certain standards, if not, please correct them. uint8_t a = 6u; int8_t b = -9; if (a + b < 4) { // This correct path should be executed // if -9 + 6 were -3 < 4, as anticipated. } else { // This incorrect path is actually // executed because -9 + 6 becomes // (0x100 - 9) + 6 = 253. }
This is not good coding standards, results of mixing signed and unsigned data can lead to data-dependent bugs. If anything keep both values consistent and find additional ways to work around the issue. int8_t a = 6u; int8_t b = -9; if (a + b < 4) { // This correct path should be executed // if -9 + 6 were -3 < 4, as anticipated. } else{ // This incorrect path is actually // executed because -9 + 6 becomes // (0x100 - 9) + 6 = 253. }
PendSV will be used to implement a cooperative thread switcher. Implement a round robin scheduler. The TCB structure is different from the one in the book. struct tcb{ struct tcb *next; // linked-list pointer long *sp; // pointer to stack, valid for threads not running }; typedef struct tcb tcbType; tcbType *RunPt; All active threads exist in a circular linked list with RunPt pointing to the thread currently running. There are NO interrupts in this operating system and SysTick is not used. Write C or assembly codes to trigger a PendSV. This code will be used to invoke acooperative thread switch.
To invoke a PendSV, the software sets bit number 28 of the NVIC_INT_CTRL_R register so a code like: void Switch(void){ NVIC_INT_CTRL_R = 0x10000000; }
Only in handler mode, ARM CPU can be switched from unprivileged to privileged access level.
True
This question is about ARM Cortex-M MCPU access level. When MCU comes from power-on, it is in thread mode and privileged access level.
True
From the names of those functions/variables, please explain their meanings. (is it a local or global variable or function? Is it a constant?) TxFifo; LCD_OutString(); Furnace_Temperature; ptrReceiveData; ReceiveData[]; MotorRunningMode; SECONDS_PER_DAY; index; count; VOLTAGE_THRESHOLD; FIFO_SIZE; spiCommandTx();
TxFifo is Global variableLCD_OutString() is Global functionFurnace_Temperature is Global variable ptrRecieveData is a local variable RecieveData[] is Global arrayMotorRunningMode is a Global variableSECONDS_PER_DAY is a constant Index is a local variable count is a local variable VOLTAGE_THRESHOLD is a constant FIFO_SIZE is a constant spiCommandTx() is local function
Consider a priority scheduled real-time system running three periodic tasks with the following priorities and execution times. You can assume zero context switch and interrupt overhead. Task Airbag (A) Warning (W) Engine (E) Priority High Medium Low Execution Time 10 us 20 us 30 us Period 30 us 60 us 120 us Does this task set follow a rate monotonic scheduling (RMS) strategy? If so, why? If not, why not?
Yes this task set follows RMS strategy: (10/30)+(20/60)+(30/120) = 11/12 = 92%. 92%>69%
For these two lines, which one is preferred?
if ( (x+1) & 0x0F) == (y|0x04)
Write a declaration for an array of 10 pointers to an integer.
int a*[10];
Below is a sample of a C file foo.c uint32_t myvar1 = 0; static uint8_t myvar2; extern int16_t myvar3; extern func1(uint8_t c); static func2(uint8_t c) { } void func3(uint8_t c) { } Please describe the scopes of variables myvar1, myvar2, myvar3 and functions func1(), func2(), func3().
myvar1 is global myvar2 is global and cannot be changed myvar3 is a global from an external file
Consider a compiler where int takes 4 bytes, char takes 1 byte and pointer takes 4 bytes. #include <stdio.h> int main() { int arri[] = {1, 2 ,3}; int *ptri = arri; char arrc[] = {1, 2 ,3}; char *ptrc = arrc; printf("sizeof arri[] = %d ", sizeof(arri)); printf("sizeof ptri = %d ", sizeof(ptri)); printf("sizeof arrc[] = %d ", sizeof(arrc)); printf("sizeof ptrc = %d ", sizeof(ptrc)); return 0; }
sizeof arri[] = 12 sizeof ptri = 4 sizeof arrc[] = 3 sizeof ptrc = 4
What qualifier do we add to an otherwise local variable (scope within a function) so that the variable is defined permanently in RAM?
static
The following code is used for thread profiling in a preemptive scheduler to indicate the status, that is, pins 5 and 6 of port 1 as two LEDs output are used to indicate that the system is running. Are there any critical regions in this code? If there are, please provide some methods to handle this critical region. Full credit given to the best answer. void thread1(void) { init1(); while (1) { GPIO1->FIOPIN |= (1<<5); Body1(); GPIO1->FIOPIN &= ~(1<<5); } } void thread2(void) { init2(); while (1) { GPIO1->FIOPIN |= (1<<6); Body2(); GPIO1->FIOPIN &= ~(1<<6); } }
void thread1(void) { long t; init1(); while(1) { t = StartCritical(); GPIO->FIOPIN |= (1<<5); EndCritical(t); Body1(); t = StartCritical(); GPIO->FIOPIN &= ~(1<<5); EndCritical(t); } } void thread2(void) { long t; init2(); while(1) { t = StartCritical(); GPIO->FIOPIN |= (1<<6); EndCritical(t); Body2(); t = StartCritical(); GPIO->FIOPIN &= ~(1<<6); EndCritical(t); }}