Paging, Page fault handling and Page replacement
What page fetch policies do you know?
- Demand-Paging - Pre-Paging
What page replacement policies do you know?
- First-In-First-Out (FIFO) - Optimal Page Replacement - Least Recently Used (LRU) - Clock Page Replacement - Random
During the semester what types of page tables did we discuss?
- Linear Page Table - Multi-Level Page Table - Linear Inverted Page Table - Hashed Inverted Page Table
What steps are involved in handling a page fault?
- OS checks validity of access (requires information of address space layout and allocated memory regions of the process) - Get empty frame (potentially perform page replacement) - Initialize frame (load contents as needed) - Adapt page table (incl. setting valid bit - Restart instruction that caused the fault
What information is typically stored in a page table entry (PTE)?
- Valid/Present Bit - Page Frame Number - Read/Write Bit - User/Kernel Bit - Caching Bit - Accessed Bit - Dirty Bit
What is a translation lookaside buffer (TLB)?
An address translation cache reduces memory accesses by handling address translation. If a translation lookaside buffer (TLB) miss occurs, the memory management unit (MMU) either walks the memory mapping structure or invokes the operating system.
What trade-offs exist between small and large pages?
Due to internal fragmentation large pages require more memory with fewer bits needed per page and fewer pages per table. More data needs to be loaded from the disk to make a page valid.
What is a memory management unit (MMU)?
Hardware support for virtual to physical address translation and memory protection
What is copy-on-write?
Mechanism to transparently share pages and save memory as long as no modification is made to the respective pages. Pages in all address spaces marked read-only. On write access, a page fault is triggered (protection fault). OS allocates new frame, copies page, updates mapping of respective process and restarts write operation (optionally allows RW- access to original page for other process if it is the last to reference the page).
What is a page fault?
The MMU cannot translate a virtual to a physical address (page not present) or detected an illegal access (protection fault such as write on read-only page) and invokes the operating system to handle the situation.
What identifies an address space with paging?
The page table, which is specified via its physical address in RAM (CR3 register on x86).
What is the working set of a process?
The set of pages referenced in the most recent time-delta.
What is a 'page' and 'frame'?
Unit of translation for paging-based memory management (typically 4 KiB in size). Virtual address space is build from pages. Pages in the physical address space (RAM) are called frames. They must have the same size.
