Test 5 - Essential questions

Give 3 examples of pipeline hazards

1) Data dependencies 2) Resource conflict 3) Fetch access delays from memory

Flynn's taxonomy classifies computer architectures based on two properties. What are they?

1) Number of instructions 2) Number of data streams that flows into the processor

Name the three aspects of digital synthesis as articulated by Gajski

1) Structural 2) Physical 3) Behavioral

There are three types of shared memory organizations. What are they?

1) global shared memory 2) distributed shared memory 3) global shared memory with separate cache at processors.

Give two reasons for the efficiency of vector processors.

1) the machine fetches a lot fewer instructions, which means there is less decoding to do. 2) it has a continuous source of data and can begin prefetching corresponding pairs of values

Explain Delayed Branching.

A method to deal with the effects of branching on pipelines. It is used utilize wasted cycles. It inserts an instruction behind the branch and then executes it before the branch.

Loop Peeling

A type of loop fission. This is use to remove the beginning or ending statement from a loop.

What is branch prediction? What is it used for?

Branch prediction attempts to speeds up the process of branch instructions with CPU using pipeline. Branch prediction will try to predict which path a branch hazard will take. It will flush the the wrong path instruction from the pipeline & fetch the right path if wrong.

In which ways do embedded systems differ from general-purpose computers

Embedded systems carry out a limited set of tasks within the domain of the larger system. General-purpose computing, we know in advance the capabilities of the hardware. Embedded can change while the system is under development. deep understanding of the underlying hardware is required.

How is embedded systems programming different from general applications development?

Embedded systems development requires a linear path of functional requirements. Must be carefully planned and monitored to ensure coordination with the hardware development

Why are watchdog timers necessary in many embedded systems?

Helps guard against system hangs by continually checking for liveness. It automatically generates a system reset if the program neglects to service it.

Explain interrupt latency. How is it related to context switch time?

Interrupt latency - The elapsed time between the occurrences of an interrupt and the execution of the first instruction of the interrupt service routine. Context Switch time - The time differences between the completions of the HIGH priority interrupt and the next instruction

What are the advantages and disadvantages of caching disk writes?

It can give better performance. Cache are volatile memory, so if system failure, data in the cache is lost. Cache pollution can also occur. When cache is filled with data that no process needs, leaving less room for useful data.

Explain the term benchmarketing.

It is a marketing tool used to advertise any type of numbers/spec that are better than their competitors

Loop Fusion

Loop fusion - Combining loops that use the same data items, increasing the cache performance and deducing loop overhead

what is the shortcoming of using mips or flops as a measure of system throughput

MIPS - is different for different programs and is dependent on the specific programs. Flops - can only measure floating-point operations. Different computers may have different floating-point operation

Why is the prevention of memory leaks so important in embedded systems?

Memory accesses may reach a memory space that is invalid. Embedded system is very limited, so memory leaks may lead to allocating another program's data or memory space.

Why is a RISC processor easier to pipeline than a CISC processor?

Most RISC instructions execute in one clock cycle. To accomplish this speedup, microprogrammed control is replaced by hardwired control, which is faster at executing instructions. This makes it easier to do instruction pipelining,

Why is virtual memory not often used in embedded system?

Most embedded systems are time constrained. Proper system operation requires all activities take place in a defined time frames.

Do all programming problems lend themselves to parallel execution? What is the limiting factor

No, not all applications can benefit from parallelism. Some add cost and if it isn't open to a parallel solution, then it is usually not worth the cost to port it to a multiprocessing architecture

What is the difference between a PLA and a PAL?

PLA is more flexible than PAL, but are slower and more costly. PAL are always the logic sum. PLA removes the restriction by using fuses or switches for OR gates and the AND gates.

Describe how register windowing makes procedure calls more efficient

Reduces the instruction complexity results. (more)

What is SETI and how does it use the distributed computing model?

Search for Extra Terrestrial Intelligence. They install SETI screen saver on their computers that will analyze signal data during the processor's normal idle time.

Loop Fission

Splitting large lops into smaller ones. This will eliminate data dependencies, and reduces cache delays.

Compare and contrast supervised learning and unsupervised learning with regard to neural networks.

Supervised learning - neural net is said to learn supervised if the desired output is already known Unsupervised learning - has no such target output. It doesn't know the results of what it is looking for.

What is the difference between a microcontroller and a system-on-a-chip?

System on a chip contains all circuits required on one chip to deliver a set of functions. Different from their complexity and increased on-chip resources. It requires supporting circuits such as decoder, signal processors, signal converters.

How is the focus of the TPC different from SPEC?

TPC benchmark's purpose is to measure performance. The differences in how they simulate a complete computing environment.

We propose adding a level to Flynn's taxonomy. What is the distinguishing characteristic of computers at this higher level?

The characteristics of the data that determines the sequence of processors of events

Loop Interchange

Used to rearrange loops fo that memory is accessed more closely to the way data was stored

What is the fundamental computing element of a neural network

Useful in dynamic situations where we can't formulate an exact algorithmic solution, where processing is based on an accumulation of previous behavior.

Compare and contrast the superscalar architecture to the VLIW architecture

VLIW - uses multiple independent operations to pack into a single large instructions. Superscalar - uses multiple instruction are issued per instruction cycle and is handled by the hardware and not the programmers.

In what way does a VLIW design differ from a superpipelined design?

VLIW processors rely entirely on the compiler. It processors pack independent instructions into one long instruction, which tells the execution units what to do

Why was the RISC architecture concept proposed?

by having a set of minimal instructions that can run all the essential operations. Example data movement, ALU operations, and branching. Only explicit load and store instructions were permitted to access to memory

What is the risk involved in using the SSTF disk scheduling algorithm?

the problem occurs when both the disk controller and the host operation system both uses it, causing conflict scheduling.