480_Final
Given the logical address 0xAEF9 (in hexadecimal) with a page size of 256 bytes, what is the page number? a.) 0xAE b.) 0xF9 c.) 0xA d.) 0x00F9
0xAE
A page-table base register stores A. a pointer to the page table in memory. B. the starting logical address of the page currently being accessed. C. the starting physical address of the frame currently being addressed. D. the page size of the page currently being accessed.
A. a pointer to the page table in memory.
The Second Chance algorithm The Second-Chance algorithm A. is same as FIFO algorithm if all pages in memory have been referenced at least once since the last page fault. B. is same as FIFO algorithm if none of the pages in memory have been referenced since the last page fault. C. is same as LRU algorithm if all pages in memory have been referenced at least once since the last page fault. D. is same as LRU algorithm if none of the pages in memory have been referenced at least once since the last page fault.
A. is same as FIFO algorithm if all pages in memory have been referenced at least once since the last page fault.
Consider a disk queue holding requests to the following cylinders in the listed order: 116, 22, 3, 11, 75, 185, 100, 87. Using the SCAN scheduling algorithm, what is the order that the requests are serviced, assuming the disk head is at cylinder 88 and moving upward through the cylinders? A. 116 - 22 - 3 - 11 - 75 - 185 - 100 - 87 B. 100 - 116 - 185 - 87 - 75 - 22 - 11 - 3 C. 87 - 75 - 100 - 116 - 185 - 22 - 11 - 3 D. 100 - 116 - 185 - 3 - 11 - 22 - 75 - 87
B. 100 - 116 - 185 - 87 - 75 - 22 - 11 - 3
Assume the value of the base and limit registers are 1200 and 350 respectively. Which of the following addresses is legal? A. 355 B. 1200 C. 1551 D. all of the rest
B. 1200
If execution time binding is used, A. logical addresses of process may change over time but physical addresses remain the same. B. physical addresses of process may change over time but logical addresses remain the same. C. both physical and logical addresses may change over time. D. both physical and logical addresses remain the same over time.
B. physical addresses of process may change over time but logical addresses remain the same.
Assume a system uses 2-level paging and has a TLB hit ratio of 90%. It requires 15 nanoseconds to access the TLB, and 85 nanoseconds to access main memory. What is the effective memory access time in nanoseconds for this system? (Hint: You do NOT need to do actual calculation for this question. You just need to make use of the reasonable range of the effective access time, considering a TLB's purpose.) A. 22 B. 200 C. 30.5 D. 117
D. 117
An advantage of virtual memory is that A. a program can be much larger than the size of physical memory. B. the programmers can concentrate programming the problem instead of worrying about the amount of physical memory available. C. it provides a way to execute a program that is only partially loaded in memory. D. All of the rest.
D. All of the rest.
What are the benefits of using slab allocation to allocate kernel memory? A. No memory is wasted due to fragmentation. B. Objects are created in advance and can be quickly allocated. C. Released objects are returned to the cache and marked as free, thus making them immediately available for subsequent requests. D. All of the rest.
D. All of the rest.
_____ is the page replacement algorithm implemented on most systems. A. FIFO B. Least frequently used C. Most frequently used D. Clock
D. Clock
A strategy to increase TLB reach is_______________. a.) decreasing the number of entries in the TLB. b.) increasing the page size c.) decreasing the number of entries in the TLB d.) Either decreasing the number of entries or increasing the page size, but not both. e.) All of the rest
Increasing the page size
A sign of thrashing is _________________. a.) the CPU utilization increases as the degree of multiprogramming is increased. b.) the CPU utilization decreases as the degree of multiprogramming is increased. c.) The CPU utilization increases as the number of pages allocated to each process is increased. d.) the CPU utilization decreases as the number of pages allocated to each process is increased.
The CPU utilization decreases as the degree of multi programming is increased.
Which of the following statements regarding solid state disks (SSDs) is false? a.) Standard bus interface may limit their throughput. b.) They are less reliable than traditional hard disks. c.) They are generally more expensive per megabyte than traditional hard disks. d.) They have no seek time or latency.
They are less reliable than traditional hard disks.
A drawback of equal allocation is that a high-priority process is treated the same as a low-priority process. a.) True b.) False
True
If a few bits in an HDD sector or NVM page are corrupted, the controller can recover the correct values using ECC only if the number of bits corrupted is low. a.) True b.) False
True
One problem with a global replacement algorithm is that the set of pages in memory for a process may depend on the paging behavior of other processes. a.) True b.) False
True
Prepaging is an attempt to prevent the high level of initial paging by bringing into memory, at one time, all of the pages that will be needed by the process. a.) True b.) False
True
RAID level 0 provides no redundancy. True False
True
Stack algorithms that implement LRU can never exhibit Belady's anomaly. True False
True
The instruction that causes a page fault needs to be re-executed after the fault has been handled. a.) True b.) False
True
Which of the following is not true about RAID level 0 + 1: a.) includes striping b.) includes mirroring c.) includes block interleaved parity. d.) if a drive fails, it goes back to RAID 0
includes block interleaved parity.
An address generated by a CPU is referred to as a_________. a.) physical address b.) logical address c.) post relocation register address d.) Memory-Management Unit(MMU) generated address
logical address
What are the two components of positioning time? a.) seek time + rotational latency b.) transfer time + transfer rate c.) effective transfer rate - transfer rate d.) cylinder positioning time + disk arm positioning time
seek time + rotational latency
A hard disk drive has 16 platters, 8192 cylinders, and 256 4 KB per track. The storage capacity of this disk is at most_______. a.) 128 TB b.) 32 TB c.) 32 GB d.) 128 GB
128 GB
Suppose a program is operating with execution-time binding and the physical address generated is 300. The relocation register is set to 100. What is the corresponding logical address? a.) 199 b.) 201 c.) 200 d.) 300
200
Consider a logical address with 18 bits used to represent an entry in a conventional page table. How many entries are in the conventional page table? (If the quiz/test is open-notes, you can use calculator or other tool to find out the powers of 2 value.) a. 262,144 b. 1,024 c. 1,048,576 d. 18
262,144
Given the reference string of page accesses: 1 2 3 4 2 3 4 1 2 1 1 3 1 4 and a system with three page frames, what is the final configuration of the three frames after the LRU algorithm is applied? a.) 1, 3, 4 b.) 3, 1, 4 c.) 4, 1, 2 d.) 1, 2, 3
3, 1, 4
Suppose we have the following page accesses: 1 2 3 4 2 3 4 1 2 1 1 3 1 4 and that there are three frames within our system. Using the FIFO replacement algorithm, what is the number of page faults for the given reference string? a.) 14 b.) 8 c.) 13 d.) 10
8
Which of the following is true about choosing an appropriate page size? A. Larger page size results in reducing total I/O. B. Smaller page size reduces the number of page faults. C. Larger page size reduces I/O time. D. Larger page size results in less total allocated memory.
C. Larger page size reduces I/O time.
The surface of a magnetic disk platter is divided into ____. A. Sectors B. Arms C. Tracks D. Cylinders
C. Tracks
________ is the method of binding instructions and data to memory performed by most general-purpose operating systems. a.) Interrupt binding b.) Compile time binding c.) Execution time binding d.) Load-time binding
Execution time binding
Which of the following disk head scheduling algorithms does not take into account the current position of the disk head? a.) FCFS b.) C-SCAN c.) SCAN d.)All scheduling algorithms take into account the current position of the disk head
FCFS
A 32-bit logical address with 8 KB page size will have 1,000,000 entries in a conventional page table. a.) True b.) Flase
False
A larger page size leads to lower internal fragmentation. a.) True b.) False
False
Data stripping provides reliability for RAID systems. a.) True b.) False
False
Fragmentation does not occur in a paging system. a. True b. False
False
In Linux, a slab can consist of discontiguous pages. a.) True b.) False
False
SSTF always minimizes the total head movements. a.) True b.) False
False
Same as NAS, cloud storage is typically accesssed over a LAN and accessed as raw blocks. a.) True b.) False
False
There is a 1:1 correspondence between the number of entries in the TLB and the number of entries in the page table. True False
False
Which of the following statement is correct? a.) Base register holds the size of a process b.) Limit register holds the size of a process c.) Base and limit registers can be loaded by the user process. d.) Any attempt by a user program to access memory at an address higher than register results in a trap to the operation system.
Limit register holds the size of a process.
Which of the following is FALSE about Storage Area Networks? a.) SANs make it possible for clusters of servers to share the same storage b.) SANs use storage protocols rather than network protocols c.) SANs use the same protocol and setup as NAS(Network Attached Storage) d.) Multiple host can attach to the same SAN
SANs use the same protocol and setup as NAS(Network Attached Storage)
The _______ is the number of entries in the TLB multiplied by the page size. a.) TLB hit b.) page resolution c.) TLB reach d.) page fault rate
TLB reach
A(n)___________ matches the process with each entry in the TLB. a.) address-space identifier b.) process id c.) stack d.) Incorrect: page number
address-space identifier
