Cambridge CompSci AS Chapter 5 - Processor Fundamentals
Describe what happens in the decode stage of the fetch-execute cycle.
- Instruction stored in CIR is received as input by the circuitry within the control unit. - Depending on instruction, control unit will send signals to appropriate units so execute stage can begin. - At this stage, the ALU will be activated if instruction requires arithmetic or logic processing.
What are the three important things to remember about registers?
- The MDR must act as a buffer. - The index register (IX) can be abbreviated as IR, but in some sources the current instruction register (CIR) is abbreviated as IR. - To avoid confusion, PC stands for Program Counter only when register notation is used; otherwise, it stands for Personal Computer.
The 5 basic features of the Von Neumann model.
- There is a processor (CPU) - The processor has direct memory access - Memory contains 'stored program' and data required - The stored program consists of individual instructions - Processor executes instructions sequentially
What are some common bus widths?
1, 4, 8, 16, 32, and 64 bits
According to the USB standard, how many attached devices can a computer handle?
127
What are some typical word lengths?
16, 32, or 64 bits or 2, 4, or 8 bytes.
According to the notes, what is the latest USB version?
3.2
According to Google, what is the latest USB version?
4
How many values are stored in an accumulator at one time?
A single value.
A processor has just one general purpose register. What is it called?
Accumulator
Which bus is connected to the MAR?
Address bus
What components make up the system bus?
Address bus, data bus, and control bus
What are the benefits of registers for where they are placed?
Allows very short access time.
Explain what is meant by an interrupt.
An interrupt is a signal. - The signal is sent from a device in use or from currently running software to indicate that it needs the attention of the processor. - A fatal error in a program, a hardware fault, a need for I/O processing to begin, user interaction, a timer signal.
Which components have an active role in the CPU operations?
Arithmetic Logic Unit (ALU) and Control Unit (CU)
What does ALU stand for and what is its function?
Arithmetic Logic Unit. It does arithmetic and/or logic operations.
Is the control bus one way or bidirectional?
Bidirectional.
How are register size and word length usually related?
Both match
The data bus can carry data to and from the ___.
CPU or I/O device.
What does CPU stand for?
Central Processing Unit
What does CU stand for and what are its functions?
Control Unit. It controls data flow through processor and rest of computer, ensures program instructions are handled correctly. A vital part of the CU is the two clocks used to synchronize processors.
Which bus is connected to the Control Unit?
Control bus
What is the function of the system clock?
Controls activity outside the processor.
What is the function of the internal clock?
Controls cycle of activity within the processor.
Explain the meaning of 'CIR' in register transfer notation.
Current Instruction Register - stores the current instruction while it is being decoded and executed.
What is CIR?
Current Instruction Register. Stores the current instruction while it is being decoded and executed.
Which bus is connected to the MDR?
Data bus
__ __ are a component that carry data to the memory or to an output device or can carry data from memory or from an input device.
Data bus
How are data bus width and word length related?
Data bus width is the same as word length
What is the significance of word length?
Defines a grouping the system can handle as one unit.
How many wires for the control bus?
Eight wires because there is no need for extended width.
What is an interrupt detected?
End of the fetch-execute cycle.
This type of port allows the computer user to connect a peripheral I/O device.
External port
What is the alternate to USB?
FireWire
How is HDMI different from VGA?
HDMI provides a connection to a screen and allow transmission of high-quality video including the audio component. VGA only provides video.
What does HDMI stand for?
High Definition Multimedia Interface
What is IX?
Index register. Stores a value; only used for indexed addressing.
What is the last thing that happens in the fetch-execute cycle?
Instruction stored in the MDR is transferred within CPU to CIR. *Two points to note: - The clock cycle is the one controlled by the system clock which will have settings that allow one data transfer from memory to take place in the time defined for one cycle. - In the final step, the program counter is incremented by 1, but instruction just loaded might be a jump instruction. In this case, program counter contents will be updated in accordance with jump condition. This can only happen after instruction has been decoded.
This type of port is connected to an I/O device that is an integral part of the computer system?
Internal port
Explain the use of the address bus and data bus in 'MAR ← [PC]'
It indicates an internal transfer between registers; however, when the very first instruction is to be fetched, there must be an address transferred into the PC using the data bus.
Explain the meaning of '←' in register transfer notation.
It indicates transfer from what is indicated on right hand side to the component identified on the left hand side.
What is the function of the accumulator?
It is a general purpose register that stores a value before & after the execution of an instruction.
Explain the meaning of '[[ ]]' in register transfer notation.
It means 'contents of the contents'
Explain the meaning of '[ ]' in register transfer notation.
It means 'contents of'
The system bus connects the CPU to what?
Memory & I/O system
Explain the meaning of 'MAR' in register transfer notation.
Memory Address Register - contains an address used to identify the memory location where data is to be stored or from where data is to be retrieved, the address is transferred to the MAR from the PC.
What is MAR?
Memory Address Register. Stores address of a memory location or an I/O component which is about that have a value read from or written to.
What is MDR (MBR)?
Memory Data Register (Memory Buffer Register). Stores data that has just been read from memory or is just about to be written to memory.
Explain the meaning of 'MDR' in register transfer notation.
Memory Data Register - contains binary code that has been retrieved from memory using the data bus. It may be a datum, an address, or an instruction. Acts as a buffer to handle different speeds within the CPU and on the data bus.
How is word length stated?
Number of bytes or number of bits.
What defines the shortest possible time that any action can take?
One clock cycle
What is VGA sometimes needed?
One example: To connect a second screen.
What is very important factor governing the processing speed of the system?
Processor clock speed
Explain the meaning of 'PC' in register transfer notation.
Program counter - stores the address of where the next instruction is to be read from.
What is PC?
Program counter. Stores the address of where the next instruction is to be read from.
What is the aim of plug and play?
Remove technical expertise allowing any computer user to connect a peripheral.
What is a word?
Small number of bytes that handled as unit by the computer system.
What is SR?
Status Register. Contains bits that are either set or cleared which can be referenced individually.
What uses the valued stored in the accumulator?
The ALU
What happens first in the fetch-execute cycle?
The address in the program counter is transferred within the CPU to the MAR.
Explain the use of the address bus and data bus in 'MDR ← [ [MAR] ]'
The address us carries the address of the memory location to the memory controller, which then allows the data bus to retrieve the address content and carry this tot he MDR>
Immediate Access Storage (IAS)
The components directly accessible by the processor.
This handles the interaction between the CPU and an I/O device.
The controller
What is bus width?
The number of parallel lines that make up a particular kind of computer bus. It is one of the most vital defining features of a data bus. It indicates the number of electric wires or bits that build up the data bus.
Explain the actions of the processor when an interrupt is detected.
The processor discontinues the processing that is underway. Step 1) Contents of registers are stored in memory so process can be re-started later. Step 2) Interrupt service routine (ISR) is initiated by loading the address of its first instruction into the program counter (PC) When interrupt has been serviced, previously running process is loaded into the CPU so execution can continue. Processor also checks: - for the presence of an interrupt following execution of each instruction. - whether or not interrupt flag has been set.
How many clocks in the CU? What are they called?
There are two clocks: the internal clock and the system clock.
What are registers and where are they placed?
They are storage units placed very close to the ALU.
What is the function of the data bus?
To carry data
What is the function of the control bus?
Transmits a signal from the control unit to any other system component or transmit a signal to the control unit. Major use is to carry timing signals at time intervals dictated by the clock cycle ensuring data transmission is synchronized.
What happens during the clock cycle of the fetch-execute cycle?
Two things happen simultaneously: - Instruction held in the address pointed to by the MAR is fetched into the MDR - Address stored in the program counter is incremented.
What are the typical storage size of registers?
Typically 16, 32, or 64 bits
The creation of what device allowed Plug-and-Play to be fully realized?
USB
What does USB stand for?
Universal Serial Bus
What does VGA stand for?
Video Graphics Array
Does VGA provide video, audio, or both?
Video only
How is fastest access obtained for cache memory?
With all or part of the cache on the CPU.
Word length influences system architecture in regards to __ of components.
capacity
Cache memory is the __ component of the IAS.
fastest
Performance of cache memory improves with __ rate of access.
increase
Performance of cache memory improves with __ storage size.
increase
Performance improves with __ number of cores.
increasing
For address bus, what does bus width define?
number of bits in the address's binary code
Address bus is a __ way street.
one
A bus is a __.
parallel transmission component.
Each I/O device is connected to an interface called __
port
Address bus can only be used to __ an address.
send
Each core is a __ processor.
separate
In a bus, each separate wire carries a __.
single bit
The data bus is __ way
two (bi-directional)
Word length is considered when making bus __ decisions.
width