Chapter 2: Computer System Questions

what is k in memory

k = log2(m) address input signals or m = 2^k cells

Memory Units: m x n

m cells of n bits each

What are current issues with memory?

- CPUs are faster than memories. - On a read: the slower the memory, the greater number of cycles the CPU will have to wait. - Fast memory is very expensive, slow is cheap. - Lots of memory is: BIG; limited chip size

What are characteristics for primary memory?

- Fast - Small - Expensive - Closest to CPU

Computer Equation

CPU + Memory + I/O

3. On computer 1, all instructions take 10 nsec to execute. On computer 2, they all take 5 nsec to execute. can you say for certain that computer 2 is faster? Discuss.

Instruction Execution: As on the computer 1, all of the instructions takes 10 nsec to get executed thus now consider that the computer 1 consist of pipelining of five stage thus it could issue up to an 500 million instructions per second. While on the computer system 2, the instructions takes 5 nsec to get executed this if the computer system 2 is not pipelined and it cannot do anything better than the 200 million instructions per seconds thus with such a less information regarding it is highly unpredictable to judge that which system is faster.

4. What is instruction pipelining?

Instruction pipelining is a technique for implementing instruction-level parallelism within a single processor. Pipelining attempts to keep every part of the processor busy with some instruction dividing incoming instructions into a series of sequential steps.

What is major difference between SIMD processor and Vector processor?

SIMD processor is considered as of a parallel computer, but vector processor is considered as of single computer.

First initial of using pipelining

Single and Dual pipelining were originally used on RISC machines = Intel 486 but 386 didn't have any.

6. As one goes down the five-level memory hierarchy discussed in the text, the access time increases. Make a reasonable guess about the ratio of the access time of optical disk to that of register memory. Assume that the disk is already on-line.

Five-Level Memory Hierarchy As one goes down the five-levels of the hierarchy of memory thus the accessing time increases and becomes a few nanoseconds. Next in case for the optical disk the access time of the optical disk to that of the register memory is a few hundred's milliseconds that is about a ratio of 10^8.

What is Instruction-level parallelism?

Instruction-level parallelism (ILP) is a measure of how many of the instructions in a computer program can be executed simultaneously (at the same time).

Why problem led to superscalar architecture? and what does it look like?

The idea of adding more than dual pipelining needs more hardware and they decided to have one single piplining with multiple functions = Intel - They have one single pipelining but many functions

4. Imagine you are designing a single-chip computer for an embedded system. The chip is going to have all its memory on chip and running at the same speed as the CPU with no access penalty. Examine each of the principles discussed in Sec. 2.1.4 and tell whether they are so important?

- All Instructions Are Directly Executed by Hardware: Important - Maximize the Rate at Which Instructions Are Issued: Important - Instructions Should Be Easy to Decode: Important - Only Loads and Stores Should Reference Memory: not important - Provide Plenty of Registers: not important

What are cache design issues?

- Cache size: bigger cache = bigger cost - Cache organization: how to determine which memory cells are in the cache. - Unified/split cache: instructions/data: keep both in one cache, or separate caches. - Size of cache lines: how many bytes are copied into memory at once. locality of reference: if you reference a cell, chances are good that you will reference a neighbor. - Number of caches: the more the merrier

What does secondary memory consist of?

- RAM - Hard Disk

What does primary memory consist of?

- Registers - Level 1 & 2 cache.

What are characteristics for secondary memory?

- Slow - Large - Inexpensive -Furthest from CPU

What are the pipelining steps?

1. Instruction fetch 2. Instruction decoded and register fetch 3. Execute 4. Memory access 5. Register write back

What are two primary methods for data parallel computers?

1. SIMD processors 2. Vector processors

What is SIMD processor?

A Single Instruction-stream Multiple Data-stream of a large number of identical processors that perform same sequence of instructions on different sets of data.

7. Sociologists can get three possible answers to a typical survey question such as "Do you believe in the tooth fairy?" - namely, yes, no and no opinion. With this in mind, the Sociomagnetic Computer Company has decided to build a computer to process survey data. This computer has a trinary memory - that is, each byte (tryte?)consists of 8 trits, with a trit holding a 0, 1, or 2. How many trits are needed to hold a 6-bit number? Give an expression for the number of trits needed to hold n bits.

A byte is equal to 8 bits. Here, the computer has a trinary of memory that is each byte consists of 8 trits. A trit is holding 0, 1 or 2. Sixty-four 6-bit numbers exist, so 4 tries are needed. In general, the number of tries, k, needed to hold n bits is the smallest value of k such that 3^k >= 2^n.

What is vector processor?

A vector processor appears to the programmer very much like a SIMD processor. Like a SIMD processor, it is very efficient at executing a sequence of operations on pairs of data elements. But unlike a SIMD processor, all of the operations are performed in a single, heavily pipelined functional unit.

What does the cache memory do?

Combine a small amount of fast memory with large amount of slow memory. Cache Memory is a memory which is large and almost acts like a fast memory.

2. What is the purpose of step 2 in the list of Sec. 2.1.2? What would happen if this step were omitted?

Instruction Execution: The step 2 in the CPU instruction execution process is to change the program counter (PC) so as to point to the given instructions as the program counter must increment so as to point to the next instructions. If the step is to be omitted then the initial instruction would be executed by computer system forever. ---------------------------------------- The program counter (PC) must be incremented to point to the next instruction. If this step were omitted, the computer would execute the initial instruction for ever.

What is MIPS

Millions Instruction Per Second Add to this ...

1. Consider the operation of a machine with the data path of the Figure 2-2. Suppose that loading the ALU input registers 5 nsec, running the ALU takes 10 nsec, and storing the result back in the register scratchpad takes 5 nsec. What is the maximum number of MIPS this machine is capable of in the absence of pipelining?

The internal part of the organizations of the typical von Neumann CPU is called as the data path and it consist of the registers and the arithmetic logic unit or ALU and this connects the buses to the pieces. The load instructions in the ALU input registers take the 5 nsec, and tuns the ALU and this takes the 10 nsec and thus stores the result back into the scratchpad registers and this takes 5 nsec. The data path cycle in it is 20 nsec. The total time is 20 nsec for one cycle. To calcualte the MIPS, divide one second with 20 nsec. Millions of instructions per second (MIPS) = (1*10^9 nsec)/20 nsec = 50,000,000 nsec Therefore, the maximum number of MIPS this machine is capable of in the absence of pipelining is 50 MIPS.

To be able to run two parallel pipelining ...

The two instructions must not conflict over resource usage (e.g., registers), and neither must depend on the result of the other.