Chapter 7 - Input/Output

Input/Output Module

A "mediating" or interface translation device

USB Types

Each type can be different speeds (2.0, 3.0) except for C which is 3.0 or higher Type A - normal Type B - printer usb cable Type C - reversible

Point-to-Point Link

Dedicated communication path from I/O module to device -EIA 232 Serial Link -IEEE 1284 parallel link

First Party

Device itself does the work and NO external DMA controller is involved

Multipoint Link

Shared communication path from I/O module to multiple devices -USB -IEEE Firewire

IBM zEnterprise EC12 Mainframe

Super computer! • Physical size of 5'x6'x6' and over 5,000 lbs • up to 101 processors with 6 cores each -----This is 300 times the amount of processing cores as in your laptop! -Up to 1024 total PCIe or InfiniBand devices! --You could have 1024 GTX 2080 ti graphics cards!

External SATA (eSATA)

Variant of SATA for physically separated devices

InfiniBand Operation

• 16 logical channels (virtual lanes) per physical link • One lane for management, rest for data

Programmed I/O

• CPU has direct control over I/O • CPU waits for I/O module to complete operation after each unit of storage moved • "wastes" CPU time • Synchronous serial operation between CPU and I/O module

Interrupt Driven I/O - Basic Operation

• CPU issues read command • I/O module gets data from peripheral while CPU continues other work • I/O module interrupts CPU when device operation is complete and data is ready • CPU requests data • I/O module transfers data

I/O Commands

• CPU provides address via system bus • CPU issues a command via system bus - one of following: -Control -Test -Read data -Write data

Programmed I/O - Basic Operation

• CPU requests I/O operation • I/O module performs operation • I/O module sets status bits • CPU checks status bits periodically • I/O module does not inform CPU directly • I/O module does not interrupt CPU • CPU may wait and check status continuously or periodically come back later to check status

DMA Operation

• CPU tells DMA controller:- -- Memory Read/Write operation -- Device address -- Starting address of memory block for data -- Amount of data to be transferred • CPU carries on with other work • DMA controller deals with transfer • DMA controller sends interrupt when finished

PC DMA - Bus Mastering

• Conventional DMA is "third party" -these DMA controllers are old and very slow -They are also tied to the old ISA bus -PCI bus forced the old way of doing DMA transfers to be changed

DMA Transfer Cycle Stealing

• DMA controller takes over bus for a cycle • Transfer of one word of data data • Not an interrupt • CPU suspended just before it accesses bus • Slows down CPU but not as much as CPU doing the memory operations itself

Identifying Interrupting Module - Alternatives

• Different interrupt line for each module • Software poll • Daisy Chain (hardware poll, vectored) • Bus Arbitration (vectored)

Implementing Multiple Interrupt Priorities

• Each interrupt line has a priority • Software polling • Daisy chain polling • Bus arbitration

Direct Cache Access

• Evolution of higher speed network I/O devices and interfaces is starting to exceed traditional DMA controller capabilities -100 Gbps Ethernet & high speed WiFi • Processing of lower-level data packets by the network drivers (software) results in excessive cache operations in last-level cache -Intel Xenon processors use this

I/O Channel

• Executes its own instructions stored in main memory (or its own memory) • CPU directs a I/O channel to execute specific programs unique to task required

I/O Module Design Decisions

• Hide or reveal device properties to CPU • Support multiple or single device • Detailed control of device functions or leave for CPU • Operating systems will typically define some standards for the logical interface to an I/O module (Unix treats peripherals as files)

Serial Advanced Technology Attachment (SATA)

• High speed serial point-to-point link - Latest standard (SATA 3) is 6 Gbps -AHCI Compatible -Two twisted pair conductors (4 wires) for data, bi-directional -Designed to control power and start-up

Direct Memory Access (DMA)

• Interrupt driven and programmed I/O require active CPU intervention to move data to and from memory • DMA developed to address this problem

CPU Viewpoint of Interrupt Driven I/O

• Issue read command • Do other work • Check for interrupt at end of each instruction cycle • If interrupted: - Save context (registers) - Process interrupt - Restore context for next - Continue normal processing

Interfacing Devices to I/O Modules or I/O Channels

• Many configurations of links and buses possible. • Examples: FireWire, InfiniBand, SCSI, USB, Serial ATA • Communications to device are either serial or parallel

PC DMA - Bus Mastering, cont'd

• Modern hard disks using IDE or ATA I/O bus use first-party DMA transfers

I/O Channels and I/O Processors

• Next evolutionary step in I/O modules are I/O Channels • CPU is increasingly relieved of I/O related tasks • I/O channels and I/O processors can execute their own software programming

Interrupt Driven I/O

• Overcomes CPU waiting in a "busy loop" checking status • No repeated CPU checking of device • I/O module interrupts CPU via system bus signal when ready

DMA Function

• Requires additional Module (hardware) on bus • DMA controller takes over from CPU for the transfer of data between I/O modules and memory

External Device Interface

• Requires input of control signals to command operations of device • Requires output of status signals to provide information about device operations • Requires input or output internal data via data buffers from the attached computing system • Requires input or output of external data via transducer from the external environment

DMA Configurations (3)

• Separate I/O Bus • Bus supports all DMA enabled devices • Each transfer uses bus once • CPU is suspended once

I/O Addressing via Isolated I/O

• Separate address spaces for main memory and I/O modules/devices • System bus needs I/O or memory select line • Also use special commands for I/O

DMA Configurations (2)

• Single Bus • Integrated DMA controller or Controller may support >1 device • Each transfer uses bus once • CPU is suspended once

DMA Configurations (1)

• Single Bus, Detached DMA controller • Each transfer uses bus twice • CPU is suspended twice

Multiplexor Channel

• controls multiple devices • concurrently works with multiple devices • each device has its own controller (I/O module)

Selector Channel

• controls multiple devices • works with one device at a time • each device has its own controller (I/O module)

InfiniBand Links and Signaling Rate

• links can be aggregated (4 links or 12 links) to increase throughput

InfiniBand Links and Data Rate

2 giggly bits to 300 giggly bits depending on encoding and link width

Addressing I/O Devices

-contain device identifier (address) -Each I/O module given unique identifier • If multiple devices per module, each device given unique identifier for the module • Combined module/device address is unique for every device attached to system • Two addressing modes are possible when I/O modules, CPU and main memory share common bus

USB

-serial bus standard -Used for peripherals (mouse, keyboard, etc.) -Hot plug, plug and play (PNP) --can plug in while device is on

Fly-By

- Data does not pass through and is not stored in DMA chip - DMA only between I/O port and memory • Not between two I/O ports or two memory locations

Daisy Chain (hardware poll, vectored)

- Interrupt Acknowledge sent down a chain - Module responsible places vector (ID number) on the system bus - CPU uses vector to identify interrupt handler routine that needs to execute

Bus Arbitration (vectored)

- Module must claim the bus before it can raise interrupt - Only one I/O module at a time can do this - CPU acknowledges interrupt and module places its vector on system bus - CPU can now execute correct handler

I/O Controller or Device Controller

- More primitive than I/O channel - Provides more detailed device interface to CPU - Requires more CPU control - Commonly controls one device - Typical of PC

I/O Channel or I/O Processor

- Performs a large amount of the processing required for I/O operations - Takes most of the burden off of CPU - Commonly controls multiple devices - Typical on large systems (mainframes)

Thunderbolt Peripheral I/O Interface

-Combines PCIe and DisplayPort interfaces -Up to 10 Gbps each direction (20 Gbps total) -Daisy chain up to 7 devices --2 can be displayport devices -10W of power to devices

I/O Module Functions

-Control & Timing -CPU Communication via system bus -Device Communication -Data Buffering -Error Detection

I/O Addressing via Memory Mapping

-Devices and main memory share one address space -I/O looks just like memory read/write

DMA and Memory Caching

- DMA changes to memory may require invalidating cache or making areas of memory non-cacheable

Software poll

- has to check the status of each I/O module to find who caused the interrupt - large use of system resources

Different interrupt line for each module

- only practical to provide a few system bus lines for this purpose - only usable in a small system • will still need to use polling or bus arbitration

Bus Mastering

- the device becomes the "master of the bus" -allows the hard disk and memory to work without relying on a DMA controller built or any support from the CPU -requires the use of the PCI or PCIe bus

Input/Output Architecture Overview

-Peripherals cannot connect directly to system bus to communicate with the processor or main memory -I/O Module between system bus and external peripheral

Input Output Techniques

-Programmed I/O -Interrupt Driven I/O -Direct memory access (DMA)

InfiniBand "Fabric" I/O Network

-Replaces PCI in servers -Up to 300 Gbps -Used in data centers -Probably very expensive

Isochronous I/O Connections

-Support real-time applications • Data must be delivered at just the right speed - connection must allocate resources on both ends to maintain real-time

External Devices

Known in general as "peripherals" Human interactions -Display, printer, keyboard, mouse Machine interactions - Monitoring status and control of operation - Includes storage devices, like hard disk Communications - Communicating with a data link or network - Example: Network Interface Card (NIC)