Computer Architecture Final Exam

Sign Magnitude

1 for negative in highest bit

Frame

A fixed-size block of physical memory that corresponds to a page.

Which one of the following statements describes a parameterized processor?

A processor that accepts a set of values that controls the computation

What is firmware?

A processors series of steps that are build into the hardware

Which one of the following is a situation that may cause a stall in pipelining?

A program call to a subroutine

Microprocessor

A programmable device dedicated to the control of a physical system

What is register spilling?

A situation that occurs when a register is needed for a computation and all available registers already contain values

High order bits select _____? Low order bits select _____?

Bank Word within bank

A direct mapped memory cache has several of the following characteristics. Which one is not a characteristic?

It contains multiple, independent caches.

A processor instruction consists of three components. They are:

The op code, the operands, and the results

List 4 motivations for the user of virtual memory.

- Allows multiple memory modules easily. - Provides homogeneous integration of differing physical memories - Provides programmer convenience and transparency. - Support for multi programming and protection

Which one of the following statements is NOT true about a bus?

A bus consists of a single wire that transfers data and control signals between units.

Which one of the following statements is NOT a characteristic of a bus?

A bus contains many electronic components.

What is used to ensure memory systems achieve parallelism?

A bus.

A CPU can have several different modes of operation. Two different modes could have all but which one of the following differences?

A different internal speed of the processor

Which one of the following statements best describes the difference between an analog and a digital computer?

A digital computer is one that performs a sequence of steps on data items that have discrete values and an analog computer is one that operates on values that continuously vary over time.

Page

A fixed-size piece of memory used in demand paging. Size is generally 4KB

Which one of the following statements is true regarding the relationship between micro-coded instructions and macro instructions?

A macro instruction is normally a combination of micro-code instructions

Which one of the following statements is true regarding the relationship between micro-coded instructions and macro-instructions?

A macro instruction is normally a combination of micro-code instructions

What is an instruction pipeline?

A method used to permit processors to complete more instructions per unit of time by overlapping the five steps used to process each instruction.

Which one of the following circuits is NOT considered one that maintains state?

A multiplexor

Which one of the following statements best describes the difference between a cache hit and a cache miss?

In a cache hit, the data that has been requested is found in the cache memory and in a cache miss, the data that has been requested is not found in the cache memory.

Demand Paging

Bring a page into memory only when it is needed

Memory is expressed in ______? Transmission speeds are expressed in _____?

Bytes and bits

Which one of the following statements is NOT true of cache memory?

Cache is relatively inexpensive memory.

Which one of the following statements is true regarding the movement of data in the memory hierarchy?

Data items move up the hierarchy when they are read and down the hierarchy when they are written.

One's complement

Invert all bits

Two's Complement

Invert and add 1

Which one of the following is NOT a characteristic of the fetch-execute cycle?

It is implemented by processor software

There have been three types of cache for some time now, L1, L2, and L3. Historically they have differed based on their placement in a computer. Today they based more on the size of the cache. Which one of the following sequences are listed from the smallest cache to the largest?

L1, L2, L3

Explain why SRAM generates more heat than DRAM?

Operates at high speeds and requires a constant supply of power to maintain memory.

Coprocessor

Operates in conjunction with and under the control of another processor

Which one of the following statements regarding computer memory is correct?

Optimal performance is achieved by arranging a set of memory technologies arranged in a conceptual memory hierarchy.

Resident Set

The set of pages that are currently resident in physical memory.

Page Table

The table containing the virtual to physical address translations in a virtual memory system. The table, which is stored in memory, is typically indexed by the virtual page number; each entry in the table contains the physical page number for that virtual page if the page is currently in memory.

In a latch what happens when the enable line is set to 1?

The value that is considered the latch output is set to the value of the input

Which one of the following statements is NOT true of fixed length instructions?

They are more efficient than variable length instructions since there is no wasted space.

Which one of the following is NOT true about condition codes in a processor?

They are only used to detect exception situations in a program's execution

Which one of the following statements is NOT true regarding transistors used in a computer.

They are operated by a 110 volt alternating current

T/F: A 0-adddress instruction architecture is also known as stack architecture since operands are kept on a run-time stack.

True

T/F: A decoder is a single integrated circuit that uses a binary value to map an input to set of outputs

True

T/F: A latch has an input and an output as well as an extra input called an enable line.

True

T/F: A phone conversation is considered a form of full duplex communication

True

T/F: A processor does not interact directly with an external device, but interacts through a controller for that external device.

True

T/F: Data throughput, also known as speed, is the amount of data that can be transferred per unit of time.

True

T/F: Horizontal microcode exploits parallelism in underlying hardware to provide better performance than vertical microcode

True

T/F: In order to have a cache hit, at least one cache miss must have occurred.

True

T/F: In parallel data transfer, multiple wires are used to each transmit a single bit at any given time.

True

T/F: It takes much longer to fetch operands from memory than from registers

True

T/F: Preloading cache is an optimization technique used to improve cache's overall performance.

True

T/F: The primary function for most external devices is data transfer.

True

T/F: The two privilege levels in a CPU are user mode and kernel mode

True

T/F: if an instruction operand is implicit it means that the location of the operand is already known.

True

Describe a hole in virtual memory

gap of unused space in the address space of a process. These gaps occur when memory is allocated to a process in non-contiguous chunks, leaving unused areas between them

Byte Addressing

refers to the method of addressing individual bytes of memory, where each byte in memory is assigned a unique address

Byte Alignment

storing data in a way so that each data element occupies an address in memory that is a multiple of the element's size in bytes.

Bus hardware only supports two operations and that is known as

the fetch-store paradigm

In the LRU replacement policy, the item to be ejected from cache once cache is full is?

the item in cache was last referenced the longest time in the past

Density

the number of bits that can be represented on a standard sized chip. Higher ______ leads to more memory but more heat and memory consumption.

Latency

the time between the start of an operation and its completion. Lower __________ is better because it means that data can be accessed faster, reducing the time that the CPU has to wait for data to be delivered from memory.

Word Size

the transfer size of each block (word)

Memory Management Unit (MMU)

translates the virtual addresses that a processor uses into physical addresses, allowing the processor to access memory efficiently and securely

List a couple of ways a programmer can optimize performance of a virtual address paging system

Grouping related data items on same page and referencing arrays in an order that accesses contiguous memory locations are two examples of optimizing performance with a virtual address paging system. I believe using large page sizes can also increase performance however it could lead to wasted memory.

What is the result of a processor's clock differing from the clock used by memory?What has been done in computers to overcome this?

If the processor's clock differs from the memory clock, everything will work just that it will be slower as one side will have to wait for the other. To solve this problem, a synchronous clock system is used. The two clocks' pulses are aligned with each other.

The width of a bus refers to the

number of parallel lines contained in the bus

Virtual Memory

process of optimizing RAM storage by borrowing hard drive space

Which one of the following statements is NOT true regarding absolute and relative branching in the fetch-execute cycle?

A subroutine call is similar to a relative branch

Which one of the following statements regarding buses is NOT true?

All buses are internal to a processor and located on the processor chip.

What is an immediate operand in a processor instruction?

An operand that provides a signed or unsigned constant

T/F: A block in cache is known as a block line

False

T/F: A cache coherence protocol is a set of procedures that are used to prevent problems when two processors share the same cache memory.

False

T/F: All operands in a processor instruction can only contain a single value

False

T/F: At computer start-up, the program to execute is located in RAM

False

T/F: Clock synchronization means that clock signal must travel to all chips sequentially

False

T/F: Data multiplexing refers to the process of separating a stream of data that was created by combining several data sources into one data stream into its individual data streams.

False

T/F: Explicit type operator encoding requires more opcodes than implicit type operator encoding

False

T/F: Feedback is using the output of circuit as an input of a different circuit

False

T/F: Latency is a measure of time to perform a transfer between a processor and an I/O device and that time is always the same for read operations and write operations.

False

T/F: References to instructions are usually random which provides a low locality of reference.

False

T/F: Replication refers to code that repeatedly processes the next item in a set

False

T/F: Serial data transfer generally requires more complex hardware than parallel data transfer.

False

T/F: The hit ratio is the number of hits in a sequence of events that are satisfied by the cache

False

T/F: The signals between a processor and an I/O device are called self-checking when the I/O device changes its clock pulse to be synchronized with the processor's clock pulses.

False

General-purpose processors

Full function, powerful processor such as a CPU in a computer

Memory Banks

Location where memory (RAM) is stored, located close to CPU to communicate quickly

Which one of the following statements is true regarding the memory in a computer?

Memory is classified as volatile if the contents disappear when power is removed and nonvolatile if the contents do not disappear even after power is removed

How must a horizontal micro instruction be modified to add more control signals?

Memory must be added to the micro instruction to allow for the expansion of the micro instruction's number of control bits

How must a horizontal microinstruction be modified to add more control signals?

Memory must be added to the micro-instruction to allow for the expansion of the micro-instruction's number of control bits.

Define all 3 control bits used in virtual address paging.

Presence Bit = determines if page is resident in memory Use bit = determines how often page is accessed. Good for determining if should be kept in memory Modified bit = determines whether the page has been changed

Dynamic Random Access Memory (DRAM)

RAM that does need to be periodically refreshed. This is because every bit of information is stored in a separate capacitor Slower than SRAM Volatile

Static Random Access Memory (SRAM)

Retains memory for as long as power is being supplied; does not need to be constantly refreshed; used to access the most frequently used data, as it is faster.

Embedded system processor

Runs low power sophisticated electronic devices such as a smart phone

Resident

When a page is loaded into physical memory.

Both write through and write back cache techniques place a copy of an item in cache but then how do they differ?

Write through always sends a copy to physical memory and write back only sends a copy to physical memory when necessary

Word

a block of N bits in physical memory

There are three types of potential bus errors described in the lecture. Which one of the following is not one of them?

a power outage that disables the bus

What are the three conceptual lines on a bus?

address lines, control lines, and data lines

Transfer Size

amount of memory that can be transferred simultaneously

Physical Address

an index for a certain word in memory

An operating system allows for concurrent processing. How does it prevent one application from interfering with another application?

each application will run as a separate process and have its own virtual address space.