Computer Systems

CPU and Main Memory: 8 Byte Reads

- When the CPU wants to read eight bytes of data from memory, it puts the address of the first byte to be read in the MAR, and sets the read line to 1. - When the memory unit detects that the read line is set to 1, it gets the address off of the address bus, gets the eight bytes at that address from memory, and puts them on the data bus, and sets the memory read complete line to 1. - The 8 bytes from the data bus are transferred to the MDR when the CPU detects that the memory read complete line is 1.

CPU, Main Memory and 8 Byte Writes

- When the CPU wants to write data to memory, it puts the address of the first byte to be written in the MAR, puts the data to be written in MDR, and sets the write line to 1. - When the memory unit detects that the write line is set to 1, it gets the address off of the address bus, gets the eight bytes to be written from the data bus, and writes them to memory at the address it got from the address bus.

Process Abstraction

- abstraction provided by OS - a process is a *program in execution* - every program is capable of being process, but may not be one until execution - Allows a program to execute with the view that it is the only thing running (though it is virtually never the only thing running) - Application does not have to worry about sharing CPU time, or memory space (even though it virtually always actually is sharing those resources) - Each process in the system is managed by the OS using a process control block (PCB). - task = process The PCB has information about the current state of the process (ready, running, blocked), and data that the OS uses to restore the process (PC and register values) to its previous state in order to resume the process after it goes from a blocked state (for input or output, for example) to a running state. The process abstraction allows the CPU to be utilized more fully. Tradeoff: It increase throughput (the number of processes which can complete per unit time) at the cost of latency, or a delay in completion time for each process.

file abstraction

- also provided by OS - file collection of bytes sitting in some kind of storage - opening a file or executing the program contained in a n executable file, copies the bytes from disk into RAM - interpretation of bytes is determined by the software which is used to open the file

why use tape?

- cheap - security

controller

- chips that reside on the motherboard - IO device connected to bus with controller

ALU

- combinational logic to implement all of the Arithmetic and Logical Instructions which the CPU can perform - execution of these instructions sets some or all of the flags or condition codes - computes new data and address values

buses

- data movement - channels for transferring data from one system component to another (or within component) - consists of wires, or conductive circuit traces - system memory bus divided into address bus and data bus, as well as control lines - typical transfer fixed-size chunks known as 'word'

DRAM

- dynamic random access memory - each bit stored as a charge on a capacitor using 1 transistor - retains value or state for only 10-100 milliseconds while power is applied - used in main memory - slower access time than SRAM (~10x)

4 examples of I/O, & how are they connected to the IO bus?

- mouse - keyboard - screen/display - disk drive for long term storage Each I/O device is connected to the I/o bus by either a controller or an adapter

Address bus

- one-way - CPU sends address to memory

register file

- organized as array of registers - each register is accessible by index - Intel has 16 registers, indexed 0 to 15

adapter

- pluggable slot on the motherboard - IO device connected to bus with adapter

memory hierarchy

- refers to concept of building memory subsystem which consisted of various levels of storage - storage at higher level has faster access time, smaller size - lower levels slower access time, larger size, more expensive per byte - higher level acts as a cache for storage at level below it - data transfers from lower level to higher level done in 'blocks' or groups.

volatile memory

- retaining storage requires power - RAM/caches

cache

- smaller faster devices act as a staging area for larger slower devices - works because of property of locality in memory access - faster memory, more expensive to build, so limit to keep affordable - develop caching strategy for fast memory to be kept small - memory system with effective caching can perform data access at an average speed close to that of the fastest storage, but effective size and cost per byte close to largest storage device

SRAM

- static RAM - each bit is implemented with a six transistor circuit - each bit will retain its current value or state indefinitely as long as it has power - resistant to electrical noise - faster access time than DRAM, but costs more -CPU cache

Nonvolatile memory

- storage that retains data without power - disks /drives

MAR (Memory Address Register)

- to put an address on the address bus (to send it to the memory unit) - CPU memory access register - 64 bit register the CPU uses to put addresses for memory accesses on the address bus

MDR (Memory Data Register)

- to put data on the data bus, or to fetch data from the data bus - CPU memory access register - 64 bit register which the CPU uses to put data on the data bus for writes or to retrieve data from the data bus for reads from memory

Data bus

- two-way - CPU to memory or memory to CPU

data transformation

- type of computer hardware operation - changing a given bit pattern to a related one

data movement

- type of computer hardware operation - moving data from one system component to another, or within a given component - buses

data storage

- type of computer hardware operation - storing digital data in a form which balances considerations of cost, reliability, and access speed

IR

-Instruction Register - register where bits of instruction are stored in order for the instruction to be executed - before execution, bytes in memory pointed to by the PC will be brought into the IR, then instruction is executed

PC

-program counter - in CPU - address the CPU is currently executing - cannot be accessed by user

control lines are __ bit

1 bit

how big is a megabyte?

1,000,000 bytes 10^6

how big is a gigabyte?

1,000,000,000 bytes 10^9

how big is a terabyte?

1,000,000,000,000 bytes

two memory access registers in CPU

1. MAR: Memory Address Register - to put address on address bus to send to memory unit 2. MDR: Memory Data Register - to put data on the data bus, or to fetch data from the data bus

two different kinds of logic elements

1. combinational: - do not store state - no 'memory' - output depends on input 2. sequential (clocked): - capable of storing prior state - have 'memory'

3 types of hardware operations

1. data storage: storing digital data 2. data movement: moving data 3. changing bit pattern

Computer hardware operations

1. data storage: storing digital data in a form which balances considerations of cost, reliability, and access speed 2. data movement: moving data from one system component to another, or within component 3. data transformation: changing the given bit pattern to a related one

two types of locality

1. spatial: piece of data accessed, data nearby locations may be accessed soon 2. temporal: piece of data accessed, same piece of data may be accessed again in near future

2 ways CPU does data transformation

1. state elements 2. combinational circuits

data transformation in the CPU is done with a combination of ? (2)

1. state elements, store inputs and output of the operation 2. combinational circuits, actually perform the transformation (modify the appropriate bits in the input to produce output)

how big is a kilobyte?

1000 bytes

CPU has ~___ registers

16

how big is a byte?

8 bits

Amdahl's Law

A system's speed is determined by its slowest component. To speed up, large fraction of overall system must be increased not just one piece

What does the ALU do?

ALU = Arithmetic Logical Unit purpose = computes new data and address values

What does ALU stand for

Arithmetic Logical Unit located in CPU

4 condition codes we care about

CF, ZF, OF, SF (carry, zero, overflow, sign)

Central processing unit

CPU engine that interprets/executes instruction pointed at by the PC (program counter)

CPU

Central Processing Unit; the brain of the computer. engine that interprets/executes instruction pointed at by the PC (program counter)

DMA

Direct Memory Access: A technique for transferring data from main memory to a device without passing it through the CPU

two types of random access memory technology

SRAM and DRAM

When are the 8 bytes from the data bus transferred to MDR?

The 8 bytes from the data bus are transferred to the MDR when the Counselor detects that the memory read complete line is 1

Tradeoff for process abstraction

Tradeoff: It increase throughput (the number of processes which can complete per unit time) at the cost of latency, or a delay in completion time for each process.

True/False: Both hardware and software are required for a computer system

True

True/False: CPU is faster than main memory

True

True/False: Every system requires some persistent, nonvolatile storage in case of when power is off

True

True/False: IO bus is long for more connection points

True

True/False: The 8 bytes from the data bus are transferred to the MDR when the Counselor detects that the memory read complete line is 1

True

True/False: When the memory unit detects that the read line is set to 1, it gets the address from memory, and puts them on data bus, then sets memory read complete line to 1

True

True/False: The CPU has two registers which it uses for memory accesses

True: MAR- address bus to memory MDR- data bus

USB

Universal Serial Bus. A type of connection used to attach devices such as flash drives, scanners, cameras, and printers to a computer.

Summarize CPU main memory and 8 byte reads

When CPU wants to read, give 8 byte address to memory address register [mar], set read line to 1. When memory unit sees the read line is set to 1, it gets number from address bus, goes to that address, puts data at that address on data bus, sets read complete line to 1.

EFLAGS register

a register in x86 processor with one bit flag set by ALU instructions

main memory

a temporary storage device that holds both a program and the data it manipulates while the processor is executing the program DRAM (dynamic random access memory) linear array of bytes, each with its own unique address

Direct memory access

an I/O technique that allows a control unit to access main memory directly and transfer data without the intervention of the CPU

Instruction Set Architecture ISA

an abstraction that specifies: - processor state - format of instructions - effect of each instruction will have on the processor state - PC's use x86 - same ISA can be implemented in multiple different ways

main memory is a linear ______ of bytes, each with a unique address

array

information in a computer is represented as groups of ____

bits

data transfers from lower level to higher level done in ______

blocks or groups

Running throughout the system is a collection of electrical conduits called ______ that carry bytes of information back and forth between components

buses

channels for transferring data from one system component to another (or within a component)

buses

data movement is done with ___?___

buses

main memory organized as linear array of _____, each with its own unique address starting at zero

bytes

A memory system with effective _______ can perform data access at an average speed close to that of the fastest storage, but can have an effective size and cost per byte close to that of the largest storage device

caching

Purpose of buses

carry bytes of information back and forth between components

IO devices connected to IO bus thru either a __________ or an ________

controller (chips on motherboard) or an adapter (pluggable slot on motherboard)

store

copy a byte or a word from a register to a location in main memory, overwriting the previous contents of that location

load

copy a byte or a word from main memory into a register, overwriting the previous contents of the register

operate

copy the contents of two registers to the ALU, perform an arithmetic operation on the two words, and store the result in a register, overwriting previous contents of that register

jump

extract a word from the instruction itself and copy that word into the PC (program counter), overwriting the previous value of PC

True/False: The data saved in main in a file will remain there even after the program stops running but will be wiped out when the computer is turned off.

false only stored in main memory while system power is on

True/False: data bus is one-way

false: address bus is one-way bus and data bus is two-way bus

True/False: gigabyte > megabyte

false: byte < kilobyte < megabyte < gigabyte < terabyte

True/false: You can only transfer data from one component to another component

false: can also transfer data within the same component

True/False: The memory bus is very long, so it has room to store all of the addresses

false: memory bus needs to be short, for fast access IO bus is long for more connection points

solid-state data storage uses state elements - latches or _____-______

flip-flops

a computer system is a mixture of __________ and _________

hardware and software

Where are MAR and MDR?

in CPU

When the memory unit detects that the read line is set to 1, what happens?

it gets the address from memory, and puts them on data bus, then sets memory read complete line to 1

load vs store

load: copy a byte or a word from main memory into a register, overwriting the previous contents of the register store: copy a byte or a word from a register to a location in main memory, overwriting the previous contents of that location

Control

logic circuitry to control instruction fetching and execution

Address 0 means starts at byte 0 in ____ memory

main

Bottleneck in modern system is ____ _______ or RAM

main memory

What does CPU do to read 8-byte address from memory?

puts address of the first byte to be read in the MAR, set read line to 1

The larger memory gets, the longer it takes to ____ from it

read

registers are found in the ________ file in the CPU

registers are found in the register file in the CPU each register is a word size, with a unique name

when CPU wants to read 8 byte address from memory, it puts address of the first byte to be read in the MAR and sets the read line to __?

sets read line to 1

In order for a bus to be fast, it has to be _____

short

True/False: registers are not directly accessible by user programs

true

True/False: The system memory bus is divided

true: into address bus and data bus as well as some control lines

Since nonvolatile/volatile has generally faster access time, this is why many systems use this type of memory storage

volatile

number of bytes in a word

word size a fundamental parameter that varies across systems; most systems today use word sizes of either 4 bytes or 8 bytes (32 or 64 bits)

Buses are designed to transfer fixed-size chunks of bytes known as _____

words