Final Exam (CS 2110)

LC-3 ADD

1) ALU grabs the register value from SR1 from the register file (A input) 2) Offset from IR is SEXTed and loaded as B input 3) Operation is performed in the ALU and GateALU opens, allowing data to flow onto the bus 4) Ld.CC flag is switched on 5) Ld.Reg flag is switch on and the register specified by DR is loaded with this information

LC-3 FETCH

1) Assert GatePC to drive the PC value onto the bus 2) Turn on LD.MAR to load this value into the MAR register and at the same time, PC will be incremented by selecting that line in the PCMux and loading PC 3) Assert MEM.EN and LD.MDR bits to enable memory to be read and the data at this address to be loaded into MDR

LC-3 STR

1) Offset is added to the value in the base register to compose a memory address. Value located in the source register will be stored in this finalized memory address. 2) In the first clock cycle, memory address is calculated by adding the offset from IR to the value in the base register 3) Value is driven onto the bus by GATEMARMUX and is loaded into MAR via LD.MAR 4) In the second clock cycle, the value in source register gets passed through the ALU and is driven onto the bus with GATEALU. 5) Value is loaded into MDR via LD.MDR 6) In the final clock cycle, MEM.EN and MEM.WE are switched on, allowing the value in MDR to be written at the address located in the MAR

With n select bits in a multiplexor you can have

2^n inputs and 1 output

D Flip-Flip

A circuit implementing edge-triggered sequential logic

Gated D Latch

A form of level-triggered sequential logic that has more control over state than the SR latch

Stack build-up

ADD R6, R6, -4 STR R7, R6, 2 STR R5, R6, 1 ADD R5, R6, 0 ADD R6, R6, -5 STR R0, R5, -1 STR R1, R5, -2 STR R2, R5, -3 STR R3, R5, -4 STR R4, R5, -5

Registers

Built out of latches or flip-flops, this circuitry holds values

What kind of logic do D Flip-Flops use?

Edge-triggered logic

(True/False) The BR and JMP LC-3 instructions use the same addressing mode

False; JMP is based on a register, while BR uses PCOffset

(True/False) Sign-extending the 8-bit two s-complement integer 0xA7 to 32 bits yields 0xFFFFFFA6

False; it'd be xFFFFFFA7

(True/False) An 8-bit two's-complement integer can represent numbers in the range -127 to +127

False; the range is -128 to +127

(True/False) The instruction TRAP x27 loads hexadecimal 27 into the PC

False; this instruction loads the value at the address x27 (trap vector table) into PC

(True/False) The two's-complement of 0x0000 is 0xFFFF

False; to do the two's complement, we invert and add 1, so we'd get 0x0000

Traps

HALT, OUT, PUTS, GETC

LC-3 Decode

IR contents are decoded, leading to the control logic providing the correct control signals

LC-3 Clock Cycles

In order to prevent short circuiting, LC-3 runs on clock cycles (alternating 0/1's). They make sure every wire/component holds one value and a time.

Stack breakdown

LDR R4, R5, -5 LDR R3, R5, -4 LDR R2, R5, -3 LDR R1, R5, -2 LDR R0, R5, -1 ADD R6, R5, 0 LDR R5, R6, 1 LDR R7, R6, 2 ADD R6, R6, 3 RET

What kind of logic do Gated D Latches use?

Level-triggered logic

What kind of logic do RS Latches use?

Level-triggered logic

LC-3 Memory

On load: loads the address of the data in the Memory Address Register (MAR) and memory is read and the data at that memory is delivered to MDR On store: data is placed in the Memory Data Register (MDR) and the address in which the data will need to be stored is placed in the MAR and if the proper signals are asserted, the data will be inserted into memory at the proper address

Three ways PC gets updated

PC + Offset: due to a branch instruction, the incremented PC will be added to an offset to generate the new PC branching address - incremented PC = offset PC + 1: The general format for the PC being updated - it increments by one The Bus: gives you a value (rarely used)

STR

STR is similar to ST, except that the memory address is calculated by adding a base address to a value located in a register

For what purpose are multiple sign-extenders (SEXT) connected between IR and ADDR2MUX in the datapath of the LC-3?

Sign-extending offset bits pulled from IR to compute the addresses for different instructions. Sign-extending enables calculating addresses before or after.

Why is there a need for three SEXTs to be connected to ADDR2MUX?

Since there are 3 offset modes that need sign extension: 1) PC-relative with 9-bit offset 2) PC-relative with 11-bit offset 3) Base register with 6-bit offset

RS Latch

The simplest form of sequential logic

(True/False) In C, computing (14 & 19) gives the result of 2

True

(True/False) The hexadecimal number 3F07 can be representing in octal as 37407

True

(True/False) A two's-complement integer can be multiplied by two by shifting it one bit to the left, filling the low-order bit with zero

True; assuming we have enough bits that we won't overflow

(True/False) Any Boolean function can be calculated by a proper combination of NOR gates

True; the same is true with NAND gates

(True/False) Representing the number -81 in two's-complement requires at least 8 bits

True; with 7 bits, we can represent [-64, 63], but with 8 bits, we can represent [-128, 127]

LC-3 ALU

Two inputs: data from the register file, data from the register file or an offset generated by IR ALU will drive the output onto the bus. As well, with a certain flag set, this output will set the condition codes - N, Z, P based on the value of the output

LC-3 Bus

a 16-bit wire on the datapath that transfers data between components. Only one chunk of data can be on the bus at a time. To ensure this, there are tri-state buffer gates (GateALU, GateMARMUX, etc.) that will allow data to be driven to the bus only when the flag is set.

LC-3 Micro-controller

a finite state machine. Each of the different states determines what control signals will be asserted on the datapath.

Typedef

a keyword that allows you to create a new type that is an alias for an existing one. Example: typedef struct Dog { int tails; int feet; } Puppy;

LDR

a load operation that takes the memory address from a register, adds it to an offset, retrieves the data at the subsequent offset + address memory address, and loads it into the designated register (Ex. LDR R1, R0, 1)

It is impossible for overflow to occur when

a positive number and a negative number are summed together because the sum will always lie between these two numbers

HALT

an alias for a TRAP that stops the LC-3 from running

GETC

an alias for a TRAP that takes in a character input and stores it in R0

OUT

an alias for a TRAP that takes whatever character is in R0 and prints it to console

PUTS

an alias for a TRAP that will print a string of characters with the starting address saved in R0 until it reaches a null (0) terminating character

Video Buffer

an area of memory that is a 1D array for the entire screen where each element is an unsigned short (u16) representing each pixel on the screen.

The STACK

calling convention for recursive assembly. Stacks grow downwards (into lower memory).

Structs

data type in C that can contain multiple variables of different types. Define structs like this: struct myStruct { int number; char* letter; };

const

defines a variable as constant, meaning it cannot be modified

DMA

direct memory access. Access to memory that doesn't go through the CPU.

Right shift (binary)

divides by 2

Static variable inside a function

do not lose their value between function calls, since they are NOT stored on the stack

2's complement

flip bits, add 1

R5

holds the current frame pointer. Useful when you want to obtain values on the stack

LC-3 PC

holds the current program counter -- the address in memory of the next instruction to execute

R7

holds the current return address

R6

holds the stack pointer/top of the stack, increment/decrement this when you want to pop/push things on the stack

integer malloc declaration

int* myInt = malloc(sizeof(int));

Range in 2's Complement

k bits can represent the numbers -2^(k-1) to (2^(k-1))-1

LEA

loads the memory address into a designated register. Useful for printing strings by loading the address of the starting character into R0 via LEA and then calling PUTS

auto

local variables that are always stored on the stack. All variables are "automatically" declared auto unless they are declared something else.

Left shift (binary)

multiplies by 2

A decoder has a

n-bit inputs and 2^n outputs

Static function

not visible outside of the C file they are defined in (like Java private)

Static global variable

not visible outside of the C file they are defined in (like Java private)

Overflow

occurs when the sum of two positive numbers is a negative number or when the sum of two negative numbers is a positive number

ST

store operation that will store a value at a certain memory address (Ex. ST R0, ANSWER)

volatile

tells the compiler that the value may change at anytime, so it should not try to optimize the value away

extern

tells the compiler that the variable is declared in another file

Macros

tells the preprocessor to do something before compilation. Define macros like this: #define MACRO_NAME(ARGS) TEXT_REPLACEMENT

What happens to PC in FETCH?

the value held in the PC register is driven onto the bus and into the MAR register. Memory is then read at that address and the data from this memory access is stored in the IR register.

Pointers

variables that contain a memory address as well as the type of the data that's expected to be found at that address. Define like this: char *x; (x is a pointer to a char)

Use DMA to color the background of a GBA screen

void colorBackground(volatile u16 color) { DMA[3].src = &color; DMA[3].dst = videoBuffer; DMA[3].cnt = 240 * 160 | DMA_SOURCE_FIXED | DMA_DESTINATION_INCREMENT | DMA_ON }

C Source Files

where all your functions are written

C Header Files

where function declarations and global variables are shared between several source files to use a header file, put #include at the top of the source file(s)