Operating Systems Chapters 9-10

Under what circumstances do page faults occur? Describe the actions taken by the operating system when a page fault occurs.

Access to a page marked invalid causes a page fault. Meaning that the page has not been brought into memory. 1. We check an internal table (usually kept with the process control block) for this process to determine whether the reference was a valid or an invalid memory access. 2. If the reference was invalid, we terminate the process. If it is was valid but we have not yet brought in that page, we now page it in. 3. We find a free frame (by taking one from the free-frame list, for example). 4. We schedule a disk operation to read the desired page into the newly allocated frame. 5. When the disk read is complete, we modify the internal table kept with the process and the page table to indicate that the page is now in memory. 6. We restart the instruction that was interrupted by the trap. The process can now access the page as though it had always been in memory.

Consider a logical address space of eight pages of 1024 words each, mapped onto a physical memory of 32 frames. A. How many bits are there in the logical address? B. How many bits are there in the physical address?

Addressing within a 1024-word page requires 10 bits because 1024 = 2^10. Since the logical address space consists of 8 = 2^3 pages, the logical addresses must be 10+3 = 13 bits. Similarly, since there are 32 = 2^5 physical pages, phyiscal addresses are 5 + 10 = 15 bits long.

Why is it that, on a system with paging, a process cannot access memory that it does not own? How could the operating system allow access to other memory? What is the use of doing that?

An address on a paging system is a logical page number and an offset. The physical page is found by searching a table based on the logical page number to produce a physical page number. Because the operating system controls the contents of this table, it can limit a process to accessing only those physical pages allocated to the process. There is no way for a process to refer to a page it does not own because the page will not be in the page table. To allow such access, an operating system simply needs to allow entries for non-process memory to be added to the process' page table. This is useful when two or more processes need to exchange data they just read and write to the same physical addresses (which may be at varying logical addresses). This makes for very efficient interprocess communication.

Given memory partitions of 100k, 500k, 200k, 300k, and 600k (in order), how would each of the First-fit, Best-fit, and Worst-fit algorithms place processes of 212k, 417k, 112k, and 426k (in order)? Which algorithm makes the most efficient use of memory?

First-fit: 212k -> 500K (288 left) 417k -> 600k (183 left) 122k -> 200k (166k left) 426k -> nowhere big enough left! doh! Best-fit: 212k -> 300k (88k left) 417k -> 500k (83k left) 122k -> 200k (78k left) 426k -> 600k (174k left) Worst-fit: 212k -> 600k (388k left) 417k -> 500k (83k left) 122k -> 300k (266k left) 426k -> nowhere big enough again! the best fit algorithms uses memory most efficiently (it's also the only one that can even put all the processes into memory!)

Describe the following allocation algorithms: A. First fit B. Best fit C. Worst fit

First-fit: search the list of available memory and allocate the first block that is big enough. Best-fit: search the entire list of available memory and allocate the smallest block that is big enough. Worst-fit: search the entire list of available memory and allocate the largest block. (The justification for this scheme is that the leftover block produced would be larger and potentially more useful than that produced by the best-fit approach.)

Assume we have a demand-paged memory. The page table is held in registers. It takes 8 milliseconds to service a page fault if an empty page is available or the replaced page is not modified, and 20 milliseconds if the replaced page is modified. Memory access time is 100 nanoseconds. Assume that the page to be replaced is modified 70 percent of the time. What is the maximum acceptable page-fault rate for an effective access time of no more than 200 nanoseconds?

Let p be the page fault rate (the probability that a memory access results in a page fault). Then (1 − p) is the probability that a memory access costs 100 nsec. The probability that a page fault costs 20 msec is 0.7 ∗ p and the probability that a page fault costs 8 msec is 0.3 ∗ p. Since 1 nsec = 1000000 msec, (1 − p) ∗ 100 + 0.7 ∗ p ∗ 20000000 + 0.3 ∗ p ∗ 8000000 = 200 (14000000 + 2400000 − 100)p = 100 p = 100/(16400100) = 6.1 ∗ 10−6 = .0000061 = .00061%

Why are page sizes always powers of 2?

Part of the paging algorithm is to break up the logical address into a page and offset. The easiest way to do this is to break the address up into k bits for the page number and l bits for the offset. Since each bit position represents a power of two, with l bits for the offset, we are forced to have pages with size 2^l.

Consider the following page-replacement algorithms. Rank these algorithms on a five-point scale from "bad" to "perfect" according to their page-fault rate. Separate those algorithms that suffer from Belady's anomaly from those that do not. A. LRU replacement B. FIFO replacement C. Optimal replacement D. Second-chance replacement

Rank Algorithm Suffer from Belady's anomaly 1 Optimal no 2 LRU no 3 Second-chance yes 4 FIFO yes

Describe a mechanism by which one segment could belong to the address space of two different processes.

Since segment tables are a collection of base-limit registers, segments can be shared when entries in the segment table of two different jobs point to the same physical location. The two segment tables must have identical base pointers and the shared segment number must be the same in the two processes.

Explain why it is easier to share a reentrant module using segmentation than it is to do so when pure paging is used.

Since segmentation is based on a logical division of memory rather that a physical one, segments of any size can be shared with only one entry in the segment tables of each user. With paging there must be a common entry in the page tables for each page that is shared.

When virtual memory is implemented in a computing system, there are certain costs associated with the technique and certain benefits. List the costs and the benefits. Is it possible for the costs to exceed the benefits? If it is, what measures can be taken to ensure that this does not happen?

The costs are additional hardware and slower access time. The benefits are good utilization of memory and larger logical address space than physical address space.

Consider a system in which a program can be separated into two parts: code and data. The CPU knows whether it wants an instruction (instruction fetch) or data (data fetch or store). Therefore, two base-limit register pairs are provided: one for instructions and one for data. The instruction base-limit register pair is automatically read-only, so programs can be shared among different users. Discuss the advantages and disadvantages of this scheme.

The major advantage of this scheme is that it is an effective mechanism for code and data sharing. For example, only one copy of an editor or a compiler needs to be kept in memory, and this code can be shared by all processes needing access to the editor or compiler code. Another advantage is protection of code against erroneous modification. The only disadvantage is that the code and data must be separated, which is usually adhered to in a compiler-generated code.

Explain the difference between internal and external fragmentation.

The memory allocated to a process may be slightly larger than the requested memory. The difference between these two numbers is internal fragmentation—unused memory that is internal to a partition. External fragmentation exists when there is enough total memory space to satisfy a request but the available spaces are not contiguous: storage is fragmented into a large number of small holes

We have an operating system for a machine that uses based and limit registers, but we have modified the machine to provide a page table. Can we set up the page tables to simulate based and limit registers?

The page table can be set up to simulate base and limit registers provided that the memory is allocated in fixed-size segments. In this way, the base of a segment can be entered into the page table and the valid/invalid bit used to indicate that portion of the segment as resident in the memory. There will be some problem with internal fragmentation.

A certain computer provides its users with a virtual-memory space of 2^32 bytes. The computer has 2^18 bytes of physical memory. The virtual memory is implemented by paging, and the page size is 4096 bytes. A user process generates the virtual address 11123456. Explain how the system establishes the corresponding physical location.

The virtual address in binary form is 0001 0001 0001 0010 0011 0100 0101 0110 Since the page size is 2^12, the page table size is 2^20. Therefore the low order 12 bits 0100 0101 0110 are used as the displacement into the page, while the remaining 20 bits 0001 0001 0001 0010 0011 are used as the displacement in the page table. The offset bits are then concatenated to the resulting physical page number (from the page table), to form the final address.

What is the effect of allowing two entries in a page table to point to the same page frame in memory? Explain how you could use this effect to decrease the amount of time needed to copy a large amount of memory from one place to another. What would the effect of updating some byte in the one page be on the other page?

This allows users to shared code or data. If the code is reentrant, much memory space can be saved through the shared use of large programs (e.g., text editors, compilers, database systems). "Copying" large amounts of memory could be effected by having different page tables point to the same memory location. However, sharing of non-reentrant code or data means that any user having access to the code can modify it and these modifications would be reflected in the other user's "copy."

What is the cause of thrashing? How does the system detect thrashing? Once it detects thrashing, what can the system do to eliminate this problem?

Thrashing is caused by under allocation of the minimum number of pages required by a procsess, forcing it to continuously page fault. The system can detect thrashing by evaluating the level of CPU utilization as compared to the level of multiprogramming. It can be eliminated by reducing the level of multiprogramming.

When a process is rolled out of memory, it loses its ability to use the CPU (at least for a while). Describe another situation where a process loses its ability to use the CPU, but where the process does not get rolled out.

When an interrupt occurs the process loses the CPU, but regains it as soon as the handler completes. The process is never rolled out of memory. Note that when timer run out occurs, the process is returned to the ready queue, and it may later be rolled out of memory. When the process blocks, it is moved to a waiting queue, where it may also be rolled out at some point.

Suppose that you want to use a paging algorithm that requires a reference bit (such as second-chance replacement or working-set model), but the hardware does not provide one. Sketch how you could simulate a reference bit even if one were not provided by the hardware.

You can use the valid/invalid bit supported in hardware to simulate the reference bit. Initially set the bit to invalid. On first reference a trap to the operating system is generated. The operating system will set a software bit to 1 and reset the valid/invalid bit to valid.

Consider the following segment table: Segment Base Length 0 219 600 1 2300 14 2 90 100 3 1327 580 4 1952 96 Where are the physical addresses for the following logical addresses? A. 0,430 B. 1,10 C. 2,500 D. 3,400 E. 4,112

a. 219 + 430 = 649 b. 2300 + 10 = 2310 c. illegal reference, trap to operating system d. 1327 + 400 = 1727 e. illegal reference, trap to operating system

Consider a paging system with the page table stored in memory. A. If a memory reference takes 200 nanoseconds, how long does a paged memory reference take? B. If we add associative registers, and 75 percent of all page-table references are found in the associative registers, what is the effective memory reference time? (Assume that finding a page-table entry in the associative registers takes zero time, if the entry is there.)

a. 400 nanoseconds; 200 nanoseconds to access the page table and 200 nanoseconds to access the word in memory. b. Effective access time = 0.75 × (200 nanoseconds) + 0.25 × (400 nanoseconds) = 250 nanoseconds.

Consider a demand-paged computer system where the degree of multi-programming is currently fixed at four. The system was recently measured to determine utilization of CPU and the paging disk. The results are one of the following alternatives. For each case, what is happening? Can you increase the degree of multiprogramming to increase CPU utilization? A. CPU utilization, 13 percent; disk utilization, 97 percent B. CPU utilization, 87 percent; disk utilization, 3 percent C. CPU utilization, 13 percent; disk utilization, 3 percent

a. CPU utilization 13 percent; disk utilization 97 percent System is thrashing. The degree of multiprogramming should be decreased. Paging is not helping. b. CPU utilization 87 percent; disk utilization 3 percent System is well utilized, CPU is being kept busy most of the time. The degree of multiprogramming probably should stay the same, increasing it may lead to thrashing. Paging is helping. c. CPU utilization 13 percent; disk utilization 3 percent System is under utilized, the CPU is not getting enough work. The degree of multiprogramming should be increased. Paging is not really helping or hurting.

A page-replacement algorithm should minimize the number of page faults. We can do this minimization by distributing heavily used pages evenly over all of memory, rather than having them compete for a small number of page frames. We can associate with each page frame a counter of the number of pages that are associated with that frame. Then, to replace a page, we search for the page frame with the smallest counter. A. Define a page-replacement algorithm using this basic idea. Specifically address the problems of (1) what the initial value of the counters is, (2) when counters are increased, (3) when counters are decreased, and (4) how the page to be replaced is selected. B. How many page faults occur for your algorithm for the following reference string, for four page frames? 1,2,3,4,5,3,4,1,6,7,8,7,8,9,7,8,9,5,4,5,4,2 C. What is the minimum number of page faults for an optimal page-replacement strategy for the reference string in part b with four page frames?

a. Define a page-replacement algorithm addressing the problems of: i. Initial value of the counters—0. ii. Counters are increased—whenever a new page is associated with that frame. iii. Counters are decreased—whenever one of the pages associated with that frame is no longer required. iv. How the page to be replaced is selected—find a frame with the smallest counter. Use FIFO for breaking ties. b. 14 page faults c. 11 page faults

Segmentation is similar to paging, but uses variable-sized "pages." Define two segment-replacement algorithm based on FIFO and LRU page-replacement schemes. Remember that, since segments are not the same size, the segment that is chosen to be replaced may not be big enough to leave enough consecutive locations for the needed segment. Consider strategies for systems where segments cannot be relocated, and those for systems where they can.

a. FIFO. Find the first segment large enough to accommodate the incoming segment. If relocation is not possible and no one segment is large enough, select a combination of segments whose memories are contiguous, which are "closest to the first of the list" and which can accommodate the new segment. If relocation is possible, rearrange the memory so that the first N segments large enough for the incoming segment are contiguous in memory. Add any leftover space to the free-space list in both cases. b. LRU. Select the segment that has not been used for the longest period of time and that is large enough, adding any leftover space to the free space list. If no one segment is large enough, select a combination of the "oldest" segments that are contiguous in memory (if relocation is not available) and that are large enough. If relocation is available, rearrange the oldest N segments to be contiguous in memory and replace those with the new segment.

Consider a demand-paging system with the following time-measured utilizations: CPU utilization 20%, Paging disk 97.7%, Other I/O devices 5%. Which (if any) of the following will (probably) improve CPU utilization? A. Install a faster CPU. B. Install a bigger paging disk. C. Increase the degree of multiprogramming. D. Decrease the degree of multiprogramming. E. Install more main memory. F. Install a faster hard disk or multiple controllers with multiple hard disks. G.Add prepaging to the page fetch algorithms. H. Increase the page size.

a. Install a faster CPU A: This will likely have no effect. The limiting factor is available memory per program. b. Install a bigger paging disk A: This should have no affect really. c. Increase the degree of multiprogramming A: This typically decreases CPU utilization because less memory is available to each program and the chances of page faults increase. d. Decrease the degree of multiprogramming A: This typically increases CPU utilization by keeping more of the working set of each program in memory, thereby reducing the number of page faults. e. Install more main memory A: This is increase CPU utilization as there will be less paging taking CPU time to service. f. Install a faster hard disk, or multiple controllers with multiple hard disks A: This will decrease the time spent waiting for pages to be brought in so it'll increase responsiveness of the system, but since the CPU context switches to other programs anyway, this might not increase CPU utilization that much, if at all. It's possible that the faster page retrieval limits the number of context switches but, thrashing will still be occuring. g. Add prepaging to the page-fetch algorithms A: This is increase CPU utilization by avoiding page faults by having the pages pulled into memory before they're needed. h. Increase the page size A: This will increase CPU utilization because spatial locality will reduce the number of page faults. This comes at the cost of more internal fragmentation. If taken too far, can reduce the number of programs that can have a working set in memory.

In the IBM/370, memory protection is provided through the use of keys. A key is a 4-bit quantity. Each 2k block of memory has a key (the storage key) associated with it. The CPU also has a key (the protection key) associated with it. A store operation is allowed only if both keys are equal, or if either is zero. Which of the following memory-management schemes could be used successfully with this hardware? A. Bare machine B. Single-user system C. Multiprogramming with a fixed number of processes D. Multiprogramming with a variable number of processes E. Paging F. Segmentation

a. Protection not necessary, set system key to 0. b. Set system key to 0 when in supervisor mode. c. Region sizes must be fixed in increments of 2k bytes, allocate key with memory blocks. d. Same as above. e. Frame sizes must be in increments of 2k bytes, allocate key with pages. f. Segment sizes must be in increments of 2k bytes, allocate key with segments.

Assume that you have a page-reference string for a process with m frames (initially all empty). The page-reference string has length p; n distinct page numbers occur in it. Answer the question for any page-replacement algorithms: a. What is a lower bound on the number of page faults? b. What is an upper bound on the number of page faults?

a. n b. p