Systems Midterm 1

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Intel X86 and X86-64 are... ARM is a...

CISC processors; RISC architecture (used in many tablets and cell phones)

CISC

Complex Instruction Set Computers: have multi-word instructions and allow operands directly from memory

.align number

Align the next line to a "number"-byte boundry Should be used before setting up a static variable

Labels

All assembly language jump instructions use a label Any label before code (a function or loop, for example) or data must be followed by a colon (the following colon is how the assembler identifies the label as a label). A label is a string, which must start with an alphabetic character, followed by zero or alphanumeric characters, for example: loop Loop1 sum findMin When the assembler assembles the program, it will replace each label by the corresponding address. Therefore, there are no labels in machine code, but only addresses.

ASCII

American Standard Code for Information Exchange each character has a unique 8 bit code, all start with 0 only latin characters and punctuation 256 characters I think

Bit string

An ordered sequence of bits Everything in the computer (data of every type, instructions, etc.) is stored as a bit string

B2D

Binary to decimal, unsigned numbers

No "if" or "if-else" instructions!

Branches are implemented by changing value in PCConditional branches use the PS (prog. status) register

x~z + y in prefix form

OR(AND(x,NOT(z)),y)

Convention for parameter passing

Parameters are passed on the stack, and are placed on the stack before the function to which they are passed is called. The convention says that the parameters are pushed onto the stack from the last one listed to the first one listed in the function's parameters.

The OR gate at the end can become huge

Solution (in some situations): Tri-state devices

Problem: How will we know where to return, after ISR code finishes dealing with interrupt?

Solution: CPU must save (on the stack) the PC before transferring to ISR; also need to save other registers, so process running when interrupt occurred can continue correctly.

Problem: How do we make sure that the ISR itself is not interrupted?

Solution: Some of the bits (flags) in the PSR "processor status register" will be used to "disable" interrupts ... we will see full details later

UTF-8 encoding length

UTF-8 uses a variable length encoding of 1 to 4 bytes for every character.

Basic flip-flop to store a bit

D flip-flop

Y86 Instruction Types

Data movement Instructions Arithmetic and Logical (ALU) Instructions Control-flow Instructions (if, loops, function calls)

mrmovq

loads a word from memory

[R2] + [R3] <- R4

is meaningless! (why?)

Simplifying truth functions is important in practice because

it can substantially reduce the cost of circuits but nothing conceptually new.

Conditional: je, jne, jl, jle, jg, jge

jump depends on settings of relevant flags

Unconditional: jmp

jumps regardless of flag settings

UTF-8 dominance

now accounts for 92.8% of all web pages (some of these are just ASCII, but ASCII and UTF-8 are equivalent for one-byte encoded UTF-8 characters)

know like tracing and how the flags change

only ALU instructions write/change the flags. Data movement and control flow instructions (covered below) never change the flags!

Instruction set architecture - ISA

refers to the actual programmer visible machine interface This means the part of the hardware which the programmer can "see" - such as instruction set, registers, memory organization, and exception (i.e. interrupt) handling. Pic from notes???

ret

return from function/subroutine

Multiplexor

reverse of a decoder Selects a single output from several inputs. The one chosen determined by the value of the multiplexer's control lines. To select among ninputs, log2n control lines are needed.

halt

stops the simulated processor

rmmovq

stores a word in memory

bytes

string of 8 bits

.pos number

subsequent lines of code start at address "number" can put sections of code in different places in memory

OR is like _________

sum

Sequential circuits, especially D flip-flops, are _______

the basis of memory

Little-endian

the least significant byte is stored first, and the most significant last. Some hardware makers, such as Intel, do it this way.

big-endian

the most significant byte of the data is stored at the lowest address, and the least significant byte at the highest numbered address. This is what humans use.

Memory is organized into a sequence of words where a word...

typically is a string of 32 (64 now) bits 4 (8) bytes

irmovq

used to place known numeric values (addresses of labels or numeric literals) into a register

to write as a sum of products,

write as a sum of all the ones that evaluate to true, like if it evaluates to true when x is true and y is false and vice versa then write x~y + ~yx

Assembly Syntax

•AT&T -- What Y86 assembler uses - Immediate (constant) values preceded by $ - Registers are prefixed with % - Effective address DISP(BASE) -*The BASE address must be in a register -*The DISP is a displacement added to the base address in the register, and it is optional; if present, it can be positive, zero, or negative. - Moves and ALU operations are source, destination:movq $5, %rax

3 condition codes in y86

•ZF (Zero Flag) - Set if the result of the last ALU operation (arithmetic/logical operation) is 0 •SF (Sign Flag) - Set if the result of the last ALU operation resulted in the sign bit (msb, or most significant bit) of the result being set (that is, equal to 1) •OF (Overflow Flag) - Set if the result of the last ALU operation resulted in overflow

Reading a value from UART

Wait: Load R2, UART.RStatus BEQ Wait ; No new value yet in RValue Load R2, UART.RValue *Not* a good approach because CPU will waste a lot of time in the wait-loop; *and* a value can get over-written before CPU reads it??

yas

Y86 assembler

ssim

Y86 graphical simulator: you can "see inside" the simulated CPU with this simulator, and also see inside memory.

yis

Y86 text-based instruction simulator: you cannot "see inside" the simulated CPU with this simulator; you only see final output.

What can you do with a bit

You can WRITE a new value (only 0 or 1!) into a bit or READ the value currently stored in the bit

Zero flag: Set to 1 by the processor if the result of the last ALU operation was 0(if all the bits of the result were 0); otherwise, set to 0.

In RTN, what follows the % character is...

a comment

But accessing memory requires _________ as well

combinational circuits

Calculations are done using __________

combinational circuits

The main thing to remember about logic gates:

combinations of gates implement Boolean functions.

denotes contents of a location,i.e., the bit string at that memory address (or CPU register)

denotes copying the value

B2T

2's complement we can see what -k should be by subtracting k from 0; or, rather, from 23 (because we are using 3 bits here) (with a 1 on the front, so it's subtracted from (1)000

range of unsigned bit string

2^(# of bits) number of distinct encodings

Integer vs. Floating Point

If we want perfect precision, but more limited range, we need integer types.

Passing parameters to functions

In most architectures, the stack is also used to pass parameters to functions. There are two other stack instructions which we did not see before, but if you are familiar with the LIFO (Last-In-First-Out) nature of a stack, they are easy: pushq rA #This reads the value in register rA, and #pushes it onto the top of the stack (it #decrements %rsp by 8 before writing the value #to (%rsp). popq rB#This reads the value which is at the top of #the stack, and writes a copy of it to register #rB; %rsp is also incremented by 8 bytes after (%rsp) is #read.

Memory is organized as an array of bytes How to address memory

In some architectures, memory is byte-addressable (data beginning at any byte address in memory can be accessed, that is, read or written). BUT, in other architectures, addresses must be word-aligned (the only data which is accessible is data which starts at an address which is evenly divisible by the size of a word).

precedence

NOT then AND then OR

Subroutines

Need to save return address so can come back to the right place when Sub finishes We know that in a high-level language, when we call a function/method, after the code for the called subroutine completes, the program will return to the instruction immediately after the call was made. Some machines use link register for this ... but that doesn't always work ...why not? (limited number of them) Moreover, need a way to pass parameters to the subroutine and get back results Standard approach: use a specific area of memory (called "stack") for this - more later.

Data structures

No built-in data structures ... remember everything is "just" a bit string! The programmer has to store the information in an appropriate set of memory words and remember the details ... In loop example, we stored an array of numbers in a sequence of memory words starting at the location Num

Load R2, 200

% R2 <- [200]

Add R4, R2, R3

% R4 <- [R2] + [R3]

Another algorithm that is more often used to negate values in 2's complement:

(1) Invert all the bits (change 1's to 0's, and 0's to 1's) (2) Add 1 to the result of step 1

AFTER THIS, we still need a stack to call functions, in order to...

(1) pass parameters to them, and (2) save the return address back to the calling function.

•The Y86 simulated CPU has:

- 15 64-bit registers (omit %r15). -3 condition codes: single-bit flags set by arithmetic or logical instruction: ZF(zero), SF(negative), OF(overflow) no carry flag - interpret integers as signed only - A program counter (PC) - Holds the address of the current instruction (incremented during execution to the address of the next instruction)- A program status byte with 4 possible values: AOK, HLT, ADR, INS - State of program execution - Memory: up to 4 GB to hold program and data (4GB = 2^32), but only about 4 KB available on stdlinux. Byte-addressable storage array.

Y86 handles 3 types of exceptions: HLT instruction executed

- Invalid address encountered - Invalid instruction encountered - In each case the status is set (to ADR or INS)

•What are some possible causes of exceptions (not just in the simulated Y86 CPU, but in any CPU)?

- Invalid operation - Divide by 0 - sqrt of negative number - Memory access error (address too large, or outside program's valid address space) - Hardware error

What happens when an invalid assembly instruction is found?

- This generates an exception in the processor. •In Y86-64 an exception halts the machine; that is, it stops executing. --On a real system, this would be handled by the OS and only the current process (the program that caused the exception when it was executing on the CPU) would be terminated. --Other processes (for now, we can say "programs") would continue to run.

Registers y86

- rA or rB represent one of the 15 registers (0-14) - 0xF denotes "no register" (when needed) - No "partial" register options (must be a full 8 -bit byte - actually, divided into two half-bytes - to encode which register(s) used, or no register)

There are many different kinds of assembly languages We'll only learn Y86-64

-A RISC version of X86-64 (Intel) -It does not run on actual hardware, but rather, on a processor simulator -It is less complicated: - It has (many) fewer types of instructions. - It eliminates some quirky features. - Thus, it is a better introduction to assembly language, and to get a sense of what the processor actually does when it executes programs.

We should also make a place to "write" output for the program, so that we can see what the program did

.align 8 .pos 0x800 output: #output label

Placing array in memory

.pos 0x900 #well below the bottom of our stack) .align 8 array: #Label for array data .quad 2 .quad 3 .quad 9 .quad 5 .quad 4 .quad 7

we use ______ instead of _________

.quad instead of .long .long is used for 4 byte data. .quad is used for 8 byte data! Since the Y86 simulated processor only does 8 byte data moves and ALU operations, data placed in memory for Y86 programs should always use the .quad directive.

Hexadecimal

0-9 and then A-F

floating point numbers

1 bit for sign of number 8 bits for a signed exponent to the base of 2 23 significant bits in the form 1.XXX...X value represented is 1.XX...X * 2^exp

How does the CPU work?

1) Fetch data 2) Decode data 3) Execute data 4) Store data CPU's program counter (PC) register has address i of the first instruction Control circuits "fetch" the contents of the location at that address The instruction is then "decoded" and executed During execution of each instruction, PC register is incremented by 4 (for a 32 bit architecture)

Format of y86 instructions

1-10 bytes of information read from memory - Can determine the type of instruction from first byte - Can determine instruction length from first byte

computer architecture (3 aspects of computer design)

1. instruction set architecture 2. computer organization 3. computer hardware

Sequential Circuit

A circuit whose output is a function of its input values and the current state of the circuit The value on the output port(s) of a sequential circuit will, in general, depend on the current values on its input port(s) as well as on past values (so these circuits have "memory") Sequential circuits require clocks to control their changes of state.

combinational circuit

A circuit whose output is solely determined by its input values has no "memory"; i.e., the value on its output port(s) depend only on the current values on its input port(s); no dependence on history (prior inputs) Combinational circuits produce outputs (almost) immediately when their inputs change.

1's Complement

A form of signed binary notation in which negative numbers are created by complementing all bits of a number, including the sign bit. If we have a positive integer in B2D, say 011 (decimal 3), we negate it using 1's complement by simply inverting or complementing all of the bits. If a bit is 1, we change it to 0, and if it's 0, we change it to 1.

Problem: How does the *UART* know that CPU has obtained the value from RValue?

Ans: RStatus automatically becomes 0 once the Load R2, UART.RValue is executed! *Not* a good approach because CPU will waste a lot of time in the wait-loop; *and* a value can get over-written before CPU reads it

Problem: How will the CPU know that the next value has arrived?

Answer: UART has another location, Rstatus (Receiver Status - this is also a register in the device)) which will have 1 in it if RValue contains a new value

More info on interrupts

Are used to avoid "busy waits" Are like subroutines but they are *not* called explicitly ... Instead, when a specified situation arises, a part of the system (such as the UART device) raises an interrupt The interrupt signal is sent to an interrupt controller, which notifies the CPU that an interrupt has occurred The CPU can then call code (you can think of it as a function) in the OS (Operating System) which handles the interrupt Each time the CPU finishes execution of an instruction (as part of the instruction execution), it checks if an interrupt has been raised If so, control is transferred to the corresponding interrupt service routine (ISR), which is part of the OS (Operating System).

B2S faults

Arithmetic hardware is more complex, because different hardware is needed for signed and unsigned arithmetic. Has two zeros

Advantages of 2's complement

Arithmetic is easy and uniform for positive and negative nos. Testing for equality or for positive/negative are easy Going from 3-bit to 4-bit is easy: just extend the sign bit;works for any no. of bits. This is important because we often want to change the no. of bits used for storing some info Because it works for both unsigned and signed arithmetic, we can do subtraction by adding the negative of the number being subtracted. That is, a - b is just a + (-b). Virtually all computers use 2's complement representation today because of these advantages

________________ is used to represent machine instructions

Assembly language notation These will be converted to machine language notation (bit strings!) by the assembler

ADR

Bad address (either instruction or data) encountered

The stack

Because the call instruction pushes a return address onto the stack, and because the ret instruction pops a return address off of the stack, we also need a stack if we wish to call functions. In Y86, if we want to use a stack, we have to set it up explicitly (there is no Operating System, or OS, which provides a stack to us for our use).

1's complement faults

Because we cannot use the same hardware in the ALU to do signed and unsigned operations. For example, we need one adder for unsigned values, and a different adder for signed values. This makes the hardware more complex, and also more expensive. Also, it has two zeros (I think)???

How is the program executed?

CPU's program counter (PC) register has address i of the first instruction Control circuits "fetch" the contents of the location at that address The instruction is then "decoded" and executed During execution of each instruction, PC register is incremented by 4 PC contents are i+16 after Store instruction is executed

Stack frame process????

Caller increments R14 by size of its frame and puts return address and all other relevant info in frame of callee Callee uses the information as needed, uses additional space on its frame as needed, computes needed results and puts them in the appropriate registers or words in the frame and returns to the address provided by caller Caller reduces R14 appropriately and proceeds with its work

Why don't we just do addl $1, %ecx??

Can't! Not allowed, because both operands of an ALU operation must be in registers (no constant operands in Y86)

Carry flag: Set to 1 if the result of the last instruction generated a carry out of 1 from the addition of the most significant pair of operand bits; otherwise, set to 0.

Addition of two unsigned numbers

Carry: 01000 1st number:0101 2nd number:0110 Sum:1011

Example of B2T subtraction

Carry:11001 1st number:0100(4) 2nd number:1100(-3) Sum:0001

Example of unsigned 2's complement addition 1101 (-3) + 1011 (-5)

Carry:11110 1st number:1101 2nd number:1011 Sum:1000 Here, the carry from the msbs is 1, but the result is CORRECT!

detecting overflow w B2T

Compare the carry from the bits to the right of the msbs and the carry from the msbs. If these two carries are the same, the is no overflow. If these two carries are different, there is overflow. The hardware compares the two carries, and if they are the same, it stores a 0 in the OVERFLOW FLAG (another flag, different from the carry flag, used for signed arithmetic); If the two bits are different, it stores a 1 in the overflow flag.

rmmovq and mrmovq are the only instructions that access memory - Y86 is a load/store architecture

Direct transfers from one memory location to another are not allowed (must move through a register) Transfer of immediate data to memory is not allowed

logic gates/circuits

Each logic circuit will have one or more input ports and (typically) one output port although some have more than one output

Stack frame

Each subroutine S that is called is "allocated" a stack frame - a contiguous set of memory words that is used as space for the local variables of S, the parameters passed to S, the return address, and the (starting)address of the caller's stack frame During the execution of S, a specific register, say, R14, will contain the starting address of S's stack frame; in other words, this register is used as a "top of stack" (TOS) pointer

Preparing the stack for the procedure to run

For the procedure to be able to use the stack, we have to set the frame pointer, %rbp, to the bottom of its frame, which is the top of the stack before the procedure begins execution. Before we can do this, though, we must save the frame pointer of the caller, or it will be lost after return!

HLT

Halt instruction encountered

How to set up the stack

In typical systems, the stack starts at a very high address, and as data is pushed onto the stack, it grows downward in memory (to lowered numbered addresses). (Stack grows to lower address) Therefore, we should put the bottom of our stack at a high address. We will use the address 0x1000 (Hex 1000 - this is 1 X 163, or 212, which is decimal 4096)

Error Detection/correction

Information stored in the computer usually remains unchanged ... but During transmission (e.g., over a network), errors can creep in. Simple error detection method: parity; for ASCII, use eight bits instead of 7(the value of 8th bit being chosen to get even number of 1's) An error detection/correction scheme:(VPB: Vertical parity bit; HPB: horizontal parity bit; top right: "corner bit"

INS

Invalid instruction encountered

Negating 2's complement

Invert the bits in the second operand (just input each one to a NOT gate, which just inverts, or "flips" the bit; if a 0 is input, and 1 is output, and if a 1 is input, a 0 is output); Change the carry used for the first pair of bits from 0 to 1! This is equivalent to adding 1 to the complemented second operand.

Why is half-adder a half-adder?

It is a half-adder because it doesn't allow for a "carry-in" although it produces carry-out SEE PIC OF THIS PART 6 PG 15 AND FULL ADDER PG 16

Y86 has, as almost all processors do, the following control flow instructions

Jumps (same as branches) Unconditional: jmp (jumps regardless of flag settings) Conditional: je, jne, jl, jle, jg, jge (jump depends on settings of relevant flags) callq: call instruction for functions/subroutines ret: return from function/subroutine halt: stops the simulated processor

What if I want to store the grades of all the students in the class?

Just use N * 12 words (if there are N students in the class) *But*: If I look at the actual contents of these words in memory, it will just be a sequence of 0's and 1's! I have to know what each byte represents

Problem: Assign larger of A, B to C

Load R1, A Load R2, B Sub R3, R1, R2 BLZ B1 StoreR1, C BR B2 B1:Store R2, C B2:Continue

Consider high-level language statement:C = A + B A, B, and C correspond to memory locations... can't do arithmetic on them; so:

Load R2, A Load R3, B Add R4, R2, R3 Store R4, C This is assembly language; assembler will convert to machine language (including replacing A, B, C by corresponding addresses)

Add a list of N numbers

LoadR2, N %Load size of list at label N Clear R3 %Set R3 to 0 - will contain sum Load R4, #Num %Address of 1st no. at label Num L1: AddR3, (R4) %Add next no. to sum Add R4, #4 %Inc address in R4 SubR2, #1 %Decrement counter BGZ L1 %Branch back if not done StoreR3, Sum %Result!

Just read this one

Memory consists of a huge number of bytes (of 8 bits each) Each byte in memory has a unique address If the memory has 10 bytes, their addresses will be 0, 1, 2, ..., 9 ... represented as bit strings (0000, 0001, 0010, ..., 0111, 1001, 1010)... because everything is represented as a bit string! In a typical machine, the address is represented as a 32-bit string(or 8 hexadecimal digits) So we can have a maximum of 4,294,967,296 bytes (why?) Numbers are usually stored in words of 4 bytes each

Write instruction

Memory overwrites contents at given address with given data

read instruction

Memory retrieves contents at address given by CPU

AOK

Normal operation

Types of instruction set architectures

RISC (Reduced Instruction Set Computer) architecture CISC (Complex Instruction Set Computer) architecture (We will see that Y86-64 is a kind of "hybrid" ISA - it has a number of features of CISC ISAs, but some features of a RISC ISA)

RISC vs CISC

RISC as it is simpler and cheaper (but CISC easier to program) RISC processors use less power, but are more difficult to program (do you see why tablets and cell phones use RISC CPUs?)

andq rA, rB

R[rB] ← R[rB] & R[rA]

addq rA, rB

R[rB] ← R[rB] + R[rA]

xorq rA, rB

R[rB] ← R[rB] ^ R[rA]

subq rA, rB

R[rB] ← R[rB] − R[rA]

RISC

Reduced Instruction Set Computers: have one-word instructions and require arithmetic operands to be in CPU registers;so can't have:Add 100, 200, 300 RISC is also called Load/Store architecture, because the only CPU instructions that can access memory are load and store

Stack frame other key points

Registers may be used to pass parameters and results but using the stack frame is more general Recursion is automatically handled by stack frames Indirect addressing such as in "Store R4, (R14)" is very important and is the equivalent of pointers in languages such as C/C++ (and Java)

What we want in a binary encoding

Roughly equal number of positive and negative nos. As many numbers as possible Easy comparison for equality of numbers, and easy determination of sign of number.

Set to 1 if the result of the last instruction generated a carry out of from the addition of the most significant pair of operand bits which was different from the carry from adding the second least significant pair of bits; otherwise, set to 0.

B2S

Sign and magnitude, first bit denotes whether positive or negative, the rest denote the magnitude

Sign flag: Set to 1 by the processor if the result of the last ALU operation was negative (if the msb of the result was 1); otherwise, set to 0.

bit

Smallest unit of memory, binary digit There are hardware devices that can store a bit (these devices are also called bits)

Y86-64 Move Instructions

Split in to four different instructions Explicitly indicates form of source (1st char of instruction name) and destination (2nd char of instruction name) Immediate (i) - always a CONSTANT operand (data or address) Register (r) Memory (m) - base + displacement format Either Source, or Destination or both must be a register (immediate to memory, or memory to memory not possible)

Suppose we want a subroutine Add that can be used to add any sequence of numbers

The Add subroutine needs two parameters: The address of the seq. of numbers to be added The number of elements in the array The "calling code" is responsible for putting this information and the return address in Add's stack frame and then branch to Add Add will compute the result, store it in R1, and "return" to the caller

UART

The UART has a memory location which we will call Rvalue (Receiver Value - this is a register in the device)) which will contain the value received and can be read (i.e., loaded into a register) from that location

Limitations

The Y86-64 simulated processor can only do signed operations, and for this reason, there is no carry flag. Also, the simulated processor can only operate on 64 bit operands - real processors can typically operate on data of various sizes. Addresses in Y86-64 are also 64 bits. The Y86-64 simulated processor can also only execute 1 program at a time; there is no "multiprogramming" (multiple programs in memory and executing at the same time)

2's complement addition signed vs unsigned

The hardware can be exactly the same for unsigned and signed values Overflow, however, must be detected differently (the wrinkle).

Some important principles bout logic gates:

The output of a circuit is connected to the input of one or more other circuits ... but you cannot connect the output of a circuit to its own input You cannot connect the output of a circuit to that of another (that is, to the output of another circuit) Each circuit has a slight delay so that if one or more of its input signals changes, the output will stabilize to its new value after a short delay; most of the time this can be ignored

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