CETT 1425 Assignments

A logic circuit contains the following: a 3-input NOR gate with inputs A, B, and C, a 2-input NOR gate with inputs C and D, and a 2-input AND gate that is driven by the NOR gate outputs. The correct Boolean expression for the circuit output (X) is:

X = (A+B+C)' (C+D)'

Which of the following expressions accurately describes the Exclusive-OR function?

X = A'B + AB'

The application of DeMorgan's theorems will reduce the expression X = (A+B+C)' + (A'+B+C')' + (AB+C)' to which sum-of-products expression?

X = A'B'C'+ AB'C + A'C' + B'C'

In BCD, the decimal number 93 converts to ________ digits.

eight

The major cause of transmission errors between the transmitter and receiver is:

electrical noise

The term that describes the maximum number of standard logic inputs that an IC output can drive reliably is:

fan-out

The MOS logic circuit fan-out is generally ________ than TTL fan-outs and the power drain is usually ________ than for TTL.

greater, less

In the high-impedance state, tri-state devices:

have their outputs electrically isolated from other circuits.

When digital and analog systems are combined the result is called a ________ system.

hybrid

Digital circuits are also called ________ circuits.

logic

When comparing the conversions from digital-to-analog and analog-to-digital, the A/D conversion is generally:

more complicated and more time consuming than the D/A conversion.

The measure of a logic circuit's ability to withstand random noise on its inputs without causing spurious changes in the output voltage is called:

noise immunity.

In ________ data transmission, multiple conductors are used.

parallel

The decimal system is a ________ in which the value of a digit depends on its position.

positional value system

In sign-magnitude form, a 0 in the sign bit indicates a ________ number.

positive

A set of instructions in a computer is called a(n) ________.

program

In ________ data transmission, a single conductor is used.

serial

As a general rule, the lower the value of the speed-power product, the better the device because of its:

short propagation delay and low power consumption.

A technician is wiring a circuit that requires a DAC. Two DAC's are available with the proper full-scale output. His requirements are for small resolution values and precision in the analog output. Generally, the DAC with the ________ step size and the ________ percent of resolution should be selected.

smallest, smallest

A single rating that is commonly used to compare the propagation delay and power dissipation characteristics of various circuits is the:

speed-power product.

A(n) ________ input requires a clock (CLK) or enable (EN) signal to affect the output of a flip-flop.

synchronous

A parallel in/parallel out register normally has data inputs loaded ________ and data outputs transferred ________.

synchronously, synchronously

The symbol for a flip flop has a small triangle - and no bubble - on its clock (CLK) input. The triangle indicates:

the FF is edge-triggered and can only change states when the clock goes 0 to 1.

The clocked S-C flip-flop in Figure 5-1 is synchronized by the CLK pulse when:

the clock pulse transitions from HIGH to LOW.

When performing subtraction by 2's-complement addition:

the minuend is left in its original form and the subtrahend is changed to its 2's-complement.

If a logic pulser indicates a constant low at a particular node:

the node is grounded.

A ________ diagram shows how logic signal level varies with respect to time.

timing

Where is a parity bit usually placed in a string of bits?

to the left of the MSB

When operated in its ________ mode, a FF changes states with each clock pulse.

toggle

Which of the following flip-flop timing parameters indicates the time it takes a Q output to respond to an input?

tphl, tplh

A(n) ________ is a device that converts a physical variable to an electrical variable.

transducer

A "floating" TTL input is an:

unused input that is not connected.

Which statement best describes the operation of a NGT-triggered D flip-flop?

The logic level at the D input is transferred to Q on NGT of CLK.

Memory plays an important role in digital systems.

The time it takes to process information is shorter.

Select the statement that best describes the input resistor values for a simple DAC using an op-amp as a summing amplifier.

They are binarily weighted with the LSB resistor having the largest value and the MSB having a value equal to the feedback resistor.

"Ringing" is a word that refers to the overshoot, undershoot, and damped oscillations that appear on many pulse signals.

True

A parity bit is an extra bit that is attached to a code group that is being transferred from one location to another.

True

One potential problem with asynchronous counters is that the overall propagation delay increases with each added flip-flop.

True

TTL family of chips are indicated by a seventy-four at the beginning of the part number.

True

The decimal equivalent of E'16 is:

14

A 30 kHz clock pulse is applied to a MOD-15 ripple counter. What is the output frequency?

2 kHz

CMOS inputs can be left open without possible damage.

False

Many digital electronic systems work in hexadecimal rather than binary.

False

Numbers that are greater than 9 are represented by the letters G, H, I, J, K, and L in the hex system.

False

Open-collector circuits are especially well suited for high speed switching circuits.

False

R/2R ladder DACs use successive resistors, each having a value of 2 times the resistor preceding it.

False

Two signal voltages having slightly different voltage levels cannot be at the same binary levels.

False

In true sum-of-products expressions an inversion bar cannot cover more than single variables in a term.

True

Integrated circuits are best suited for information processing applications.

True

It is common to see both analog and digital circuits within the same system.

True

Many analog to digital conversions circuits require clock signals.

True

Offset error is really a component of any given particular circuit at zero volts and can normally be adjusted back to zero.

True

One method of determining an output from a logic circuit is to simply track the inputs through the gates and determine the output.

True

One of the primary steps in algebraic circuit simplification is to put the original expression into the sum-of-products form by repeated application of DeMorgan's theorems and multiplication of terms.

True

The ALU contains at least two registers: the A register and the B register.

True

The binary equivalent of 3710 is 111001111110.

True

The sampling frequency for a 10 KHz input signal should be ________ samples per second.

at least 20,000

In an even parity scheme, each byte should contains a(n) ________ number of ones.

even

A MOD 16 synchronous counter has inputs labeled , P0, P1, P2, and P3. These inputs would most probably be used to:

preset the counter to a value determined by the P0-P3 inputs anytime is active LOW.

Which of the following is NOT used to enter data into a computer through its input unit?

printer/plotter

Exclusive OR and Exclusive NOR gates have ________ inputs.

two

Which of the following groups of codes represent all the invalid BCD codes?

1010, 1011, 1100, 1101, 1110, 1111

The 5-bit 2's-complement of -12'10 is:

10100

The binary equivalent for 169'10 is:

10101001

What is the binary number before 1011010'2 in the counting sequence?

1011001'2

Which of the following statements best describes an asynchronous digital system?

It is difficult to design and troubleshoot because the output can change states anytime one or more of the inputs change.

For any counter, the output from the last FF divides the input clock frequency by the ________ number of the counter.

MOD

An 8-bit counter is wired as follows: The CLK input to the first stage (LSB) is the system clock. Each stage's output is used as the CLK input to the next higher stage. This counter is a:

MOD 256 ripple counter.

A 1.5 MHZ clock signal is applied to an eight flip-flop binary counter. Which of the following indicates the proper MOD number, maximum number of counts, maximum count, and output frequency of the circuit?

MOD 256, 256 counts, 255 maximum count, and 5,859.38 Hz

The implementation of simplified sum-of-products expressions may be easily implemented into actual logic circuits using all ________ with little or no increase in circuit complexity.

NAND gates

An asynchronous IC counter has clock inputs labeled CP0' and CP1' . The overbars indicate the clock inputs are activated by a:

NGT.

The most widely used scheme for data transmission error detection is called the ________ method.

Parity

________ occurs when the receiver examines the data that it has received from the transmitter.

Parity checking

Which of the following statements BEST describes parity checking?

Parity checking is best suited for detecting single-bit errors in transmitted codes.

A NAND latch has outputs of Q = 1 and = 0. What effect will applying a LOW to the CLEAR input have on the latch?

Q will go LOW and Q' will go HIGH.

A certain register used to store signed binary numbers provides a 16-bit output. Determine the range of register output values and how many different values the register is capable of containing.

Range: -32,768'10 to +32,767 Values: 65,536'10

What type of register accepts data inputs one bit at a time and outputs all its data bits at the same time?

Serial in/Parallel out

Which of the following is the most common use of flip-flops?

Storage registers

Which is an advantage of a digital system?

The ability to store information.

What will happen if the input analog voltage (Va) is greater than a digital-ramp ADC's full-scale (Vax) value?

The counter will repetitively count up from zero to maximum producing a continuously repetitive staircase waveform at Vax.

The preset and clear inputs to a J-K flip-flop are HIGH (1). Which of the following is TRUE?

The flip-flop is free to respond to its J, K, and clock inputs.

What is the primary advantage of using the BCD code in place of straight binary coding?

The relative ease of converting to and from decimals.

Which of the following statements does NOT describe an advantage of digital technology?

The time it takes to process information is shorter.

A K-map indicates the output value for each possible combination of input values.

True

A MOD-4 counter with an input clock frequency of 1500 Hz has an output frequency of 375 Hz.

True

A computer is a system of hardware that performs arithmetic operations, manipulates data, and makes decisions.

True

A flip-flop is in the HIGH state when Q = 1.

True

A graph representing voltage as a function of time is called a timing diagram.

True

A square in the top row of a K-map is considered to be adjacent to its corresponding square in the bottom row.

True

An overflow indicator in an ALU circuit indicates that the result of an arithmetic operation requires more bits.

True

Analog to digital conversion incorporates D/A conversion as a primary component.

True

Binary digits are called bits.

True

D/A conversion accuracy is dependent on resistor precision and input voltage levels.

True

DAC stand for digital-to-analog converter.

True

DeMorgan's theorem can be repeated in the same logic expression.

True

Due to very low current consumption by digital IC inputs, a pull-up resistor can provide a logic high with an open switch.

True

Generally speaking, DACs with current outputs have a shorter settling time than those with voltage outputs.

True

Generally speaking, when AND and OR gates are used to enable signals, the output signal will follow the desired input signal exactly.

True

Hybrid systems contain both digital and analog circuits.

True

In a digital system, three or four numbering systems may be in use at the same time.

True

In a sign-magnitude format, a "1" in the sign bit position indicates the number is negative.

True

Only four possible cases can occur when adding two binary bits.

True

Parallel data transmission is faster than serial data transmission.

True

Parallel data transmission requires one transmission line per bit.

True

Resolution in the analog output of a DAC is primarily dependent on the number of input binary bits.

True

Simply stated, for an N-bit DAC the number of different levels will equal 2n, and the number of steps will equal 2n - 1.

True

Step size and proportionality factors are one and the same in the DAC input/output relationship.

True

The 1's-complement of 1010 is 0101.

True

The dc noise margins calculated using the proper values from a standard TTL data sheet are the worst-case margins. The typical dc noise margins are usually somewhat higher.

True

The logic analysis of a digital circuit is used to determine how the circuit responds to a binary (0 or 1) input rather than an actual input voltage.

True

The primary disadvantage to digital techniques is that the "real world" is primarily analog.

True

The two types of data transmission are parallel and serial.

True

The value of VCCIO for the Cyclone II chips is determined by the desired output logic level.

True

Total power consumed by a particular IC can be calculated by ICC × VCC.

True

Zeros must be added to the left of the MSB to produce even groups of 4 bits when converting from binary to hexadecimal.

True

Circuit implementation of the simplified expression for Table 4-1 will require (as a minimum):

Two 2-input AND gates, one 2-input OR gate, and one inverter.

Which of the following is the simplest form of the expression Y = ABC[AB + C(BC + AC)]?

V = ABC

The TTL IC chip parameter that defines the input voltage level required for a logical "1" at an input is:

VIH(min).

Which of the following sum-of-products expressions accurately describes K-map 4-1?

X = A'B'C'D'+ AB'CD' + AB'C'D' + A'B'CD' + A'B C'D + A'BCD

Which of the following Boolean expressions is in sum-of-products form?

X = A'BC + ABC + A'BC'

A logic circuit allows a signal (A) to pass to the output without inversion when either (but not both) of the control signals (B1 and B2) are HIGH. Which of the following is the output expression for this circuit?

X = A(B1'B2 + B1B2' )

A 3-input (A, B, and C) logic circuit has a HIGH output only when A=1, B=1, and C=1 or when A=0, B=1, and C=1. Which of the following sum-of-products expressions describes this function?

X = ABC + A'BC

Using Boolean algebra, the expression Y = A'B'C + A'BC + AB'C + ABC simplifies to:

Y = C

Is it possible for a K-map to have two equally good solutions with each solution being dependent on how the 1s are looped?

Yes

Using Boolean algebra to simplify the expression Z = AB + A(B + C) + B(B + C), the completed first step would result in the expression:

Z = AB + AB + AC + BB + BC

Using Boolean algebra to simplify the expression Z = (D'+ E) (D + E + F)F', the completed first step would result in the expression:

Z = D'DF' + D'EF' + D'FF' + DEF' + EEF' + FEF'

Using Boolean algebra, the original expression for Table 4-1 simplifies to:

Z = LN' + MN'

The voltages applied to the input of any standard TTL series IC must never exceed +5.5 v because:

a greater voltage applied to an emitter input can cause reverse breakdown of the E-B junction Of Q1.

Which of the following is NOT an analog device?

a light switch

What is the name of a two-axis graph, with a horizontal axis representing time, that displays pulse waveforms?

a timing diagram

Asynchronous flip-flop preset and clear inputs generally:

act as manual overrides that cause the outputs to change states regardless of the inputs or clock transitions.

Subtraction in the 2's complement system actually involves the operation of ________.

addition

In addition to its microprocessor, a microcontroller must also have ________ circuits.

all of the above

The logic gates required to implement the logic circuit in the preceding question would be:

an Exclusive OR gate with inputs B1 and B2 whose output, is fed along with input A, to an AND gate.

If not connected to a ground or logic high signal, TTL inputs:

are considered logic high.

A(n) ________ input does not require a clock (CLK) or enable (EN) signal to affect the output of a flip-flop.

asynchronous

In ________ circuits, the outputs of logic circuits can change state independently of a clock (CLK) input.

asynchronous

Any input voltage ________ is invalid for a TTL logic gate.

between 0.8 V and 2.0 V

What is the primary numbering system in digital applications?

binary

A flip-flop is also referred to as a ________ multivibrator.

bistable

A given digital circuit is referred to as a logic circuit. This label means that the circuit operates:

by a certain set of logic rules

A device used to compare an analog voltage to a reference value, for the purpose of generating a digital signal is called a(n):

comparator.

Tri-state devices with input and output enable controls simplify interfacing tasks by allowing the user to:

connect a mix of both inputs and outputs from different devices to the same bus.

The name of the computer unit that sends appropriate signals to all the other units to cause a specific instruction to be executed is the:

control unit

The time between start and EOC is called ________ time in a DAC.

conversion

A transducer is a device that:

converts a physical variable to an electrical variable.

A digital-to-analog converter (DAC):

converts the digital output of a computer to a corresponding analog representation, usually voltage or current.

TTL loading is the sum of the input ________.

current

The ________ number system is composed of 10 numerals or symbols.

decimal

The ________ system is also called the base-10 system.

decimal

The three most commonly-used numbering systems in the digital system are ________, ________, and ________.

decimal, binary, octal, hexadecimal

The following is a 2's-complement signed binary number: 100000000. What is its decimal value?

-256'10

What is the decimal value of the 2's-complement signed binary number 110101101?

-83'10

A logic device has the following specifications: VOL(max) = 0.5 V, VIL(max) = 0.9 V, VOH(min) = 2.6 V, and VIH(min) = 2.1 V. Determine the low-state dc noise margin for the device.

0.4 V

The voltage measured at an unused TTL input typically falls in the range of:

1.4 to 1.8 V

How many binary bits are necessary to represent 748 different numbers?

10

An A/D converter has a binary input of 0010 and an analog output of 20 mV. What is the resolution?

10 mV

What is the greatest output current value from an 8-bit input DAC that has an output of 4.5 mA when the input binary number is 011010102?

10.83 mA

The solution to 101101.10 - 011101.01 is ________.

10000.01

How many inputs must a full-adder have?

3

Convert the BCD number 0011 0111 0101 1001 to its decimal equivalent.

3,759

Refer to Table 8-1. Which series has the largest dc noise margin (VNL)?

74/74ALS

Refer to Table 8-1. Which TTL series has the lowest speed-power product and what are the values of tD and PD that produce the product?

74ALS

How many binary digits make up a byte?

8

What is the minimum number of binary bits required to represent a count of 175'10?

8

What is the minimum number of bits required to represent -143'10 as a signed binary number in 2's-complement form?

9

________ flip-flop inputs override all other inputs.

Asynchronous

Which of the following represents the 2's-complement of the hexadecimal number 2AF?

D51

The electronic device that converts digital data to an analog quantity is the:

DAC

If an output were required when both inputs are either false or true, a(n) ________ gate would apply.

Exclusive NOR

Which of the following represents the correct counting sequence from FEE'16?

FEF, FF0, FF1, FF2, FF3, FF4

1111'2 = 10'10

False

A MOD-5 counter would count to a maximum of 101 and then clear to recycle.

False

When using the division-by-2 method of converting from decimal to binary, the first remainder represents the:

LSB of the equivalent binary value.

Which of the following describes digital memory?

Outputs remain in their new state after inputs are removed.

Which of the following best describes the characteristics of a MOD-16 counter?

Sixteen possible counts, a maximum count of 1510, and frequency division by a factor of sixteen

What is the symbol for the period of a waveform?

T

Select the response that best defines the use of the Master Reset (MR) on typical counter ICs.

The MR is an asynchronous active HIGH input that resets the counter to the 0000'2 state.

You need to build a circuit to perform parallel data transfers from one set of registers to another. The interconnections between the registers must be held to a minimum. The best choice for the register FFs is the ________ type.

"D"

Which of the following represents the four possible outcomes when adding two binary numbers?

0 + 0 = 0, 1 + 0 = 1, 1 + 1 = 10, 1 + 1 + 1 = 11

For standard TTL, a LOW-level input voltage can be:

0 - 0.8 V

Which of the following voltage ranges would most likely be used to represent a binary zero in a typical digital circuit?

0 V - 0.8 V

Suppose that a 3-digit BCD digital-to-analog converter has a full-scale output of 49.95 mA. What is the percentage resolution of the DAC?

0.10%

The 2's-complement method of subtraction is to be performed on the 2's-complement signed numbers = 43(-)-47. Select the correct minuend, subtrahend, signed binary difference, and decimal result.

00101011 + 00101111 = 01011010 = 90'10

Which of the following represents the 2's-complement representation for +93'10?

01011101

The 2's-complement method of subtracting +28'10 from -67'10 produces a signed binary and decimal difference of:

01011111, -95'10

Which of the following represents the 2's-complement of the binary number 100110110101'2?

011001001011

What is the output state of a MOD-64 counter after 92 input pulses if the starting state is 000000?

011100'2

How many bytes are required to represent the decimal number 107 in binary?

1

A given 4-bit digital to analog converter has a reference voltage of 15 volts and a binary input of 0101. What is the proportionality factor?

1 V

What is the decimal equivalent of 74A'16?

1,866

A certain digital-to-analog converter has a proportionality factor (K) of 0.6 V. Determine the input binary number if the output voltage is 5.4 V.

1001'2

The binary equivalent of 37 is ________.

100101

Having counted up to 1001101'2 what value comes next?

1001110'2

A MOD-16 ripple counter is holding the count 10112. What will the count be after 31 clock pulses?

1010'2

Which of the following decimal numbers is represented by the binary bits 1011'2?

11

What is the binary equivalent of the decimal value 437?

110110101

The binary equivalent for DFA'16 is:

110111111010'2

Which of the following is the 2's-complement of the signed decimal number +7525?

1110101100101

The number -7'10 is to be stored in an 8-bit register as a signed binary number in 2's-complement form. Which of the following represents the register contents?

11111001

A production plant needs a counter that will count 4,000 items before resetting and recycling. How many flip-flop stages would this counter require?

12

How many BCD bits and how many straight-binary bits would be required to represent the decimal number 643?

12 BCD, 10 binary

Suppose the data sheet for a standard TTL four NOR gate IC lists values of: Icch = 6 ma, Iccl = 16 ma, and Vcc = 5 v. What is the average power dissipated by each gate?

13.75 mw

The weight of the MSB in a 5-bit number is ________.

16

The output of a basic four-bit input digital-to-analog converter would be capable of outputting:

16 different values of voltage or current that are proportional to the input binary number.

The MOST commonly used system for representing signed binary numbers is the:

2's-complement system.

What is the decimal weight of the MSB in a 12-bit number?

2,048

An IC logic gate draws 1.8 mA when its output is HIGH and 3.8 mA when its output is LOW. Assume a 50% duty cycle and calculate the average Icc current drain.

2.8 mA

Convert 110011012 to its decimal equivalent using the sum-of-weights position method.

205

Suppose that a 3-digit BCD digital-to-analog converter has a BCD input of 0100 1001 0111. Assuming the converter has a full-scale output of 49.95 mA, the output current will be:

24.85 mA

The decimal equivalent of A3B16 is ________.

2619

A digital-to-analog converter has a step size of 0.25 V and a full-scale output of 7.75 V. Determine the percent of resolution and the number of input binary bits.

3.23%, 5 bits

What is the largest decimal number that can be represented using five binary bits?

31

How many different numbers can be obtained using five binary bits?

32

The decimal number 208,973 has a hexadecimal equivalent of:

33,04D

When interfacing components in a circuit, "transmission line" issues can be avoided if the components are placed no more than ________ from each other.

4 inches

Examination of the input and output signals of an IC inverter reveals a delay from the time the input goes LOW until the output goes HIGH. The delay between these two signals should be measured at the ________ amplitude points and be labeled ________.

50 percent, tPLH

What is the decimal equivalent of the binary number 110011'2?

51

What is the largest decimal value that can be represented using nine binary bits?

511

A TTL data sheet lists the following values for the 74LS190 synchronous counter: IOH(max) = -0.4 mA, IOL(max) = 8 mA, IIH(max) = 60 μA, and IIL(max) = -1.2 mA. Determine the same series fan-out for this device.

6

How many shift pulses would be required to serially shift the contents of one six-stage register to another?

6

K-map 4-1 indicates that ________ input combinations cause the circuit to produce a HIGH output.

6

A 6-bit DAC has ________ possible analog steps.

63

The ASCII code is an alphanumeric code that has 2'7 = 128 possible code groups. How many bits are required to accommodate 128 different code groups?

7

A MOD-8 asynchronous counter has a "worst case" propagation delay of tphl = 37 ns. The maximum input clock frequency for this counter would be:

9.009 MHz

Suppose that a 3-digit BCD digital-to-analog converter has a full-scale output of 49.95 mA. How many possible output current steps can this DAC produce?

999'10

Which of the following involve digital quantities?

A ten-position switch

The input combination of A = 1, B = 0, C = 0, and D = 1 would be represented on a Karnaugh map by the square labeled:

AB'C'D

The output voltage or current of a transducer would normally be the input of a(n):

ADC.

The ________ code represents alphanumeric characters as seven bit binary numbers.

ASCII

BCD stands for ________.

Binary-coded decimal

Which of the following statements accurately represents the two best methods of logic circuit simplification?

Boolean algebra and Karnaugh mapping

Which of these is an example of analog device?

Both A and B

The hexadecimal equivalent for 1100 1010 0111 10012 is:

CA79

A "D" flip-flop with a PGT clock is in the CLEAR state. Which of the following input actions will cause it to change states?

CLK = PGT, D = 1

________ circuits are less susceptible to noise than ________ circuit.

Digital, analog

The logic gate that produces a HIGH output whenever its two inputs are unequal is the:

Exclusive OR.

The ________ circuit produces a HIGH output whenever the two inputs are equal.

Exclusive-NOR

The ________ circuit produces a HIGH output whenever the two inputs are unequal.

Exclusive-OR

Parity generators and checkers use ________ gates.

Exclusive-OR/NOR

A certain TTL series has a fan-out of 20. This means the series is capable of driving a total of 20 input devices of any series.

False

A digital-ramp ADC has the shortest conversion time of all ADC packages.

False

A five gate-two input logic circuit could be described by a five input truth table with 32 combinations.

False

A flip-flop is a discrete electronic component.

False

A flip-flop is always SET by the positive-going transition that occurs when power is first applied.

False

A sign bit of "1" in the result (difference) of a 2's-complement subtraction indicates the magnitude is negative and in true binary form.

False

All flip-flops hold the last logic level entered indefinitely.

False

Analog circuits are also called logic circuits.

False

Circuits that exhibit the property of memory normally revert to their original state when the input is removed.

False

DSP works only on digital signals.

False

Digital systems process only two numbering systems.

False

Digital voltmeters need an ADC with a very fast conversion time.

False

Each digit in the binary number system has three possible values.

False

Exclusive gates can have any number of inputs.

False

If the feedback resistor (Rf) in a summing op-amp is increased by a factor of four, each input weight will be decreased by a factor of four.

False

In asynchronous counters made of JK flip-flops, the main clock signal is fed into the CLK input of the most significant flip-flop.

False

Integrated ADCs can only have one input signal.

False

It is not necessary for the values being added to have the same number of bits when performing 2's-complement addition (or subtraction).

False

Resolution is inversely proportional to a number of bits.

False

Retriggerable one-shots tend to reduce the HIGH (quasi-stable) output time upon successive triggers.

False

Serial data transmission costs more to implement than parallel data transmission.

False

Single looping in groups of three is an allowable K-map simplification technique.

False

Synchronous counters require less circuitry than asynchronous counters.

False

The decimal number 271 can be converted to an 8-bit equivalent.

False

The full-scale output for an 8-bit digital-to-analog converter would be reached when the binary input number equals 12810.

False

The hexadecimal equivalent of a decimal number contains more digits than the original decimal number.

False

The output from a D/A converter is true analog.

False

The output unit of a PC performs calculation and logical decisions.

False

There are only two steps in analog-to-digital conversion.

False

When adding numbers in the 2's complement system, always carry the sign bit.

False

________ is defined as the maximum number of standard logic inputs that an output can drive reliably.

Fan-out

The IC chip parameter that describes the output current generated in the logical "O" state under specified load conditions is:

IOL

What is the difference between the sign-magnitude and 2's-complement systems of representing signed binary numbers?

In the signed-magnitude system all numbers, regardless of their sign, are in straight binary format preceded by a "0" or "1" to denote the sign. In the 2's complement system, the negative numbers are entered in the 2's-complement form preceded by a "1" to acknowledge a negative number whereas positive numbers are entered in straight binary format preceded by a "0" to indicate the sign.

The acronym ASCII stands for American Standard Code for Information ________.

Interchange

Digital quantities have values that are specified as 1 or 0, HIGH or LOW, etc. The voltage values associated with these digital quantities fall within specified limits. On the other hand, analog values for physical process control may be any value over a wide range of values, with each different value having a different meaning. As a result:

digital computers that monitor or control analog physical values must have an accurate means of transforming analog data to meaningful digital data and vice-versa.

The combination of Q = 1 and = 0 defines the:

flip-flop set state.

One of the major drawbacks to use of asynchronous counters is:

high frequency applications are limited because of internal propagation delays.

An identification number of 74HCT would identify the series as a:

high-speed CMOS that can be directly driven by TTL.

The quantization error in an analog-to-digital converter can be reduced by:

increasing the number of bits in the counter and DAC.

The MOD number of a counter:

indicates the number of possible counter output states.

Shift registers that are identified as parallel in/parallel out, serial in/parallel out, etc. are defined in this manner because:

it indicates the manner in which data can be entered into the register for storage and the manner in which data are outputted from the register.

The decimal number system is NOT used in digital systems because:

it is difficult to design electronic equipment that will recognize ten different voltage levels.

The chief disadvantage of MOS technology is:

it is subject to static electricity damage.

The DC high-state noise margin is the difference between the:

lowest possible HIGH output and the minimum input voltage required for a HIGH.

A quantitative measure of noise immunity is called noise ________.

margin

The circuit property of retaining its response to a momentary input is called ________.

memory

The goal in grouping K-map squares is to use the ________ number of loops.

minimum

A major advantage of the synchronous counter over the nonsynchronous counter is its ability to:

operate at higher frequencies.

When multiplying numbers in the 2's-complement system, the product's sign is:

positive if the signs of the multiplier and the multiplicand are the same.

A set of instructions that tell a computer exactly what to do is called a(n):

program

The parallel transmission of digital data:

requires as many signal lines between sender and receiver as there are data bits.

The resolution of a DAC is always equal to the weight of the LSB and is also referred to as the ________.

step size

One advantage of using the 2's-complement system to represent signed numbers is:

subtraction can be accomplished by performing addition.

A ________ expression consists of two or more AND terms that are ORed together.

sum-of-products

Digital representations of numerical quantities may BEST be described as having characteristics:

that vary in discrete steps in proportion to the values they represent.

The main difference between an SN7402 and an SN5402 would be:

the SN5402 is able to operate over a wider range of temperatures and power supply voltages.

Synchronous (parallel) counters do not experience the delay problems encountered with asynchronous (ripple) counters because:

the input clock pulses are applied simultaneously to each stage.

Actual circuit implementation of the sum-of-products expression for Table 4-1 would require (as a minimum):

three 3-input AND gates, one 3-input OR gate, and three inverters.

A primary difference between a clocked J-K flip-flop and a clocked S-C flip-flop is the J-K's ability to:

toggle or change states when J = 1, K = 1, and a clock transition occurs.

Looping on a K-map always results in the elimination of:

variables within the loop that appear in both complemented and uncomplemented form.