Computer Organization
Given the bit pattern: 10111111111000000000000000000000, what decimal number does it represent if it is a single precision floating point value?
-1.75
Given the bit pattern: 1001 0110 What is the decimal value if these bits represent a signed value?
-106
Decode the following 8-bit floating point number into it's decimal equivalent (there is 1 sign bit, 4 exponent bits and 3 fraction bits, the bias for 8-bit floats is 7): 1 1010 101
-13
What is the decimal value of the following signed 8-bit binary: (~0x51 + 1) ?
-81
In a fully associative cache with 32 blocks each storing 64 bytes, how many bits are needed for the index?
0
What is the binary fraction for the decimal value: 0.53515625? (Include the leading 0.)
0.10001001
If the clock period of a computer is 2 milliseconds, what frequency is it operating at in kHz (one decimal place)?
0.5
What decimal fraction does the following binary fraction represent (written down in decimal 0.xxxx): 0.101110
0.71875
What is the single-precision floating point representation for the decimal value 625.25? (your answer should have 32 characters, no spaces)
01000100000111000101000000000000
What is the bit pattern for the largest value that can be stored in a 12-bit signed integer (your answer should have 12 characters).
011111111111
What is the value (in Hex, leading 0x, no spaces, upper case letters) of: (0xAE & 0x55) ?
0x04
What is the hexadecimal representation of the following binary number (with the leading 0x, letters in uppercase)? 1110 1111 1000 1010
0xEF8A
Program A takes 50 ms to execute. 10ms out of the 50ms are due to memory instructions. If I can make memory instructions 1.5 times faster, how many times faster is the improved program than the original (two decimal places)? See the notes on Amdahl's Law.
1.07
Consider Program A that consists of: 1000 arithmetic instructions, 500 memory instructions, and 250 branch instructions. The CPI of the instruction classes are as follows: arithmetic: 2, memory: 6, branch: 4. The clock frequency is 2 GHz. When the CPI of memory instructions is reduced to to 3, how many times faster is the improved version than the original (with 3 decimal places)? (Hint: do this in a sequence of steps: figure how long the original takes, and then how long the improved version takes, then calculate the relative improvement).
1.3330
What is the value of the Exponent field when representing PI as a single precision floating point value (i.e., 3.1415926535)? Your answer should have 8 characters, all either 1 or 0. Hint: Don't really worry about the digits to the right of the decimal place, they will not impact the exponent field value
10000000
What is the 8-bit binary representation of -120?
10001000
What is the single precision binary representation of the number: -1234.03125? Your answer should have 32 characters, each either a 0 or 1 (no spaces)
11000100100110100100000100000000
What is the value (in 8-bit binary) of: (0x53 | 0xA2) ? (8 characters, 1s and 0s only)
11110011
What is the average time to read or write a 512-byte sector for a disk rotating at 7200 RPM? The advertised average seek time is 8ms, the transfer rate is 20 MBits/sec (1 MBit/sec = 106 bits/sec), and the controller overhead is 2ms. Assume that the disk is idle so that there is no waiting time. Answer should be in milliseconds, rounded to the nearest millisecond.
14
If a direct mapped cache has 1024 128-byte blocks, how many bits are used for the tag (assuming 32-bit addresses)?
15
What is the decimal value of the binary number: 1111?
15
What is the decimal value of (75 >> 2) ?
18
What is the decimal value of the Base 3 number: 212?
23
What is the length of a clock cycle in a 4 GHz machine, in picoseconds?
250
What is the decimal value of the binary number: 100000000?
256
In a fully associative cache with 32 blocks each storing 64 bytes, how many bits are needed for the tag (assuming 32-bit addresses)?
26
In a four-way set associative cache with 32 blocks each storing 64 bytes, how many bits are needed for the index?
3
Program A executes in 7 ms, while program B executes in 21 ms. Program A is how many times faster than Program B (two decimal places, leading zeros, if necessary)?
3
A computer supports instructions in the following categories: Memory (2 cycles), Integer Arithmetic (3 cycles), Branching (5 cycles), Floating Point Arithmetic (6 cycles). Program A has the following instruction counts: Memory: 100 instructions Integer Arithmetic: 400 instructions Branching: 50 instructions Floating Point Arithmetic: 200 instructions What is the average CPI for Program A (2 decimal places)?
3.8
When doing multiplication of two 16-bit values, how many bits are needed for the product?
32
What is the decimal value for this single precision floating point bit pattern? Your answer should not have any commas or spaces. 0 10100101 01010...00
360777252864
In a two-way set associative cache with 32 blocks each storing 64 bytes, how many bits are needed for the index?
4
What is the base 5 representation of the decimal value 102?
402
In a direct-mapped cache with 32 4-word blocks. How many bits are used to determine the block index?
5
What is the decimal value of the hex digit: 0xCAFE?
51966
In a direct mapped cache with 32 blocks each storing 64 bytes, how many bits are needed for the byte offset?
6
In a fully associative cache with 32 blocks each storing 64 bytes, how many bits are needed for the byte offset?
6
How many bits are needed to store a value of type double?
64
If it takes 1 bus cycle to transmit 1 word between the L2 cache and memory, and 18 bus cycles to find each word in memory. What is the miss penalty in the L2 cache with 4-word blocks in bus cycles (assume 32-bit addresses)?
77
In a direct mapped cache with 256 blocks each storing 64 bytes, how many bits are needed for the index? In a four-way set associative cache with 32 blocks each storing 64 bytes, how many bits are needed for the index?
8
Suppose a program segment consists of a purely sequential part which takes 25 cycles to execute, and an iterated loop which takes 100 cycles per iteration. If the loop is to be executed 100 times, what is the maximum speedup possible using 100 processors (compared to using 1 processor)? Round to the nearest integer.
80
Out of the instructions in the simplified controller (ADD, AND, CBZ, B, LDUR, OR, STUR, SUB) list one that does NOT write to the register file.
B
For a given program execution, if the clock rate goes up and nothing else changes, what happens to the CPU time?
CPU time goes down
After which pipeline stage is the value to be written to the register in an ADD instruction actually available for use?
EX
In a multiple-issue machine, hardware is added to have a longer pipeline (more stages).
False
TRUE or FALSE. Only data values are stored in the pipeline registers; control signals are not stored in pipeline registers.
False
TRUE or FALSE. Pipelining improves the latency of each individual instruction.
False
TRUE or FALSE. The Data Memory is accessed for every instruction.
False
TRUE or FALSE. When adding two positive numbers there can be no overflow.
False
TRUE or FALSE: In a write-back cache, any changes made to the cache are also written immediately into memory.
False
When you have a coherent cache, all changes to variables are seen immediately by all other processors.
False
What accounts for the most of the 32-bit increase when going from single to double precision?
Fraction Field
To reduce the impact of a control hazard, in what stage is the branch target computed?
ID
Out of the instructions in the simplified controller (ADD, AND, CBZ, B, LDUR, OR, STUR, SUB) which has the longest path (i.e., which uses the all of the hardware elements)?
LDUR
After which pipeline stage is the value to be written to the register in an LW instruction actually available?
MEM
What is the bit pattern in hexadecimal of the largest positive constant that can be set with the ADDI instruction? (with the leading 0x, letters in uppercase)
Q9 on Exercise 3
Which RAID level provides no redundancy?
RAID-0
In which RAID level must you have twice as many disks as storage?
RAID-1
What RAID level shares all of the parity information on a single redundant disk?
RAID-4
What RAID level can tolerate more than a single disk failure (as described in the slides)?
RAID-6
Accessing sequential elements of an array takes advantage of which kind of locality?
Spatial Locality
TRUE or FALSE. The compiler is able to re-order instructions to eliminate data hazards.
True
TRUE or FALSE. The throughput of the processor (# instructions per unit time) is improved by pipelining.
True
TRUE or FALSE: The Instruction Memory is accessed for every instruction.
True
Which bit fields are used to determine if a cache block has the data being searched for?
Valid bit, tag bits
When a cache block size is increased, what also increases?
hit rate, miss penalty
