ITE 221 CHAPTER 6

A(n) ____________________ can improve system performance when two devices have different data transfer rates, as when copying music files from a PC to an iPod via a USB 2.0 connection

BUFFER

If a buffer isn't large enough to hold and entire unit of data transfer, an error called a ____ occurs.

BUFFER OVERFLOW

A ____ is a shared electrical or optical channel that connects two or more devices

BUS

In the simplest sense, a(n) ____________________ is just a set of communication lines.

BUS

The ____ governs the format, content, and timing of data, memory addresses, and control messages sent across the bus

BUS PROTOCOL

When the CPU is the focus of all computer activity, all other devices are ____.

BUS SLAVES

The ____________________ transmits data between computer system components.

DATA BUS

Under direct memory access, a device called a ____ is attached to the bus and to main memory.

DMA CONTROLLER

A(n) ____________________ bus, such as a Universal serial Bus, connects one or more external devices to the system bus.

EXTERNAL I/O

Many computer system designers rely on ____ to implement disk caching.

THE OS

A system bus connects computer system components, including the CPU, memory, storage, and I/O devices

TRUE

Serial channels in buses are more reliable than parallel channels at very high speeds.

TRUE

The memory bus has a much higher data transfer rate than the system bus because of its shorter length, higher clock rate, and (in most computers) large number of parallel communication lines.

TRUE

When multiple processors occupy a single motherboard, they share primary storage and a single system bus.

TRUE

The main goal of buffering and caching is to ____.

IMPROVE OVERAL SYSTEM PERFORMANCE

Data, address, and command bits are transmitted across PCI bus line subsets called "____."

LANES

With ____ compression, data inputs that are compressed and then decompressed are different from, but still similar to, the original input

LOSSY

As buffer size increases above ____ bytes, CPU cycle consumption decreases at a linear rate

8

When the data needed isn't in the cache, the access is called a ____.

CACHE MISS

A cache miss requires performing a(n) ____________________ to or from the storage device.

CACHE SWAP

The ____ carries commands, command responses, status codes, and similar messages.

CONTROL BUS

A buffer for an I/O device is typically implemented on the sending computer.

FALSE

One way to limit wait states is to use an SDRAM cache between the CPU and SRAM primary storage

FALSE

Secondary storage devices are much faster than the system bus

FALSE

The CPU communicates with a peripheral device by moving data to or from an I/O port's dedicated bus.

FALSE

Until the 2000s, system buses were always constructed with serial electrical lines.

FALSE

In a ____, any device can assume control of the bus or act as a bus master for transfers to any other device.

PEER-TO-PEER BUS

A ____ is a reserved area of main memory accessed on a last-in, first-out (LIFO) basis.

STACK

When the CPU detects an interrupt, it executes a master interrupt handler program called the ____________________.

SUPERVISOR

Most performance benefits of a cache occur during ____.

READ OPERATIONS

The phrase ____ describes approaches to increasing processing and other computer system power by using larger and more powerful computers

SCALING UP