3210 mid
Translating UnsignedDecimal to Binary
Repeatedly divide the decimal integer by 2(the base). •Each remainder is a binary digit in the translated value: 37 = 100101
Overflow flag
Set when the result of a signed arithmetic operation is too large or too small to fit into the destination
Sign Flag (SF)
Set when the result of an arithmetic or logical operation generates a negative result
CPU clock
beats to keep instructions and information moving in synchronized fashion
Carry Flag (CF)
unsigned arithmetic is too large to fit
Binary Numbers (Integers)
• Binary integers can be signed or unsigned. • A signed integer is positive or negative. • An unsigned integer is by default positive. o Zero is considered positive. Digits are 1 and 0 • 1 = true • 0 = false • MSB - most significant bit - left most • LSB - least significant bit- right most
• Debugger
◦ Allows you to trace the execution of a program ◦ Allows you to view machine instructions, memory, and registers
Linker
◦ Combines object files created by the assembler with link libraries ◦ Produces a single executable program
Assembler
◦ Converts assembly language programs into object files ◦ Object files contain the machine instructions
EPROM
Erasable programmable read-only memory. A ROM chip that is erasable and reprogrammable through the use of uv light
Simplifying Circuits
F(x,y) = x · ( x' + y) x· x' = 0 x· x' + yx = 0 + yx = y · x = y ∗ x The circuit below is the same as a simple AND gate
4-bit adder
For example, suppose we want to "add" together two 4-bit numbers, the two outputs of the first full adder will provide the first place digit sum (S) of the addition plus a carry-out bit that acts as the carry-in digit of the next binary adder. The second binary adder in the chain also produces a summed output (the 2nd bit) plus another carry-out bit and we can keep adding more full adders to the combination to add larger numbers, linking the carry bit output from the first full binary adder to the next full adder, and so forth. An example of a 4-bit adder is given below.
ESI and EDI Registers
High speed memory instructions
Hexadecimal Integers
0 1 2 3 4 5 6 7 8 9 | A B C D E F
Complement Law
0' = 1 a ∗ a' = 0 1' = 0 a + a' = 1
What is the OPCODE for sub?
000000
Instruction Cycle (Load or Add instruction)
1. Fetch next instruction from memory to IR 2. Change PC to point to next instruction 3. Determine type of instruction just fetched oIf instruction needs data from memory, determine where it is oFetch data if needed into register 4. Execute instruction 5. Go to step 1 and continue with next instruction
Step of reading a value from memory
1. Place the address of the value in address bus 2. Assert processor's read pin 3. Wait one clock cycle 4. Copy the data from the data bus to destination operand
Decimal
10 0 1 2 3 4 5 6 7 8 9
Hexadecimal
16 symbols 0123456789ABCDEF
Binary
2 digits: 0 1
Converting Decimal to Hexadecimal
422 dec ---> 1A6 hex
Octal
8 digits: 0 1 2 3 4 5 6 7
ROM
Read Only Memory- Permanent instructions that cannot be changed. It makes the BIOS function. Checks your OS.
DeMorgan's Law
(a + b)' = a' · b' (a ∗ b)' = a' + b'
Translating Binary to Hexadecimal
Each hexadecimal digit corresponds to 4 binary bits Example: Translate the binary integer 000101101010011110010100 to hexadecimal ----> 16A794
Assembly Language
- deals with data at the physical level - need to examine registers + memory - binary + hexadecimal numbers are commonly used to describe the contents
Multiplexer
A circuit that directs one of several digital signals to a single output, depending on the states of several select inputs.
D Flip-Flop
A flip-flop with one data input that stores the value of that input signal in the internal memory when the clock edge occurs
What is a computer?
A mechanism that does two things: •It directs the processing of data and it performs the actual processing of data. •It does both of these things in response to a computer program.
JK Flip-Flop
Augments the behavior of the SR Flip-Flop where J = set and K = reset. It interprets the J and K equal to 1 as the flip or toggle command
Product-of-Sums (POS)
AND of OR terms Lets say, we have a boolean function F defined on two variables A and B. So, A and B are the inputs for F and lets say, output of F is true i.e., F = 1 when only one of the input is true or 1. If input is 1 we take the complement of the variable and if input is 0 we take the variable as is. To get the desired canonical POS expression we will multiply the maxterms (sum terms) for which the output is 0. F = (A+B) . (A'+B')
ESP Register
Addresses data on the stack
Editor
Allows you to create and edit assembly language source files
ALU
An Arithmetic/Logical Unit (ALU) combines a variety of mathematical and logical operations into a single unit. For example, a typical ALU might perform addition, subtraction, magnitude comparison, AND, and OR operations. The ALU forms the heart of most computer systems
Encoder
An Encoder is a combinational circuit that performs the reverse operation of Decoder. It has maximum of 2n input lines and 'n' output lines. It will produce a binary code equivalent to the input, which is active High. Therefore, the encoder encodes 2n input lines with 'n' bits.
ALU
Arithmetic and Logic Unit - does all mathematical calculations and makes all logical decisions
Control Unit (CU)
Processor component that manages the execution of instructions during the fetch-execute cycle.
Microprocessor
CPU & various IO functions are packed as separate ICs
Instruction Execution Cycle
CPU fetch instruction from memory CPU decode instruction by reading binary pattern CPU fetch operands from register CPU execute instruction CPU store result in output operand
Demultiplexer
De-multiplexer is also a device with one input and multiple output lines. It is used to send a signal to one of the many devices. The main difference between a multiplexer and a de-multiplexer is that a multiplexer takes two or more signals and encodes them on a wire, whereas a de-multiplexer does reverse to what the multiplexer does.
Hexadecimal Addition
Divide the sum of two digits by the number base (16). The quotient becomes the carry value, and the remainder is the sum digit
Absorption Law
In Boolean Algebra, the identity where a "smaller" term that also exists in "larger" terms "absorbs" the larger terms a + (a ∗ b) = a a ∗ ( a + b ) = a
EIP Register
Instruction points, holds the address of the next instruction to be executed.
Converting shorthand notation to Sum of Products (SOP)
Lets say, we have a boolean function F defined on two variables A and B. So, A and B are the inputs for F and lets say, the minterms are expressed as shorthand notation given below. F = ∑(1, 2, 3) our task is to get the SOP. F has two input variables A and B and output of F = 1 for m1, m2 and m3 i.e., 2nd, 3rd and 4th combination. we have, F = ∑(1, 2, 3) = m1 + m2 + m3 = 01 + 10 + 11 To convert from shorthand notation to SOP we follow the given rules. If the variable is 1 then it is taken "as is" and if the variable is 0 then we take its "complement". F = ∑(1, 2, 3) = A'B + AB' + AB And we have the required SOP
ECX Register
Loop counter
Microcontroller
Most IO functions are integrated into same package with CPU
Binary to Decimal
Multiply by powers of 2 beginning with the rightmost digit
Converting Hexadecimal to Decimal
Multiply each digit by its corresponding power of 16 : dec = (D* 16^3) + (D*16^2) + (D*16^1) + (D*16^0)
OR Gate
OR Gate
Sum-of-Products (SOP)
OR of AND terms A and B are the inputs for F and lets say, output of F is true i.e., F = 1 when any one of the input is true or 1. If input is 0 we take the complement of the variable and if input is 1 we take the variable as is. To get the desired canonical SOP expression we will add the minterms (product terms) for which the output is 1. F = A'B + AB' + AB
VRAM
RAM that holds video data
Binary Addition
Starting with the LSB(far right), add each pair of digits 0+0= 0 0+1= 1 1+0= 1 1+1= 0, carry 1 1+1+1 = 1, carry 1
Symbolic constants vs memory variables
Symbolic constants do not change at runtime and do not reserve storage.
T Flip-Flop
The "T" in "T flip-flop" stands for "toggle." When you toggle a light switch, you are changing from one state (on or off) to the other state (off or on). This is equivalent to what happens when you provide a logic-high input to a T flip-flop: if the output is currently logic high, it changes to logic low; if it's currently logic low, it changes to logic high. A logic-low input causes the T flip-flop to maintain its current output state.
Associative Law
The Associative Law for addition: (a+b)+c=a+(b+c) The Associative Law for multiplication: (a x b) x c = a x (b x c)
Involution Law
The Boolean algebra law that is much like the double negative in mathematics, where the value of the expression NOT NOT true is simply true, and NOT NOT false is false. (a')' = a a'' = a
Distributive Law
The Distributive Law states: a ∗ (b + c) = a∗b + a∗c a + (b ∗ c) = (a + b) ∗ (a + c)
Identity Law
The Identity Law for addition states: a + 0 = a The Identity Law for multiplication states: a x 1 = a
Full-Adder
The full-adder circuit adds three one-bit binary numbers (C A B) and outputs two one-bit binary numbers, a sum (S) and a carry (C1). The full-adder is usually a component in a cascade of adders, which add 8, 16, 32, etc. binary numbers. The carry input for the full-adder circuit is from the carry output from the circuit "above" itself in the cascade. The carry output from the full adder is fed to another full adder "below" itself in the cascade. If you look closely, you'll see the full adder is simply two half adders joined by an OR.
Half-Adder
The half adder is an example of a simple, functional digital circuit built from two logic gates. The half adder adds two one-bit binary numbers (AB). The output is the sum of the two bits (S) and the carry (C). Note how the same two inputs are directed to two different gates. The inputs to the XOR gate are also the inputs to the AND gate. The input "wires" to the XOR gate are tied to the input wires of the AND gate; thus, when voltage is applied to the A input of the XOR gate, the A input to the AND gate receives the same voltage.
Instruction Set Architecture (ISA)
The part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O. specifies the set of opcodes (machine language), & native commands implemented by a particular processor• ISA for x86
SR Latch
To create an S-R latch, we can wire two NOR gates in such a way that the output of one feeds back to the input of another. The Q and not-Q outputs are supposed to be in opposite states. I say "supposed to" because making both the S and R inputs equal to 1 results in both Q and not-Q being 0. For this reason, having both S and R equal to 1 is called an invalid or illegal state for the S-R multivibrator. Otherwise, making S=1 and R=0 "sets" the multivibrator so that Q=1 and not-Q=0. Conversely, making R=1 and S=0 "resets" the multivibrator in the opposite state. When S and R are both equal to 0, the multivibrator's outputs "latch" in their prior states.
EBP Register
Used by high level languages to function parameters and local variables on the stack
Translating Binary to Decimal
Weighted positional notation shows how to calculate the decimal value of each binary bit:
Hexadecimal Subtraction
When a borrow is required from the digit to the left, add 16 (decimal) to the current digit's value:
what is the range for 6-bit unsigned numbers?
[0, 2^6−1] = [0, 63]
Idempotence Law
a ∗ b = b ∗ a a + b = b + a
EAX Register
automatically used for multiplication and division
CPU
execute instructions
Bus
interconnects everything by transferring data
Base - Number System
maximum number of symbols assigned to every digit
SRAM
memory chip that is used as cache memory. is much faster than DRAM and does not have to be refreshed as often. is much more expensive than DRAM.
DRAM
memory chip that is used as main memory. must be constantly refreshed with pulses of electricity in order to maintain the data stored within the chip.
Data Representation: Integer Storage Sizes
no data types in ASM.
IO devices
receive inputs & produce outputs
CMOS RAM
region of memory that uses battery power to retain data after the PC is shut off.
Zero Flag (ZF)
set when the result of an arithmetic or logical operation generates a result of zero
Memory
store program & data
