Assembly and Computer org final
smallest signed byte
-128
smallest unsigned byte
0
General-purpose architectures are divided into three groups:
1. memory-memory 2. register-memory 3. load-store
real10
10 byte ieee extended real
largest signed byte
127
largest unsigned byte
255
dword
32 bit unsigned integer
tbyte
80 bit integer
LOAD 800 using direct addressing
900
Multi-line comments begin with ___________
COMMENT directive
T/F An object file is commonly read as input by the assembler.
False
T/F The following is a valid data definition statement:
True
A "subtract" statement is an example of:
an arithmetic instruction
b
binary
Consider the postfix (reverse Polish notation) 10 5 + 6 3 - / The equivalent infix expression is:
(10+5)/(6-3)
What will be the value in ax after running the following code: .datamyBytes BYTE 90h, 77h, 0B9h.codemain PROCmov bx, 0movzx ax, myBytesmov bl, [myBytes+1]add ax, bxmov bl, [myBytes+2]add ax, bxINVOKE ExitProcess,0main ENDP
01C0
An instruction contains:
1. mnemonics 2. operand 3. comment 4. label
Instruction sets are differentiated by which feature?
1. operand storage and location 2. number of operands 3. operations
Flags that are affected by Arithmetic are:
1. overflow 2. zero 3. sign 4. carry
Examples of hazards in pipelines include:
1. resource conflicts 2. data dependencies 3. conditional branch statements
There are three basic ISA architectures for internal storage in the CPU:
1. stack 2. accumulator 3. general-purpose registers
LOAD 800 using indirect addressing
1000
sword
16 bit signed integer
word
16 bit unsigned integer
Given the following code, what is the value in al: .data arrayB BYTE 10h,20h,30h,40h .code mov al, arrayB+1
20h
If the opcodes field for an instruction has n bits, that means there are _______ potential distinct operations.
2^n
sdword
32 bit signed integer
real4
4 byte ieee short real
qword
64 bit integer
LOAD 800 using indexed addressing
700
sbyte
8 bit signed integer
byte
8 bit unsigned integer
real8
8 byte ieee long real
LOAD 800 using immediate addressing
800
Suppose we have the instruction LOAD 800. Given memory as follows: What would be loaded into the AC if the addressing mode for the operating is immediate?
800
Suppose we have the instruction LOAD 800. Given memory as follows: What would be loaded into the AC if the addressing mode for the operating is direct?
900
Consider the infix expression: A-B+C*(D*E-F)/(G+H*K). The equivalent postfix (reverse Polish notation) expression is:
AB-CDE*F-*+GHK*+/
Which of the following cannot be a destination for the mov instruction.
All
In JK Flip Flop, when both inputs are 1, the circuit does the following:
Complements the current state
Which of the following is a representation of computer memory
D flip-flop
______________ , commands that are recognized and acted upon by the assembler
Directives
T/F A string literal must be enclosed in double quotes.
False
T/F Flip-flops are examples of combinational circuits
False
T/F The listing file is generated by the linker.
False
Circuits that change state when the clock voltage reaches its highest or lowest level are called:
Level-triggered
Which instruction that does not affect the flags
MOV
The instruction that fills the upper half of the destination with zeros is:
MOVZX
T/F A JK-FF has no Invalid State
True
T/F D flip-flop is the fundamental circuit of computer memory.
True
T/F If the source code for an assembly language program is modified, you must run both the assembler and linker to update the program's executable code.
True
T/F In the following statement, EAX is called the source operand:
True
T/F Latch is level triggered, whereas a flip-fop is edge triggered.
True
T/F State changes occur in sequential circuits only when the clock ticks.
True
T/F The SDWORD directive is used when defining 32-bit signed integer.
True
T/F sequential circuits rely on feedback to retain their state values.
True
A "store" statement is an example of:
a data movement instruction
Fill in the black for the following code: .data arrayW WORD 1000h,2000h,3000h .code mov ax,[_______________] ; AX = 2000h
arrayW+2
The term endian refers to a computer architecture's ______?
byte order
d
decimal
r
encoded real
h
hexadecimal
Given the following code, which line is invalid because of size mismatch? .data bVal BYTE 100 bVal2 BYTE ? wVal WORD 2 dVal DWORD 5 .code mov ds,45 ;Line #1 mov esi,wVal ;Line #2 mov eip,dVal ;Line #3 mov 25,bVal ; Line #4 mov bVal2,bVal ;Line #5
line #2
A = (A + B) - (C + D).
mov eax, 3d ;register a mov ebx, 10d ;register b mov ecx, 7d ;register c mov edx, 4d ;register d add eax, ebx add ecx, edx sub eax, ecx
Fixed-length instructions:
waste space but are fast and perform better than variable length instructions