CFS 264 Chapter 5 Input/Output

Character devices

- Delivers or accepts stream of characters, without regard to block structure - Not addressable, does not have any seek operation EX: Printers, network interfaces, mice, and most other devices that are not disk-like can be seen as character devices.

User-Space I/O sofatware

A good deal of I/O code is actually executed in user space. Some is in library routines linked into user programs and some is in daemon processes (. A process that runs in the background and performs a specified operation at predefined times or in response to certain events.).

Uniform Interface for device drivers

Aims to define a single interface between operating system kernels and device drivers.

I/O port

Alternatively referred to as I/O address, I/O ports, and I/O port address, the input/output port is what allows the software drivers to communicate with hardware devices on your computer.

Device independence

Being able to write programs that can access I/O device without having to specify the device in advance.

Precise interrupt and four properties of a precise interupt

An interrupt that leaves the machine in a well-defined state. 1. The PC saved in a known place. 2. All instructions before that pointed to by PC have fully executed. 3. No instruction beyond that pointed to by PC has been executed. 4. Execution state of instruction pointed to by PC is known.

Device-Independent I/O software

Device independence is the process of making a software application be able to function on a wide variety of devices regardless of the local hardware on which the software is used.

I/O using DMA

Direct Memory Access (DMA) means CPU grants I/O module authority to read from or write to memory without involvement. DMA module controls exchange of data between main memory and the I/O device. Because of DMA device can transfer data directly to and from memory, rather than using the CPU as an intermediary, and can thus relieve congestion on the bus. CPU is only involved at the beginning and end of the transfer and interrupted only after entire block has been transferred. Direct Memory Access needs a special hardware called DMA controller (DMAC) that manages the data transfers and arbitrates access to the system bus. The controllers are programmed with source and destination pointers (where to read/write the data), counters to track the number of transferred bytes, and settings, which includes I/O and memory types, interrupts and states for the CPU cycles. DMA increases system concurrency by allowing the CPU to perform tasks while the DMA system transfers data via the system and memory busses. Hardware design is complicated because the DMA controller must be integrated into the system, and the system must allow the DMA controller to be a bus master. Cycle stealing may also be necessary to allow the CPU and DMA controller to share use of the memory bus.

Logical block addressing

Disk sectors are just numbered consecutively starting at 0, without regarding tot he disk geometry

Stripping

Distributing data over multiple drives.

memory-mapped I/O

Each control register is assigned a unique memory address to which no memory is assigned.

Two types of I/O units

Mechanical (device it self) and electronic (device controller or adapter)

Difference between DMA and MMIO

Memory mapped I/O allows the CPU to control hardware by reading and writing specific memory addresses. Usually this would be used for low-bandwidth operations such as changing control bits. DMA allows hardware to directly read and write memory without involving the CPU. Usually this would be used for high-bandwidth operations such as disk I/O or camera video input.

Device drivers

Small programs stored on the hard drive that tell the computer how to communicate with a specific hardware device

Block Devices

Stores information in fixed-size blocks, each one with address. Common block size range from 512-65,536 bytes. Essential property of a block device is that it is possible to read or write each block independently of other ones. Ex: Hard disks, blue-ray disks, USB sticks.

Controller's job

convert the serial bit stream into block of bytes and perform any error correction necessary.

Buffering

memory area known as buffer that stores data while they are transferred between two devices or between a device with an application operation. Buffering is done to cope with a speed mismatch between the producer and consumer of a data stream or to adapt between devices that have different data transfer sizes.

Two modes that operate buses

word-at-a-time and block mode

Stable storage

• Uses pair of identical disks • Either can be read to get same results • Operations defined to accomplish this: 1. Stable Writes 2. Stable Reads 3. Crash recovery

Factors of a disk block read/write:

1. Seek time (the time to move the arm to the proper cylinder). 2. Rotational delay (how long for the proper sector to come under the head). 3. Actual data transfer time.

Burst mode

Burst transfer is the fastest way to transfer memory. The DMA controller assumes that source and destination memory address/IO port can transfer and accept the data as quickly as the DMA controller can produce them, so after the controller is set up and the CPU has released control of the address and data buses, the entire block of memory is copied to the destination as a single contiguous block. For the entire duration of the transfer, the CPU stays idle and the DMA controller and the peripheral device gets complete access to the system buses.

Direct memory access

CPU accesses all devices and memory via a single system bus that connects the CPU, memory, and the I/O devices.

Overlapped seeks

Controller doing seeks on two or more drives at the same time

Cycle stealing

If DMA needs access to memory, it suspends the CPU. Cycle Stealing mode is similar to Burst Transfer mode, but instead of the data being transferred all at once, it is transferred one byte at a time. The DMA controller, after transferring one byte of data, releases control of the system buses by sending a bus grant signal through the control bus, lets the CPU process an instruction and then requests access to the bus by sending the bus request signal through the control bus and then transfers another byte of data. This keeps going on until all the data has been transferred. The transfer rate is slower but it prevents the CPU from staying idle for a long period of time.

Interrupt controller

In computing, a programmable interrupt controller (PIC) is a device that is used to combine several sources of interrupt onto one or more CPU lines, while allowing priority levels to be assigned to its interrupt outputs.

Error handling

In general, error should be handled close to the hardware as possible.

Interrupt handlers

In systems programming, an interrupt is a signal to the processor emitted by hardware or software indicating an event that needs immediate attention. An interrupt alerts the processor to a high-priority condition requiring the interruption of the current code the processor is executing.

Programmed I/O

Programmed I/O (PIO) refers to data transfers initiated by a CPU under driver software control to access registers or memory on a device. The CPU issues a command then waits for I/O operations to be complete. As the CPU is faster than the I/O module, the problem with programmed I/O is that the CPU has to wait a long time for the I/O module of concern to be ready for either reception or transmission of data. The CPU, while waiting, must repeatedly check the status of the I/O module, and this process is known as Polling. As a result, the level of the performance of the entire system is severely degraded.

What is the difference between programmed-driven I/O and interrupt-driven I/O? What is one advantage and one disadvantage of each?

Programmed-driven I/O means the program is polling or checking some hardware item e.g. mouse within a loop. For Interrupt driven I/O, the same mouse will trigger a signal to the program to process the mouse event. Advantage of Programmed Driven: easy to program and understand Disadvantages: slow and inefficient Advantage of Interrupt Driven: fast and efficient Disadvantage: Can be tricky to write if you are using a low level language. Can be tough to get the various pieces to work well together. Usually done by the hardware manufacturer or the OS maker e.g. Microsoft.

Interrupt-driven I/O

The CPU issues commands to the I/O module then proceeds with its normal work until interrupted by I/O device on completion of its work. For input, the device interrupts the CPU when new data has arrived and is ready to be retrieved by the system processor. The actual actions to perform depend on whether the device uses I/O ports, memory mapping. For output, the device delivers an interrupt either when it is ready to accept new data or to acknowledge a successful data transfer. Memory-mapped and DMA-capable devices usually generate interrupts to tell the system they are done with the buffer. Although Interrupt relieves the CPU of having to wait for the devices, but it is still inefficient in data transfer of large amount because the CPU has to transfer the data word by word between I/O module and memory.

Uniform naming

The idea behind UNC is to provide a format so that each shared resource can be identified with a unique address.

Buffered I/O

User buffered I/O, shortened to buffering or buffered I/O, refers to the technique of temporarily storing the results of an I/O operation in user-space before transmitting it to the kernel (in the case of writes) or before providing it to your process (in the case of reads). By so buffering the data, you can minimize the number of system calls and can block-align I/O operations, which may improve the performance of your application.

Spooling

Way of dealing with dedicated I/O devices in a multi-programming system.

Synchronous versus Asynchronous

synchronous read and write functions start a file I/O operation and wait for the I/O request to complete before the function returns. Because the function waits and does not return, your application cannot start a new I/O operation or execute additional code. When your application makes many I/O operations, the processor might spend almost all its time waiting idly for the I/O operations to complete. asynchronous read and write functions start a file I/O operation and return without waiting for the I/O request to complete. Because the function returns without waiting, your application can initiate additional I/O operations or execute additional code. You can use this mode to improve the throughput, latency, or responsiveness of your TDMS application. Related Information

Interrupt vector

the number on the address lines is used as an index into a table.