Combinational Logic

Covering Set

A minimum set of prime implicants which includes all essential terms plus any other prime implicants required to cover all minterms

Essential Prime Implicant

A prime implicant that covers a minterm that no other prime implicant covers

Cover

A term is said to cover a minterm if that minterm is part of that term e.g. A.B covers A.B.C'

What is a maxterm?

A term of the logic function f where f is 0

Prime Implicant

A term that cannot be further combined (i.e. is simplified as much as possible, of no use, will appear in simplified boolean expression)

What is a minterm?

A term where the logic function is 1

Describe a ROM

Data storage device written into once, read at will. Is a look-up table where a group of n input lines is used to specify the address of locations holding m-bit data words

What does the small (filled in) circle mean for an input E in a circuit with a decoder with enable input E?

Decoder is enabled when E = 0

How is the AND plane and OR plane used in PAL devices to only generate the required minterms?

Device is programmed to selectively remove connections in the AND and OR planes to only pick the minterms you need

How can ROM be quite inefficient?

Inefficient if no. minterms in the function to be implemented is quite small (i.e. only a few non-zero entries) and size of ROM is large.

What are the advantages of ROM?

No logic simplification needed (simply put minterms in the appropriate address location); useful if multiple Boolean functions are to be implemented; pretty efficient if lots of minterms need to be generated

What are the control signals that determine whether the output buffers are enabled?

OE, WE (Write Enable, determines whether data is written or read), CS (Chip Select - determines if chip is activated)

What is an essential term in a Karnaugh map?

One that covers a minterm not covered by any other terms.

How does a PAL work?

Only the required minterms are generated (i.e. one's with logic 1) using a separate AND plane. The ouptuts from this AND plane are ORed together in a separate OR plane to produce the final output.

What does OE stand for with tristate buffers?

Output Enable (i.e. if OE = 1, let output through, if OE = 0, in high impedance condition)

What can be used to overcome the inefficiency of ROMs?

PAL devices (Programmable Array Logic)

What is a demultiplexor?

Receives info on one line and transmits this info on one of 2^n possible output lines, and the selection of this output line is controlled by the bit values of n selection lines. i.e. a decoder with an enable input.

What is the high impedance condition of a tristate buffer?

The buffer had no effect on any other data currently on the bus (electrically disconnected from the bus wire)

What is the data bus used to convey?

The data being transferred to/from a data location

How can you make a demultiplexor from a decoder and an enable input E?

The input line for E is taken as a data input line and the lines for the n inputs of the decoder are the selection lines for the demultiplexor.

What is the address bus used to specify?

The memory location that is being read or written to

What is a tristate buffer?

Used on the data output of the memory devices, can take three values: 0, 1, high impedance

What do we use to arrange for the data from multiple memories to be connected to the same bus wires?

Using tristate buffers and control signals

What is Static Random Access Memory (SRAM)?

Volatile storage, data can be written into and read out of the SRAM but is lost once power is removed

What is Conjunctive Normal Form (CNF)?

When a boolean function is expressed as the conjunction (ANDing) of its maxterms

What is Disjunctive Normal Form (DNF)?

When a boolean function is expressed as the disjunction (ORing) of its minterms

When might an n-bit decoder output have fewer than 2^n outputs?

When some of the n-bit decoded info has don't-care/unused combinations

When might it be beneficial to use a decoder to implement a combinational circuit?

When the combinational circuit has many outputs and each output function (or its complement) is expressed using a small number of minterms (n is small)

Can control signals be active low depending upon the device?

Yes

Will more than one memory device be often connected to the same bus?

Yes

How might you implement a full-adder circuit using a decoder and two OR gates?

a,b, Cin = 3 inputs so 3-8 decoder. There are 4 minterms where the sum is 1, and only one is 1 at a time so OR together these minterms to produce S. There are 4 minterms where Carry is 1, OR these together to produce Cout. (not to say that minterm in function of S is not in function of Cout)

If you are using an n-to-2^n-line decoder to implement a circuit with n inputs and m outputs, how many OR gates do you need?

m OR gates

If n (no. input lines) = 4 and m (no. bits per data word) = 4, how many locations does the ROM have and what is the total number of bits stored?

2^n = 2^4 = 16 possible locations, each location can store 4-bit words so 16 x 4 = 64 total no. bits can be stored in this ROM

What is a decoder?

A combinational circuit that converts binary info from n input lines to a maximum of 2^n unique output lines.