Digital Fundamentals Ch 7

The following gates are equal.

True

The set of AND and NOT gates is a functionally complete set of gates.

True

Realize Z = A'D + A'C + AB'C'D' using four NOR gates.

a. (A + C + D) (A' + B'C'D').

Find a minimum two-level OR-AND circuit to realize F1(a, b, c, d) = ∑ m(2, 3, 8, 9, 14, 15) (the minimum solution has eight gates)

a. (a + c)(a + b')(a '+ b' + c)(a' + b + c').

The set of NAND gate is a functionally complete set of gates.

a. True

Realize the following functions as a minimum two-level NAND-gate circuit. f(a, b, c, d) = ∏ M(0, 1, 7, 9, 10, 13) ⋅ ∏ D(2, 6, 14, 15)

a. a'bc' + ac'd' + b'cd.

Find a minimum two-level, multiple-output AND-OR gate circuit to realize this function: f1(a, b, c, d) = ∑ m(3, 4, 6, 9, 11)

a. ab'd + b'cd + a'bd'.

A combinational switching circuit has four inputs and one output as shown. F = 0 if three or four of the inputs are 1. Write the maxterm expansion for F (in simplified form).

b. (A' + B' + C')(A' + B' + D')(A' + C' + D') (B' + C' + D')

The set of AND and OR gates is a functionally complete set of gates.

b. False

Choose the case where in every of the following two-level circuit forms can an arbitrary switching function be realized.

b. NOR-OR, NOR-XOR, NAND-AND, NAND-XOR.

Find a minimum of two-level, multiple-output AND-OR gate circuit to realize these functions. f1 (A, B, C, D) = ∑ m(3, 4, 6, 9, 11).f2 (A, B, C, D) = ∑ m(2, 4, 8, 10, 11, 12).f3 (A, B, C, D) = ∑ m(3, 6, 7, 10, 11).

b. f1 = ab'd + b'cd + a'bd', f2 = ab'c + b'cd' + bc'd' + ac'd', f3 = ab'c + b'cd + a'bc.

Implement x'yz + xvy'w' + xvy'z' using a three-level NAND-gate circuit.

b. x'yz + xvy' (z' + w').

F(A, B, C) equals 1 if exactly two of A, B, and C are 1. Find a minimum two-level AND-OR circuit for F.

c. ABC' + AB'C + A'BC.

Find two-level OR-AND gate circuits to realize F(a, b, c, d) = a'bd + ac'd.

d. d(a + b)(a' + c').