MET 284 Final Exam
Register B3:2 is reset to 0. I:1/0 transitions from false to true 10 times. When I:1/0 transitions to true the first time I:1/2 is true. After the first transition of I:1/0, I:1/2 is false. What is the bit pattern in B3:2 after the 10 transitions of the ladder input instruction?
0000100000000000
If an MVM source is 48h and its mask is 1Fh, then after the MVM instruction is executed, ________ is stored in the destination.
08h
What value should be placed into X in Source for the data value in Source A to be 400 for the comparison?
1
Which one of the following SLC 500 counter statements is NOT true?
1000 counters are available in file C5.
The hexadecimal number 9E is equal to the binary number ________.
1001 1110
What is the bit pattern in the Destination?
10100010
What is the bit pattern in the Destination?
11101011
The FRD instructions convert a BCD number to its ________.
16-bit integer equivalent
If X is equal to 1 in the figure, what is the value of for the data placed in Source A?
250
If the X in Source A has a value of 4, what is the value placed in Source A for the comparison?
250
If the value of the tag result is 760, what is the value of the tag pointer?
8
What value does the timer ACC have to be for the data value in Source A to be 8?
8
In the ControlLogix PLC, the TOD instruction converts any decimal number up to ________ stored in the source register.
99,999,999
Referring to the figure below, what is the condition of solenoid A and B for the following sequence - all inputs are off, then I:2/2 and I:2/4 are turned on, then I:2/1 is turned on?
A and B are on
If the data in memory locations N7:30 through N7:33 are transferred to memory locations N10:3 to N10:6, then the process is called ________.
A file to file transfer
If the data in memory locations N7:30 through N7:33 are transferred to memory locations N10:3, then the process is called ________.
A file to word transfer
A COP instruction is ________.
A multiple source to multiple destination operation
A FLL instruction is ________.
A single source to multiple destination operation
In the representation of negative numbers, the two's complement is obtained by ________ the one's complement.
Adding one to
In data handling, files are also referred to as ________.
All of these
The Immediate input or output instruction interrupts program flow, causing the input data or output data to ________.
Always be updated
Check the arithmetic status bit S5:0 to determine if ________.
An overflow has occurred
It is important to simplify the arithmetic expression in order to reduce the number of ________.
Arithmetic instructions
Which one of the following address modes is NOT available on PLC 5 and SLC 500 PLCs?
Arrays
Which of the following instructions would be used to shift bits serially from right to left through multiple words?
BSL
The ________ counter bit is only true when the up counter rung is true.
CU
Counter output instructions for the Logix processor ________.
Can be in series on the rung or in parallel like the SLC 500
The order for calculation in an arithmetic expression is first to do all ________.
Computations inside the parenthesis
Which PLC supports double integers?
ControlLogix
A one dimensional array in Logix ________.
Could look like Pump_current[x]
Which one of the following statements about Logix counters is NOT true?
Counter tag names are declared in the ladder logic instruction box.
Which one of the following PLC 5 counter statements is NOT true?
Counters are virtual software devices, so the number of counters and the total count value is only limited by PLC memory.
The ________ counter bit is only true when the ACC value is equal to or greater than the PRE value,
DN
What type of addressing mode is used for Source A and B in the LES instruction?
Direct
Which of the following statements about electronic counters is NOT true?
Electronic counters cannot be used in the elapsed time because non-reset styles are not available.
Which of the following instructions would be used when the first data entered is the first data that must be pulled out?
FFL and FFU
The label instruction should be ________ in the destination rung.
First
The direct addressing mode ________.
Has the memory address of the data supplied in the instruction.
What is the primary difference between the MCR instruction and the JMP instruction?
How the outputs are handled.
Which one of the following statements about arrays is NOT true?
If a process has two receipts with three ingredients in each then a three-dimensional array in needed.
Which one of the following statements on the FAL modes is NOT true?
In the pause mode, a decimal number from 1 to 1000 indicates the number of scans that the FAL instruction is not executed.
What type of addressing mode is used for the Source and Destination in the MVM instruction?
Indexed
Which one of the following address modes is NOT available on Logix PLCs?
Indexed
What type of addressing mode is used for Source A in the EQU instruction?
Indirect
The one-shot is in the ladder below because ________.
Instruction I:1/0 is true longer than the time between counter trigger pulses.
Which of the following tasks is NOT implemented, when adding the IIN, ION, IIM and IOM instructions in the development of ladder logic?
Interrupt the scan process and complete all arithmetic expression immediately.
The control parameter in the FAL instruction box ________.
Is a three word instruction
Which one of the following statements about the ladder logic below is NOT true?
It takes ten scans to complete the FAL instruction.
Which of the following instructions would be used when the last data entered is the first data that must be pulled out?
LFL and LFU
Status word S:13 contains the ________.
Least significant word of the 32-bit value of the MUL instruction
Which of the following statements about mechanical counters is NOT true?
Mechanical counters are limited in total count to less than 1000.
Use the ladder logic and integer data dialog box to determine what the values of N7:10 and N7:11 are after one scan if N7:15 is a 2.
N7:10 is 150 and N7:11 is 50
Logix counter instruction ________.
None of the above
A FIFO operation ________.
None of these
If the tag pointer has a value of 7, what is the value of the tag result in the Logix figure below?
None of these
Which of the following statements is false? -The MCR instruction sets all non-retentive outputs to the false state. -The MCR instruction keeps the retentive outputs in their last condition. -The JMP instruction leaves all outputs in their last condition. -None of these
None of these
Which one of the following statements describes the condition of the ladder logic after 15 false to true to false transitions of the I:2/14 instruction?
O:3/1 is off; O:3/2 is on; ACC is 15
The following sequence occurs: the ACC is 15 and I:2/15 goes true; with I:2/15 true, the I:2/14 instruction transitions 3 times; I:2/15 returns to false and the count rung transitions another 6 times. Which one of the following statements describes the condition of the ladder logic after the 6 false to true to false transitions of the I:2/14 instruction?
O:3/1 is off; O:3/2 is on; ACC is 6
The following sequence occurs: the ACC is 7 and I:2/15 goes true; with I:2/15 true, the I:2/14 instruction transitions 3 times; I:2/15 returns to false and the count rung transitions another 6 times. Which one of the following statements describes the condition of the ladder logic after the 6 false to true to false transitions of the I:2/14 instruction?
O:3/1 is off; O:3/2 is on; ACC is 6
Which one of the following statements describes the condition of the ladder logic after 12 false to true to false transitions of the I:2/14 instruction?
O:3/1 is on; O:3/2 is off; ACC is 12
The waveform below is the action of the sensor that is addressed by I:2/13. Which one of the following statements describes the condition of the ladder logic after the waveform has been completed?
O:3/3 is off; timer ACC is 0 sec; counter ACC is 2
The waveform below is the action of the sensor that is addressed by I:2/13. The total time for the waveform is 6.5 seconds. Which one of the following statements describes the condition of the ladder logic 5 seconds after the waveform starts (half way through the 2nd 3 second segment)?
O:3/3 is off; timer ACC is 1.5 sec; counter ACC is 1
Which one of the following statements describes the condition of the ladder logic after 22 false to true to false transitions of the I:2/10 and 13 false to true to false transitions of the I:2/11 instruction? Note the current value in the ACC.
O:3/4 is on; ACC is 12
If N7:1 is below 20 for a number of scans, then ________.
OTU is true and O:3/0 is false
The ________ counter bit is only true when the up counter increments above maximum positive value.
OV
A one-shot rising (OSR) instruction placed in the TOD instruction rung eliminates ________.
Output flicker
The indexed addressing mode ________.
Points to an address number that is the value of S:24 added to the original address number in the instruction
Which one of the following statements describing the address mode troubleshooting is NOT true?
Problems in the SLC 500 indirect addressing occur when other program instructions overwrite the indexed pointer S:24.
Which one of the following statements about RLL mechanical counter conversion to PLC ladder logic is NOT true?
Replace NO mechanical counter output contacts with XIO instructions, and NC mechanical counter output contacts with XIC instructions.
Which one of the following shift register statements is NOT true?
Rotate is a shift register operation where the LSB connects to the MSB for a left rotate and the MSB connects to the LSB for a right rotate.
If the Source needs to address N7:10, what is the value in S:24 and what is the address for the Destination?
S:24 is 2 and Destination is N7:15
Binary multiplication is accomplished using the ________ as decimal numbers.
Same method
Hysteresis is used in order to have the turn on value ________ than the turn off value.
Slightly higher
In the SLC 500 comparison instruction, which of the following is true?
Source A must be a bit/word address and Source B can be either a program construct or a bit/word address
If the register S:24 has a value of 5, what memory address is used for the data in Source and Destination?
Source is N7:13 and Destination is N7:18
The data that drives a seven-segment LED display is calculated using the ________ instruction.
TOD
Which one of the following statements about troubleshooting ladder logic counter programs is NOT true?
Test counters starting with last in the sequence, and then add one counter at a time. Use the temporary end instruction, TND.
Which one of the following statements is not true for the PLC 5 and SLC 500 counters?
The ACC stores the count value by incrementing one count for every true to false change in the counter ladder rung.
Which one of the following statements about word shift operations is NOT true?
The LFU instruction takes data from the bottom of the LIFO files
Which one of the following statements about troubleshooting ladder logic counter programs is NOT true?
The SUS instruction, TND instruction, and JSR instruction are good troubleshooting instructions for counter ladder logic.
Which one of the following statements about addressing modes is NOT true?
The addressing mode is determined by how you specify the instruction's destination address.
The negate (NEG) instruction moves the negative representation of ________.
The data from one location to another
Which one of the following statements for the FAL instruction is NOT true?
The instruction is available on SLC 500 and Logix processors.
Which one of the following statements correctly describes the operation of a shift register length parameter?
The length value indicates how many false to true transition of the BSL ladder rung are required to move a single bit from the input bit positions to the left and into the unload bit location.
Jump instructions located on different rungs can use the same label instruction as long as the jump instruction has ________.
The same reference number
The PLC 5 and SLC 500 counters have ________.
Three parameter and five output bits
Which one of the following statements describes the condition of the ladder logic after 28 false to true to false transitions of can_switch?
Total_count.ACC is 28; Package_count.ACC is 4; Shift_count.ACC is 2
Which of the following tasks is NOT implemented, when adding the JMP and LBL instructions in the development of ladder logic?
Transfer field device input data into the input register or memory location.
The ________ counter bit is only true when the down counter decrements below maximum negative value.
UN
Which of the following is NOT a status bit used in the BCD conversion instruction?
Underflow
Which of the following is the parameter in a ControlLogix IOT instruction?
Update tag
Which one of the following statements on troubleshooting data handling instructions is NOT true?
Use a large data set when troubleshooting data handling rungs to verify that data size is not a problem.
Mechanical counters ________.
Use shaft rotations to increment or decrement numerical wheels
Which of the following is NOT a valid troubleshooting technique?
Verify that the return parameters in the SBR are less than that in the JSR.
Which one of the following guidelines for troubleshooting indirect and indexed addressing NOT valid?
When working on an indexed or indirect addressing mode solution start with a large data base.
Programming a jump instruction to go backward in the program should only be done ________.
With great care
Which of the following instructions would be used to determine which bits are the same in two different words?
XOR