Operating Systems Test 2

How can the associative memory device needed for a TLB be implemented in hardware, and what are the implications of such a design for expandability?

An associative memory essentially compares a key to the contents of multiple registers simultaneously. For each register there must be a set of comparators that compare each bit in the register contents to the key being searched for. The number of gates (or transistors) needed to implement such a device is a linear function of the number of registers, so expanding the design gets expensive linearly.

Suppose that a machine has 38-bit virtual addresses and 32-bit physical addresses. (a) What is the main advantage of a multilevel page table over a single-level one? (b) With a two-level page table, 16-KB pages, and 4-byte entries, how many bits should be allocated for the top-level page table field and how many for the next level page table field? Explain.

(a) A multilevel page table reduces the number of actual pages of the page table that need to be in memory because of its hierarchical structure. In fact, in a program with lots of instruction and data locality, we only need the top-level page table (one page), one instruction page and one data page. (b) The offset field requires 14 bits to address 16 KB. That leaves 24 bits for the page fields. Since each entry is 4 bytes, one page can hold 2 12 page table entries and therefore requires 12 bits to index one page. So allocating 12 bits for each of the page fields will address all 2 38 bytes.

In this problem you are to compare the storage needed to keep track of free memory using a bitmap versus using a linked list. The 128-MB memory is allocated in units of n bytes. For the linked list, assume that memory consists of an alternating sequence of segments and holes, each 64 K.B. Also assume that each node in the linked list needs a 32-bit memory address, a 16-bit length, and a 16-bit next-node field. How many bytes of storage is required for each method? Which one is better?

The bitmap needs 1 bit per allocation unit. With 2^27/n allocation units, this is 2^24/n bytes. The linked list has 2^27/2^16 or 2^11 nodes, each of 8 bytes, for a total of 2^14 bytes. For small n, the linked list is better. For large n, the bitmap is better. The crossover point can be calculated by equating these two formulas and solving for n. The result is 1 KB. For n smaller than 1 KB, a linked list is better. For n larger than 1 KB, a bitmap is better. Of course, the assumption of segments and holes alternating every 64 KB is very unrealistic. Also, we need n<=64 KB if the segments and holes are 64 KB.

(a) Show the derivation of the optimum page size equation, p =sqrt(2se), where the average process size is s bytes (total virtual space), each page table entry required e bytes, and the page size is p bytes. (b) For, s = 4MB and e = 8 bytes per page table entry, what is the optimum page size?

(a) If the process size is s bytes and page size is p bytes, then per process there will be s/p pages approximately. Thus the number of page table entries will be s/p, too. Now, the size of the page table entries will be (s/p)*e, since each page-table entry required e bytes. Also, when the page size is p, on an average the last page will have p/2 bytes of wastage. Thus the total overhead = ((s/p)*e)+ (p/2). Or, we can say that the overhead is a function of page size p, that is f(p) = (s*e/p)+(p/2) OR, the first term (s*e/p) is large when p is small. But the second term (p/2 is larger when p is larger. The optimum must lie somewhere in between.) Our target is to minimize overhead f(p). So, we need to see the 2nd derivates to see whether the optimum value is the minimal value or not. f(p)' = -(s*e/p^2)+(1/2) (i) f(p)'' = (2*s*e/p^3) (ii) Since the 2nd derivative is +ve (positive), we can have minima at p_0 using equation (i) So, equating the first derivative to 0, we get f(p)' => -(s*e/p^2)+(1/2) = 0 => -(se/p^2) = -(1/2) => p^2 = 2s*e => p = sqrt(2*s*e) Therefore, p = sqrt(2*s*e) will give us the optimum page size based on the values of s and e. (b) p = (2*s*e)^0.5 = (2*4MB * 8B)^0.5 = (2^1 * 2^2 * 2^20 * 2^3)^0.5 = (2^26)^0.5 = 2^13. So the page size is 8KB

Consider the following set of resource allocations and requests. Process 1 holds resources A and B and is waiting for resource C. Process 2 holds resource D and is waiting for resource B. Process 3 holds resource C and is waiting for resource D. (a) Draw a Resource Allocation Graph (RAG) for the situation given above. Use circular nodes for processes and square nodes for resources. (b) Is there a deadlock present in the system? If so, which processes and resources are involved? If not, give an ordering that the processes can run in to complete execution.

(a) Practice on paper (b) Yes. All three processes (i.e., 1, 2 and 3) are involved in the deadlock and including resources B, C and D.

The four conditions (mutual exclusion, hold and wait, no preemption and circular wait) are necessary for a resource deadlock to occur. (a) Give an example to show that these conditions are not sufficient for a resource deadlock to occur. (b) When are these conditions sufficient for a resource deadlock to occur?

(a) Suppose that there are three processes, A, B, and C, and two resource types, R and S. Further assume that there are one instance of R and two instances of S. Consider the following execution scenario: A requests R and gets it; B requests S and gets; C requests S and gets it (there are two instances of S); B requests R and is blocked; A requests S and is blocked. At this stage all four conditions hold. However, there is no deadlock. When C finishes, one instance of S is released that is allocated to A. Now A can complete its execution and release R that can be allocated to B, which can then complete its execution. (b) These 4 conditions are enough if there is 1 resource of each type.

A swapping system eliminates holes by compaction. Assuming a random distribution of many holes and many data segment and a time to read or write a 32-bit memory word of 10 nsec, about how long does it take to compact 128MB? For simplicity, assume that word 0 is part of a hole and that the highest word in memory contains valid data.

Almost the entire memory has to be copied, which requires each word to be read and then rewritten at a different location. Reading 4 bytes takes 10 nsec, so reading 1 byte takes 2.5 nsec and writing it takes another 2.5 nsec, for a total of 5 nsec per byte compacted. This is a rate of 200,000,000 bytes/sec. To copy 128 MB (2^27 bytes, which is about 1.34 x10^8 bytes), the computer needs 2^27/200,000,000 sec, which is about 671 msec. This number is slightly pessimistic because if the initial hole at the bottom of memory is k bytes, those k bytes do not need to be copied. However, if there are many holes and many data segments, the holes will be small, so k will be small and the error in the calculation will also be small.

Suppose that the virtual page reference stream contains repetitions of long sequences of page references followed occasionally by a random page reference. For example, the sequence: 0, 1, ... ,511, 431, 0, 1, ... , 511, 332, 0, 1, ... consists of repetitions of the sequence 0, 1, ... , 511 followed by a random reference to pages 431 and 332. (a) Why won't the standard replacement algorithms (LRU, FIFO, Clock) be effective in handling this workload for a page allocation that is less than the sequence length? (b) If this program were allocated 500 page frames, describe a page replacement approach that would perform much better than the LRU, FIFO, or Clock algorithms.

Every reference will page fault unless the number of page frames is 512, the length of the entire sequence. (b) If there are 500 frames, map pages 0-498 to fixed frames an d vary only one frame.

A system has two processes and three identical resources. Each process needs a maximum of two resources. Is deadlock possible? Explain your answer.

The system is deadlock free. Suppose that each process has one resource. There is one resource free. Either process can ask for it and get it, in which case it can finish and release both resources. Consequently, deadlock is impossible.

A computer provides each process with 65,536 bytes of address space divided into pages of 4096 bytes. A particular program has a text size of 32,768 bytes, a data size of 16,386 bytes, and a stack size of 15,870 bytes. Will this program fit in the address space? If the page size were 512 bytes, would it fit? Remember that a page may not contain parts of two different segments.

The text is eight pages, the data are five pages, and the stack is four pages. The program does not fit because it needs 17 4096-byte pages. With a 512-byte page, the situation is different. Here the text is 64 pages, the data are 33 pages, and the stack is 31 pages, for a total of 128 512-byte pages, which fits. With the small page size it is OK, but not with the large one.

A computer has 32-bit virtual addresses and 4-KB pages. The program and data together fit in the lowest page (0-4095). The stack fits in the highest page. How many entries are needed in the page table if traditional (one-level) paging is used? How many page table entries are needed for two-level paging, with 10 bits in each part?

For a one-level page table, there are 2^32/2^12 or 1M pages needed. Thus the page table must have 1M entries. For two-level paging, the main page table has 1K entries, each of which points to a second page table. Only two of these are used. Thus in total only three page table entries are needed, one in the top-level table and one in each of the lower-level tables.

A group of operating system designers for the Frugal Computer Company are thinking about ways to reduce the amount of backing store needed in their new operating system. The head guru has just suggested not bothering to save the program text in the swap area at all, but just page it in directly from the binary file whenever it is needed. Under what conditions, if any, does this idea work for the program text? Under what conditions, if any, does it work for the data?

It works for the program if the program cannot be modified. It works for the data if the data cannot be modified. However, it is common that the program cannot be modified and extremely rare that the data cannot be modified. If the data area on the binary file were overwritten with updated pages, the next time the program was started, it would not have the original data.

If FIFO page replacement is used with four page frames and eight pages, how many page faults will occur with the reference string "0 1 7 2 3 2 7 1 0 3", if the four frames are initially empty? Now repeat this problem for LRU.

FIFO yields six page faults; LRU yields seven. [Note: You will need to show in detail 'how' as demonstrated in class]

Consider a swapping system in which memory consists of the following hole sizes in memory order: 10 KB, 4 KB, 20 KB, 18 KB, 7 KB, 9 KB, 12 KB, and 15 KB. Which hole is taken for successive segment requests of (a) 12 KB (b) l0 KB (c) 9 KB for first fit? Now repeat the question for best fit, worst fit, and next fit.

First fit takes 20 KB, 10 KB, 18 KB. Best fit takes 12 KB, 10 KB, and 9 KB. Worst fit takes 20 KB, 18 KB, and 15 KB. Next fit takes 20 KB, 18 KB, and 9 KB.

For each of the following decimal virtual addresses, compute the virtual page number and offset for a 4-KB page and for an 8 KB page: 20000, 32768, 60000.

For a 4-KB page size the (page, offset) pairs are (4, 3616), (8, 0), and (14, 2656). For an 8-KB page size they are (2, 3616), (4, 0), and (7, 2656). [ Note: You should specify your starting index, like either from 0 or from 1 etc.]

Can you think of any situations where supporting virtual memory would be a bad idea, and what would be gained by not having to support virtual memory? Explain.

General virtual memory support is not needed when the memory requirements of all applications are well known and controlled. Some examples are special-purpose processors (e.g., network processors), embedded processors, and super-computers (e.g., airplane wing design). In these situations, we should always consider the possibility of using more real memory. If the operating system did not have to support virtual memory, the code would be much simpler and smaller. On the other hand, some ideas from virtual memory may still be profitably exploited, although with different design requirements. For example, program/thread isolation might be paging to flash memory.

Can a page be in two working sets at the same time? Explain.

If pages can be shared, yes. For example, if two users of a timesharing system are running the same editor at the same time, and the program text is shared rather than copied, some of those pages may be in each user's working set at the same time.

In Fig the base and limit register contain the same value, 16,384. Is this just an accident, or are they always the same? If this is just an accident, why are they the same in this example?

It is an accident. The base register is 16,384 because the program happened to be loaded at address 16,384. It could have been loaded anywhere. The limit register is 16,384 because the program contains 16,384 bytes. It could have been any length. That the load address happens to exactly match the program length is pure coincidence.

What are the 4 necessary conditions for a resource deadlock? Describe them.

Mutual Exclusion: Each resource is either currently held by exactly one process or is free. Hold and Wait: Processes currently holding resources can request and wait for new resources. No Preemption: Resources held by a process can't be forcibly ta ken away from the process. Circular Wait: There is a circular chain of two or more processes each waiting for a resource held by the next member of the chain.

A computer has four page frames. The time of loading, time of last access, and the R and M bits for each page are as shown below (the times are in clock ticks): page | Loaded | Last ref. | R | M 0 | 126 | 280 | 1 | 0 1 | 230 | 265 | 0 | 1 2 | 140 | 270 | 0 | 0 3 | 110 | 285 | 1 | 1 (a) Which page will NRU replace? (b) Which page will FIFO replace? (c) Which page will LRU replace? (d) Which page will second chance replace?

NRU removes page 2. FIFO removes page 3. LRU removes page 1. Second chance removes page 2.

Assume, for a process of size 4KB (of virtual space), we have 1KB physical memory available to run. Page size is 512 (i.e., 2^9) bytes for both the page-frame as well as for virtual-page. Starting index for both types of pages is 0. Draw a schematic diagram for page- table-entries for (virtual) page ca lls: 2, 4 and 5. Your answer should have 3 diagrams: Physical memory, virtual memory and the page table entries having at least the Present/Absent bit entry and the physical versus virtual page number entries as shown in the class. Leave blank for garbage values for the page-table-entries.

Page Size = 2^9 bytes. Physical memory = 1KB = 2^10 B= 2^1*2^9 bytes; therefore it is of 2 pages. Virtual memory = 4KB = 2^1 B= 23*2^9 bytes; therefore it is of 8 pages.

The TLB on the VAX does not contain an R bit, Why?

The R bit is never needed in the TLB. The mere presence of a page there means the page has been referenced; otherwise it would not be there. Thus the bit is completely redundant. When the entry is written back to memory, however, the R bit in the memory page table is set.

In the WSClock algorithm of Fig, the hand points to a page with R=0. If τ=400, will this page be removed? What about if τ=1000?

The age of the page is (2204-1213) = 991. If 400, it is definitely out of the working set and was not recently referenced so it will be evicted. The 1000 situation is different. Now the page falls within the working set (barely), so it is not removed.

Which components of a laptop computer are the top energy consumers and what strategies are used by the operating system to conserve power consumed by these components?

The display, hard disk, and CPU are the largest consumers of energy in a laptop computer. The amount of power used by the display directly correlates with the brightness setting it is being used on. The OS can conserve energy by dimming the display after a certain period of inactivity or by dimming the display when the laptop is running on battery or in low lighting conditions. The hard disk can be spun down after a certain period of inactivity when the OS deems that the power conserved from spinning it down (as opposed to keeping it spinning) will exceed the amount of power necessary to spin it back up. Caching can help with this process, as the disk may not need to be restarted if the request can be serviced from the cache instead. The CPU can be run at a slower clock rate to conserve power during times that it becomes relatively unloaded. The power savings of running the CPU at a lower clock rate is the square of the reduction in CPU speed so we can attain a significant power savings by running the CPU at a speed that will keep it busy instead of running alternately at full speed and turning it off when the CPU is idle.

A computer whose processes have 1024 pages in their address spaces keeps its page tables in memory. The overhead required for reading a word from the page table is 5 nsec. To reduce this overhead, the computer has a TLB, which holds 32 (virtual page, physical page frame) pairs, and can do a look up in 1 nsec. What hit rate is needed to reduce the mean overhead to 2 nsec?

The effective instruction time is 1h+5(1-h), where h is the hit rate. If we equate this formula with 2 and solve for h, we find that h must be at least 0.75. [Note: You will need to explain a bit more].

Consider the page sequence of Fig. Suppose that the R bits for the pages B through A are 11011011, respectively. Which page will second chance remove?

The first page with a 0 bit will be chosen, in this case D.

A system has four processes and five resources allocable resources. The current allocation and maximum needs are as follows: Allocated | Maximum | Available A: 10211 | 11212 | 00x11 B: 20110 | 22210 | C: 11110 | 11221 | D: 11110 | 11221 | What is the smallest value of x for which this is a safe state?

The needs matrix is as follows: 0 1 0 0 1 0 2 1 0 0 1 0 3 0 0 0 0 1 1 1 If x is 0, we have a deadlock immediately. If x is 1, process D can run to completion. When D is finished, the available vector is 1 1 2 2 1. Now, A has '10211' and '11221' is available which together satisfies maximum need. So, A is finished and now '2 1 4 3 2' is available, which can satisfy C. Once is done, the available resources are 3 2 4 4 2, which can help B finish. So, x=1 will do. 0 0 1 1 1 (Available when, x=1) +1 1 1 1 0 (D releases) ---------- 1 1 2 2 1 (Available now). Look at the need-matrix, we can only go for A now, out of {A, B, C} 1 1 2 2 1 (Available) +1 0 2 1 1 (A releases) ------------------- 2 1 4 3 2 (Available now) Look at the need-matrix, we can only go for C now, out of {B, C} 2 1 4 3 2 (Available) +1 1 0 1 0 (C releases) -------------------------- 3 2 4 4 2 (Available now) The available resources (3 2 4 4 2) can satisfy B's need (0 2 1 0 0).

Suppose that a 32-bit virtual address is broken up into four fields, a, b, c, and d. The first three are used for a three-level page table system. The fourth field, d, is the offset. Does the number of pages depend on the sizes of all four fields? If not, which ones matter and which ones do not?

The number of pages depends o n the total number of bits in a, b, and c combined. How they are split among the fields does not matter.

A machine has a 32-bit address space and an 8-KB page. The page table is entirely in hardware, with one 32-bit word per entry. When a process starts, the page table is copied to the hardware from memory, at one word every 100 nsec. lf each process runs for 100 msec (including the time to load the page table), what fraction of the CPU time is devoted to loading the page tables?

The page table contains 2^32/2^13 entries, which is 524,288. Loading the page table takes 52 msec. If a process gets 100 msec, this consists of 52 msec for loading the page table and 48 msec for running. Thus 52% of the time is spent loading page tables.

It has been observed that the number of instructions executed between page faults is directly proportional to the number of page frames allocated to a program. If the available memory is doubled, the mean interval between page faults is also doubled. Suppose that a normal instruction takes 1 microsec, but if a page fault occurs, it takes 2001 microsec (i.e., 2 msec to handle the fault). If a program takes 60 sec to run, during which time it gets 15,000 page faults, how long would it take to run if twice as much memory were available?

The program is getting 15,000 page-faults, each of which uses 2 msec of extra processing time. Together, the page fault overhead is 30 sec. This means that of the 60 sec used, half was spent on page fault overhead, and half on running the program. If we run the program with twice as much memory, we get half as many memory page faults, and only 15 sec of page fault overhead, so the total run time will be 45 sec.

How long does it take to load a 64-KB program from a disk whose average seek time is 10 msec, whose average rotation time is 10 msec, and whose tracks hold 32 KB. (a) for a 2-KB page size? (b) for a 4-KB page size? The pages are spread randomly around the disk and the number of cylinders is so large that the chance of two pages being on the same cylinder is negligible.

The seek plus rotational latency is 20 msec. For 2-KB pages, the transfer time* is 1.25 msec, for a total of 21.25 msec. Loading 32 of these pages will take 680 msec. For 4-KB pages, the transfer time is doubled to 2.5 msec, so the total time per pa ge is 22.50 msec. Loading 16 of these pages takes 360 msec. [Note: *The transfer time for a 2KB page is 1.25 msec. How? It is calculated as: we see, it can transfer a track of 32KB data in 20 msec => thus can transfer 2KB in => 2 x (20/32)=1.25 msec. And, 4KB => 4 x (20/32) => 2.5msec.]

A computer with a 32-bit address uses a two-level page table. Virtual addresses are split into a 9-bit top-level page table field, an 11-bit second-level page table field, and an offset. How large are the pages and how many are there in the address space?

Twenty bits are used for the virtual page numbers, leaving 12 over for the offset. This yields a 4-KB page. Twenty bits for the virtual page implies 2^20 pages.

Suppose that a machine has 48-bit virtual addresses and 32-bit physical addresses. (a) If pages are 4 KB, how many entries are in the page table if it has only a single level? Explain.

We need one entry for each page, or 2^36 = 64 x 1024 x 1024 x 1024 entries, since there are 36 = (48-12) bits in the page number field.

A machine has 48-bit virtual addresses and 32-bit physical addresses. Pages are 8 KB. How many entries are needed for the page table?

With 8-KB pages and a 48-bit virtual address space, the number of virtual pages is 2^48/2^13, which is 2^35 (about 34 billion).

A small computer has four page frames. At the first clock tick, the R bits are 0111 (page 0 is 0, the rest are 1). At subsequent clock ticks, the values are 1011, 1010, 1101, 0010, 1010, 1100, and 0001. If the aging algorithm is used with an 8-bit counter, give the values of the four counters after the last tick.

[ Find the same/similar slides from the lecture and follow the slides and do it yourself]