SER 232

Does a timing diagram give insight into the delay of the entire circuit?

True

What is the "Divide-by-2" method?

Used for converting Decimal numbers to binary. 1)Divide by 2 2) Write down remainder(0 or 1) 3)Discard remainder 4)Repeat until result is smaller than 1. The Binary representation of the decimal number will be the remainders read backwards( last to first)

Limitations of Floating Point

Very large numbers have limited accuracy.

Which symbol is used in programming to apply the logical XOR operation bitwise to two variables?

^

Associativity

a + (b+c) = (a+b) + c a * (b*c) = (a*b) * c

DeMorgan's Law

a'*b' = (a+b)' a'+b' = (a*b)'

Absorption

a*(a+b) = a a+(a*b) = a

Distributivity

a*(b+c) = a*b+a*c a+(b*c) = (a+b)*(a+c)

Annihilator

a*0 = 0 a+1 = 1

Complementation

a*a' = 0 a+a' = 1

Identity

a+0 = a a*1 = a

Idempotence

a+a = a a*a = a

Commutativity

a+b = b+a a*b = b*a

frequency equation

f=1/T

Frequency

how many clock periods will happen per second

List 3 logic components

mux, demux encoder, priority encoder,

Double negation

(a')' = a

What are side effects of increasing the CPU voltage?

- Faster wear of transistors - Higher risk of permanent transistor damage - Reduce gate delays - More heat

In the realm of Datapaths how would you describe Registers?

-Storage device for multiple bit values. -Bus input for storing a new value. -Bus output for reading currently stored value. -Usually stores data if the clock sees a rising edge.

Given a 4x2 encoder: Input(i3, i2, i1, i0) is: 0010 - What is the output(d1,d0)?

01

Given 0b0110 >> 1 (shifted to right once) what is the result?

0b0011

Given 0b0110 << 1 ( shifted to the left once) what is the result?

0b1100

What is the symbol for the logical NOT operation? Symbol for NOT operation bitwise?

1) ! 2) ~

What is the symbol for the logical AND operation between two variables? What is the symbol for the AND operation bitwise between two variables?

1) && 2) &

What are the 5 steps to turn an FSM into a circuit?

1) Create a representation - State Diagram 2) Define binary numbers that each represent a state of the system. 3) Convert state diagram into a truth table. 4) Convert truth table into Boolean equation 5) Convert Boolean equation into a circuit

The three steps when designing combinational logic, in order

1) Generate a truth table 2) Create Boolean expressions for all outputs 3) Make a schematic of the controllers combinational logic

Symbol for the logical OR operation? Symbol for the logicalOR operation bitwise?

1) || 2) |

What are the 3 ways to represent a circuit?

1)Circuit schematic (graphical) 2) Truth Table 3) Boolean Algebra

Given a 4x2 encoder: Input (i3, i2, i1, i0) is: 0100 - What is the output (d1,d0)?

10

When using an encoder many inputs are needed for n outputs?

2^n

Range of numbers represented by n bits?

2^n numbers, 0 to 2^n -1.

How many select bits does a 8x1 demultiplexer have?

3

How many select bits does a 1x16 multiplexer have?

4

A nibble is how many bits

4 bits

How many outputs does a 32 input encoder have

5 outputs(32x5 encoder) 32 = 2^5

How many outputs does a decoder with 3 inputs have?

8

A byte is how many bits?

8 bits

What is the difference between an Encoder and Priority Encoder?

A Priority Encoder can have more than 1 of the inputs be 1, and it will output the value of the input that has the highest number value(or bit in the highest position)

What is a combinational circuit?

A circuit for which the output solely depends on the current input values.

What are Register Files?

A collection of registers Separate control inputs for reading and writing to: -Select a register to read/write from/to. -Enable access to write and/or read. Uses a multiplexor to route data from selected register to output. - Register files can only have 1 output but several registers to store data in and load from.

Minterm

A product term with every function literal appearing exactly once, in true or complemented form. It only includes AND and NOT gates.

What is a Parallel Load Register?

A register that has a load control line (in Logisim it the enable pin). the load control line is a method for preventing clock ticks from updating the register value. Gives control of when the register is supposed to store values. When en=0(enable pin) it means the register will retain stored value, independent of clock ticks and changed input values.

What is a Shift Register?

A register with control inputs that cause the stored value to be shifted.

What is Data?

A value that comes from the data path(registers) or other devices such as buttons, sensors, memory(RAM), secondary storage(HDD, SDD).

List 3 datapath components

ALU, FSM controller, adder, subtractor, divider, multiplier

Describe an Adder: Ripple Carry Style

An N bit adder made up of N-1 full adders(FA) and a single half adder(HA) Each adder handles a specific bit Carry out of the each adder goes to the next higher bit position adder.

Canonical sum of minterms

An equation that consists exclusively of minterms that are combined with logic OR.

Literal

Appearance of variable, in true or complemented form

What is the MSB (Most Significant Bit)?

Bit that has the highest value in a binary number (usually the leftmost bit in a binary number)

What is the LSB (Least Significant Bit)?

Bit that has the lowest value in a binary number (usually the rightmost bit in a binary number)

How is Data manipulation done?

Boolean & arithmetic operations

How do you convert fractions to Binary?

Divide by 2 Method Fraction version First separate the fraction from the whole part of the number. 1) Multiply fractional part by 2 2) The whole number part is appended 3) Discard the whole part 4) Continue until the fractional part is 0

Sum-of-products

Equation written as OR of product terms only. F(a,b,c) = a'bc + abc' + ab + c

What is a Demultiplexer(demux)?

Has a single input and multiple outputs, along with select inputs which indicate which output is passed through.

What is Multiplexer (mux)?

Has multiple inputs and a single output plus a set of select inputs The select input value determines with input is output.

What is control?

Indicates what to do with data. Sources: - Custom processor - determined by controller(current state and inputs) - General purpose micro processors - control signals dictated by program instructions.

When converting a State Diagram into a truth table what are the inputs and outputs?

Inputs: - Current state(from Q output of the state register) - FSM inputs Outputs: - FSM outputs - Next State(fed into D of state register)

What is a FSM (Finite State Machine)?

It is a model defining: - A finite set of states a system can have - The inputs required to transition from one state to another(events) - The output values of each state - Requires memory(Register) to store current system state(So it is a sequential circuit)

What problem does the D flip-flop solve?

It solves the problem of not knowing through how many latches a signal travels when c =1. Every rising edge of the clock the signal goes through 1 latch.

Encoder attributes?

Like a switch for inputs. Only one of the inputs is 1 at any given time and one input has to be 1. Outputs the value of the input which is 1.

What does an Arithmetic Logic Unit (ALU) do?

Merges multiple arthimetic components into a single component. Simplifies datapath layout.

Given a 4x2 encoder: Input(i3,i2,i1,i0) is: 1111 - What is the output(d1,d0)?

Not defined.

Name one issue of the SR Latch, what causes it and a possible solution.

One issue with SR latch is that if both the inputs(S,R) are simultaneously set to 0 from 1, the output Q is not predictable. This is an issue because it causes a race condition in which the output oscillates between 0 and 1. It will eventually land on a value but we can't predict what value it will choose. One possible solution is to add an AND gate to the R input with the two inputs for the and gate being NOT S and R. This will help prevent S and R from both being 1 at the same time.

What is one issue of the D Latch, why is it an issue and what causes it. What is possible solution?

One issue with the D Latch is that if you chain multiple of the together the input signal will propagate down the chain only as long as C=1. This is an issue because depending on C the input signal may or may not reach all the D Latches leaving some at the wrong value. One possible solution is to attach a clock to the C value which would make the clock period determine how far the signal reaches and as long as the clock is not variable speed we can know how far the signal travels.

What is used for Data Storage?

Registers

Variable

Represents a value.

What are the two important parts of a clock signal period?

Rising Edge - is when the signal goes from 0 to 1. Falling Edge - is when the signal goes from 1 to 0.

IEEE 754 format floating point number components

Sign, Mantissa, Exponent, Base

period equation

T=1/f

What is an analogy of Data and Control?

TV: - Control: Remote gives control(volume, brightness, channel...) -Data: Content of channels.

What limits the frequency of a CPU?

The Delay of the entire circuit.

What is the key difference between combinational and sequential logic/circuits?

The key difference between combinational and sequential circuits is that sequential circuits have a state/memory whereas combinational circuits do not. Which means for combinational circuits the output is based purely on the input and for sequential circuits, the output depends on previous input and it's current input.

What values can a clock signal have?

The values of 0 and 1 sometimes just called high and low.

Why is a clock signal necessary in some circuits?

To provide a signal/indicate a moment in time, where all circuits will have the correct output values. To make sure that each circuit has enough time(circuit delay) to output the correct value.