Systems II - Test 1

32 512M x 8 DRAMs: Size of memory in bytes?

(# of M) x (M) x (# of DRAMs) ----> 2^34

Cache size formula (Bytes)?

(# of sets) x (associativity) x (block size)

Cache size formula

(The number of lines (E)) x (The number of sets (S)) x (The number of bytes in a block (B))

Cache address size formula (bits)?

(tag size in bits) * (index size in bits) * (offset size in bits)

32 512M x 8 DRAMs: What is b_r?

14 bits

32 512M x 8 DRAMs: What is b_c

15 bits

A cache in which each set contains 2 lines is known as a

2-way set associative cache and set associative cache

What power of 2 is M?

2^20

32 512M x 8 DRAMs: # of bytes returned to memory controller after read?

32 - One byte per DRAM

Disk consists of 4 platters, 2 surfaces per platter, 10,000 cylinders, 400 sectors per track, 512 bytes per sector, average seek time of 5 milliseconds (ms), rotational rate of 8,000 RPM: Avg transfer time?

Avg transfer time = full rotation / (sectors per track) Time it takes to rotate disk over one sector. 7.5ms/(400 sectors/track) = 0.01875 ms

Disk controllers and most SSD controllers perform DMA transfers. What does this mean?

Controller can read from or write to primary memory without CPU involvement. The controller is performing "cycle stealing" because it is using the memory bus instead of CPU

DRAM or SRAM: More sensitive to electrical disturbances?

DRAM

DRAM or SRAM: Requires periodic refreshing?

DRAM

DRAM or SRAM: Used for primary memory?

DRAM

Disk consists of 4 platters, 2 surfaces per platter, 10,000 cylinders, 400 sectors per track, 512 bytes per sector, average seek time of 5 milliseconds (ms), rotational rate of 8,000 RPM: Total estimated disk access time?

Disk access time = avg seek time + avg rotational latency + avg transfer time. 5 ms + 3.725ms + 0.01875ms = 8.74375ms

What are buses?

Electrical conduits that transfer data (addresses, control signals, etc) between CPU and DRAM Read = memory -> CPU Write = CPU -> Memory

What buses are independent of CPU

I/O bus, PCI bus, and USB bus

32 512M x 8 DRAMs: # of rows?

Look at DRAM size (512M = 2^29). 2^29 = 2^14 x 2^15. 2^14 is our number of rows.. 2^15 is our number of columns.

32 512M x 8 DRAMs: # of columns?

Look at DRAM size (512M = 2^29). 2^29 = 2^14 x 2^15. 2^14 is our number of rows.. 2^15 is our number of columns.

Disk consists of 4 platters, 2 surfaces per platter, 10,000 cylinders, 400 sectors per track, 512 bytes per sector, average seek time of 5 milliseconds (ms), rotational rate of 8,000 RPM: Avg rotational latency in ms?

Rotational latency = full rotation / 2 On average, the disk is rotated halfway. 7.5ms/2 = 3.725 ms

Which of the following are types of interfaces (adapters) between an I/O bus and a disk controller?

SCSI and SATA

DRAM or SRAM: Requires more transistors per bit?

SRAM

DRAM or SRAM: Faster to access?

SRAM

DRAM or SRAM: More expensive per bit?

SRAM

What is TIO? (Cache)?

Tag - Index - Offset

A request sent to the cache that can be served by the cache (in other words, the desired instruction or data is currently in the cache) is called a

cache hit

A miss that occurs because the cache is not large enough to hold the working set (the set of blocks that are needed for program execution during some phase of the program execution) is called

capacity miss

The first access to a program block (that is, to some instruction or data in a memory block allocated for execution of a program) results in a type of miss known as a

cold miss

A miss that occurs because multiple memory blocks map to the same cache block is called a

conflict miss

Cache(s) in which each set only contains 1 line is known as a

direct mapped cache and 1-way set associative

If an I/O controller is able to write to main memory without the involvement of the CPU, it is employing a technique known as

direct memory access

Disk consists of 4 platters, 2 surfaces per platter, 10,000 cylinders, 400 sectors per track, 512 bytes per sector, average seek time of 5 milliseconds (ms), rotational rate of 8,000 RPM: How much time in ms to rotate disk fully?

full rotation = (1/rpm) x 60 seconds x 1000 ms (1/8000 rotations per min) x (60 seconds per minute) x (1000 ms per second) = 7.5 ms

A cache which consists of exactly 1 set requiring the tag in the address to be compared to all tags in the cache simultaneously is known as a

fully associative cache Only *ONE* set, all tags have to be checked

What are optimization blockers?

function calls and memory aliasing

Programs for which a memory hierarchy provides good performance are programs that exhibit good

locality

32 512M x 8 DRAMs: How many bits needed to identify DRAM #?

log_2 (# of DRAMS) ---> log_2 (32) = 5

32 512M x 8 DRAMs: How many BITS are needed to store an address?

log_2(Size) ---> log_2(2^34) = 34

The case where two or more pointers refer to the same memory location is known as

memory aliasing

If a computer system accesses an I/O device using an address in its memory's address space, it is employing a technique known as

memory mapped I/O

Disk consists of 4 platters, 2 surfaces per platter, 10,000 cylinders, 400 sectors per track, 512 bytes per sector, average seek time of 5 milliseconds (ms), rotational rate of 8,000 RPM: Capacity of drive in GB?

platters x surfaces x cylinders x sectors x bytes per sector 4 x 2 x 10000 x 400 x 512 = 1.684 x 10^10 = 16.384 GB

Choose the ordering that shows the least to most expensive ordering of the storage technology in cost per byte.

rotating disk, SSD, DRAM, SRAM

Disk tracks are divided into storage units called

sectors

The principle that programs tend to reference items stored near to items accessed in the immediate past is known as

spatial locality

The principle that programs tend to reference the same item (instruction or data) in the future that was referenced in the immediate past is known as

temporal locality

The situation in which the same set of main memory blocks are repeatedly loaded into the cache and then evicted is known as

thrashing

The concentric rings on each surface of a disk platter are called

tracks

What is the job of the disk controller?

translates a logical block number into a (surface, track, sector) triple, copies the bits read from the disk into main memory, moves the disk heads to the appropriate cylinder

The write hit policy in which a write to a block in level k of memory does not result in a write to the block in level k + 1 until the block in level k is evicted is known as

write back

The write hit policy in which a write to a block in level k of memory also results in write to the block in level k + 1 is known as

write through, write back

A collection of contiguous cylinders where each track in the collection contains the same number of sectors is called a

zone