4.1 - Central Processing Unit (CPU) Architecture

Ace your homework & exams now with Quizwiz!

Clock Cycle

Clock speeds are measured in terms of GHz; this is the vibrational frequency of the clock which sends out pulses along the control bus - a 3.5 GHZ clock cycle means 3.5 billion clock cycles a second

Interrupt

Signal sent from a device or software to a processor requesting its attention; the processor suspends all operations until the interrupt has ben serviced

Interrupt Service Routine (ISR) or Interrupt Handler

Software which handles interrupt requests (such as 'printer out of paper') and sends the request to the CPU for processing

Video Graphics Array (VGA)

Type of port connecting devices to a computer

Cache Memory

A high speed auxiliary memory which permits high speed data transfer and retrieval

Current Instruction Register

A register used to contain the instruction which is currently being executed or decoded

High-Definition Multimedia Interface (HDMI)

Type of port connecting devices to a computer

Special Purpose Registers in Processor Summary

1. Memory Address Register (MAR) - Holds the memory location of data that needs to be accessed 2. Memory Data Register (MDR) - Holds data that is being transferred to or from memory 3. Accumulator (AC) - Where intermediate arithmetic and logic results are stored 4. Program Counter (PC) - Contains the address of the next instruction to be executed 5. Current Instruction Register (CIR) - Contains the current instruction during processing

Quad Core

A CPU containing four cores

Dual Core

A CPU containing two cores

Fetch-Execute Cycle

A cycle in which instructions and data are fetched from memory and then decoded and finally executed

Program Counter (PC)

A register used in a computer to store the address of the instruction which is currently being executed

Universal Serial Bus (USB)

A type of port connecting devices to a computer

Core

A unit made up of ALU, control unit and registers which is part of a CPU. A CPU may contain a number of cores

Interrupt Priority

All interrupts are given a priority so that the processor knows which need to be serviced first and which interrupts are to be dealt with quickly

Data Bus

Allows data to be carried from processor to memory (and vice versa) or to and from input/output devices

BIOS

Basic input/output system

Control Bus

Carries signals from control unit to all other computer components

Address Bus

Carries the addresses throughout the computer system

Overclocking

Changing the clock speed of a system clock to a value higher than the factory/recommended setting

Arithmetic Logic Unit (ALU)

Component in the processor which carries out all arithmetic and logical operations

Control Unit

Ensures synchronisation of data flow and programs throughout the computer by sending out control signals along the control bus

Port

External connection to a computer which allows it to communicate with various peripheral devices. A number of different port technologies exist

Word

Group of bits used by a computer to represent a single unit

Immediate Access Store (IAS)

Holds all data and programs needed to be accessed by the control unit

Register Transfer Notation (RTN)

Short hand notation to show movement of data and instructions in a processor, can be used to represent the operation of the fetch-execute cycle

Flag

Indicates the status of a bit in the status register, for example, N = 1 indicates the result of an addition gives a negative value

High-Bandwidth Digital Copy Protection (HDCP)

Part of HDMI technology which reduces risk of piracy of software and multimedia

System Clock

Produces timing signals on the control bus to ensure synchronisation takes place

Asynchronous Serial Data Transmission

Serial refers to a single wire being used to transmit bits of data one after the other. Asynchronous refers to a sender using its own clock/timer device rather sharing the same clock/timer with the recipient device

Register

Temporary component in the processor which can be general or specific in its use that holds data or instructions as part of the fetch-execute cycle

Accumulator

Temporary general purpose register which stores numerical values at any part of a given operation

Von Neumann Architecture

The key elements of Von Neumann Architecture are: data and instructions are both stored in primary storage, instructions are fetched from memory one at a time and in order. Program and data are indistinguishable. It's architecture uses a single processor

Bidirectional

Used to describe a bus in which bits can travel in both directions

Unidirectional

Used to describe a bus in which bits can travel in one direction only

Status Register

Used when an instruction requires some form of arithmetic or logical processing


Related study sets

Addiction counseling Quiz chapter 1-3

View Set

STUDY UNIT 1: Investigative interviewing

View Set

HUN3224 Ch. 3 Carbohydrate Digestion & Absorption

View Set

Critical Care: Chapter 11: Organ Donations

View Set