Comp Organization

The control store for a hardwired control unit is implemented using ROM,EPROM, or PROM

False

Variable-length instructions are easier to decode than fixed-length instructions

False

are generated by memory, the hard drive, the keyboard, and the mouse

Hardware interrupts

The _________ of a machine specifies the instructions that the computer can perform and the format for each instruction

Instruction set architecture

____are events that alter the normal flow of execution in the system

Interrupts

A major advantage of direct mapped cache is its simplicity and ease of Implementation. The main disadvantage of direct mapped cache

It's performance is degraded if two or more blocks that map to the same location are used alternately

The register that holds the actual data to be read from or written to a given memory address is called the

Memory buffer register

General-purpose architectures are divided into the following three groups:

Memory-memory, register-memory, and load-store

The _______ is a group of bits that tells the computer to perform a specific operation

Opcode

This common method used to increase CPU throughput can result in destructive overheating of the CPU

Overclocking

What's the result of subtracting the following two numbers in 2's complement system (Assume we're limited to 6-bits)? Express result in complement system 101011 011010

Overflow

The____register keeps track of the next instruction to be fetched

Program counter

The three basic ISA architectures for internal storage in the CPU are

Stack,accumulator, and general-purpose registers

The MARIE machine language instruction 0011000000001001 is equivalent to MARIE instruction in assembly language

Storel X

A computer bus consists of data lines,___,control lines, and power lines

address lines

The Boolean function F(x,y)=x'y'+x'y+xy is equivalent to

x'+y

Based on DeMorgan's law, (xy)' is

x'+y'

Based on DeMorgan's Law, (x+y)' is

x'y'

Which of the following is the correct sum-of-minterms expression for the function F shown in the truth table below? 0000 0010 0101 0111 1001 1011 1101 1111

x'yz'+x'yz+xy'z'+xy'z+xyz'+xyz

Which of the following expressions is the correct canonical SOP expression (iesum of minterm expression) of the function below 0000 0010 0101 0111 1000 1010 1101 1111

x'yz'+x'yz+xy'z'+xyz'+xyz

The Boolean function F(x,y,z)=xy'z+(x+z'+xz')' simplifies to

x'z+y'z

The Boolean function F(x,y)=x'y' +xy'+y(xy')can be simplified to

y'

The Boolean function F(x,y)=x'y'+ xy'+y(xy') can be simplified to:

y'

Convert the following decimal Real number to fixed point binary: 9.73 10

00001001.10111010

Represent 33 10 in 2's complement binary system using 8-bits

00100001

What's 37 10 in unsigned binary (lebase 2) using 8-bits

00100101

Convert -61(bas 10) to 8bit binary using excess 127 notation

01000010

Convert the following decimal Real number to fixed point binary: 71.875 10 Assume 8 bits for the whole part and 8 bits for the fraction

01000111.11100000

What's the result of adding the following two numbers in 2^ prime s complement system (Assume we're limited to 6-bits )? 011011 + 111010

010101

What's 43 10 in 2's complement binary system? Use minimum number of bits

0101011

What's 37 10 in unsigned binary (, base 2)

100101

Convert 58 (base 10) to 8-bit binary using excess 127 notation

10111001

What's stored in the PC (Program Counter) register right after the JNS instruction is executed? Express in Hex

107

What's stored in the PC (Program Counter) register right after the JNS instruction is executed? Express in Hex

108

Convert the decimal number -5.6 to a floating-point number expressed in the 14-blt simple model given in your text (1 bit for the signbits for exponent using excess-15 notation, and 8 bit mantissa with implied bit)

11001010110011

What's the result of adding the following two numbers in 2's complement system (Assume we're limited to 6-bits)? 111011 + 111010

110101

Represent -33 10 in 2's complement binary system using 8-bits.

11011111

What's the content of the IR right after the first instruction is fetched before the second Instruction is fetched? Express your answer in Hex

1107

Convert -28 (base 10) to binary 8bit two's complement

11100100

What hexadecimal value is this on a big endian computer?

12345678

Consider the infix expression: 16 / (5 + 3) . The equivalent postfix (reverse Polish notation) expression is

16 5 3 + /

Suppose that a system uses 16-bit memory words and its memory is built from 32 1M*8 RAM chips. How large words, is the memory on this system ?

16M

Suppose we have a 256 byte byte-addressable memory that's way loworder interleavedThe following memory address 00010110 memory module_____ at offset ____

2,5

Suppose that a system uses 32-bit memory words and its memory is built from 16 1M*8 RAM chips. How many address bits are required to uniquely identify each memory word?

22

Suppose that a system uses 32-bit memory words and its memory is built from 16 1MB x 8RAM chips. How many address bits are required to uniquely identify each memory word

22

If a system's instruction set consists of an 8- bit opcodewhat is the maximum number of output signal lines required for the control unit

256

Suppose a system has a byte-addressable memory size of 256MB. How many bits are required for each address

28

The truth table shown below is supposed to reflect the function F(x,y,z)=y(x+z') but two lines are in error. Identify them 0000 0010 0100 0111 1000 1010 1101 1111

3 and 4

If a system's instruction set consists of a 5-bit , what is the maximum number of output signal lines required for the control unit?

32

Suppose a computer has 32-bit Instructions. The instruction set consists of 64 different operations. All instructions have an opcode and two address fields ( allowing for two addresses). The first of these addresses must be a register direct address, and the second must be a memory addressExpanding opcodes are not used. The machine has 16 registers. What's the size of the largest memory space that can be addressed by this computer ? Assume byte addressable memory

4 MB

The truth table shown below is supposed to reflect the function F(x,y,z)=x'y+xz but two lines are in error. Identify them. 0000 0010 0101 0111 1001 1011 1101 1111

5 and 7

Suppose that a 64MB wstem memory 64 1MB RAM . How many address lines are needed to select one of the memory chips ?

6

Suppose we have a 1024 byte byte-addressable memory that is 16-way low-order Interleaved. What is the size of the memory address module offset field?

6 bits

What integer value is this on a little endian computer?

78563412

Suppose a computer has 16-bit instructions. The Instruction set consists of 32 different operations. All Instructions have an opcode and address fields (allowing for two addresses). The first of these addresses must be a register, and the second must be a memory address Expanding opcodes are not used. The machine has 8 registers. How many bits can be used for the memory address?

8

The Boolean function F(x,y,z)=(y+x)(y+x')(y'+z) equivalent to

yz

The Boolean function F(x,y,z)=y'z+x'yz+xyz is equivalent to

z

The MARIE machine language instruction 0011000000001001 is equivalent to MARIE instruction in assembly language

Add 009

memory a small, high-speed, high-cost memory that servers as a buffer for frequently accessed data

Cache

____is the process whereby devices connected to a bus autonomously determine which of the devices shall have control over the bus

Distributed arbitration using self-selection

The Boolean expressions, x + (yz) = (x + y)(x + z) and x(y + z) = xy + xz , are examples of (the)

Distributive Law

A fixed-length instruction must have fixed-length opcodes

False

Accumulator architectures store one operand on the stack and the other in the accumulator

False

Big endian computers store a two-byte integer with the least significant byte at the lower address

False

Caching breaks down when programs exhibit good locality

False

Fixed-length instructions always have the same number of operands

False

Interrupt checking is typically carried out at various times during the execution of a machine instruction

False

One disadvantage to big endian representation is that most computers require words to be written on word address boundaries

True

Short instructions are typically better because they take up less room and can be fetched quickly

True

The purpose of both hardwired control units and microprogrammed control units is to raise a series of signals that carry out operations inside a computer system

True

While and if statements are examples of conditional branching instructions

True

x+x'=1

True

x+x=x

True

x+yz=(x+y)(x+z)

True

x.x=x

True

Assembly Language

Uses alphabetic (mnemonic) codes in place of binary strings

The Boolean expressions x(x + y) = x and x + xy = x are examples of (the)

Absorption Law

Using de Morgan's Law, (AB+CD' )' equivalent to which of the following boolean expressions

(A'+B').(C'+D)

The range of decimal values that can be represented using 8 bits in unsigned binary with Excess-127 notation is

-127 to 128

The range of decimal values that can be represented using 8 bits in 2's complement is

-128 to 127

The binary string 11001111011110 is a floating point number expressed using the 14-bit simple given your textThere are implied bits) What is its decimal equivalent ?

-13.875

Convert the following binary sequence from 2's complement binary system to decimal: 11011101

-35

The range of decimal values that can be represented using 10 bits in 2's Complement system is

-512 to 511

Convert 0.6 to binary with 8 bits to the right of the binary point

.10011001

Suppose we have 256 byte byte-addressable memory that's 4-way high-order interleaved. The following memory address 00010110 is in memory module at offset

0,22

In reverse Polish notation, the expression A*B+C*D is written:

AB*CD*+

Consider the postfix expression: A-B+C*(D*E-F)/(G+H*K) . The equivalent postfix (reverse Polish notation) expression is

AB-CDE*F-*+GHK*+/

The equation below relates seconds to instruction cycles. What goes in the ???? space?

Average cycles

What is the minimum sum-of-products expression for the following Kmap? 0 0 1 1 0 0 0 0 1 1 1 1 1 1 1 1

C+AD'

connects the CPU to memory

System Bus

A Very Long Instruction Word (VLIW) is an architectural characteristic which each instruction can specify multiple scalar operations

True

A unified cache is a cache that holds both data and instructions

True

Direct mapping is set associative mapping with a set size of 1.

True

General-purpose register architectures are the most widely accepted models for computers today

True

In high-order memory interleaving the high-order bits of the memory address are used to select the memory bank

True

The term endian refers a computer architecture's

byte order

Fixed-length instructions :

waste space but are fast and perform better than variable length instructions

The tag field of a main memory address is used to determine

if the cache entry is the desired block

A major advantage of direct mapped cache is its simplicity and ease of implementation. The main disadvantage of direct mapped cache is

its performance degraded if two or more blocks that map to the same location are used alternately