CS 300 Exam 2
With a page size of 512 words and a program size of 1536 words, _____ words are lost to internal fragmentation.
0. Program size is exactly 3 times the page size.
Dynamic relocation
postpones the binding of a logical address to a physical address until the addressed item is accessed during execution.
Worst-fit
takes the opposite approach from best-fit by always choosing the largest available hole for any request.
A segment table contains the following segment sizes and starting physical addresses: Size Address 0 32 30 1 10 11 The logical address (0, 10) will be translated to the physical address _____. The logical address (1, 9) will be translated to the physical address _____. The logical address _____ is illegal.
(30+10) (11+9) (1,10)
With the above mapping, the starting physical address of the frame is _____.
(4, 0)
A segment s has a length of 1030 words. The page size is 512 words. The address _____ is illegal.
(s, 2, 100) 2 *512 + 6 = 1030 offset is past the bound
Page size = 512 Logical address = 170 Determine Page number (p): Offset (w): Frame number (f): Physical Address (PA):
0 170 12 6314 p = 170 / 512 w = 170 % 512 PT[0] = 12 PA = 12 * 512 + 170 PA = Frame number * page size + offset
Memory has 3 frames containing pages 0, 1, and 2, where 0 is the oldest page. RS = {0 3 0 1} When page 3 is referenced, FIFO will replace page _____. The total number of page faults for the RS is _____. The best page to remove when page 3 is referenced would be ______.
0 3 2
Concurrent processes p and q share a function f. If both processes call f, then _____ copies of f will be loaded into memory. If neither process calls f, then under static linking, _____ copies of f will be loaded into memory. If neither process calls f, then under dynamic linking, _____ copies f will be loaded into memory.
1 1 0
RS = {0 1 2 1 2 3 4 5 2 2 2 2 2 1 0} With d = 4, the minimum working set size is _____. With d = 4, the maximum working set size is _____. With d = 5, the minimum working set size is _____. With d = 5, the maximum working set size is _____. With d = 6, the minimum working set size is _____. With d = 6, the maximum working set size is _____.
1 4 1 5 2 5
With 4 frames and RS = {1 2 3 4 2 }, the queue for LRU replacement will at the end contain the sequence of pages _____ . The left-most page is the Q head (least recent) and the right-most page is the Q end (most recent).
1 3 4 2
The 50% rule implies that _____.
1/3 of all memory partitions are holes and makes no statement about memory utilization.
With an address space of 1024 words, the address 6 will occupy _____ bits.
10
With dynamic relocation, the operand of the instruction st will be _____.
120. The addresses do not change when the load module is copied into memory.
With a page size of 512 words and a program size of 1536 words, address _____ is illegal.
1536
With a page size of 512 words and a program size of 1537 words, address _____ is illegal.
1537
A segment can occupy up to ____ words. The size of a logical address is ____ bits. The size of a physical address is ____ bits. The logical address 0 is translated to the physical address ____ (in decimal). The logical address 27 is translated to the physical address ____ (in decimal).
16 7 6 28 27
Max number of segments per process Max number of pages per segment Max page size Max segment size Max size of logical address space per process
2^3 2^4 2^5 2^9 2^12
An address space with an address size of 16 bits and a page size of 512 words will consist of _____ pages.
2^7
An address consists of a 5-bit page number and a 4-bit offset. The number of pages is _____. The pages size is _____. The address (2, 3) denotes the binary address _____.
32 16 000100011
The sliding window of size d = 6 contains the references (0 1 0 2 0 3). The next 5 references are: 3 0 1 2 4. The size of the current WS is _____. The reference to page _____ will cause the next page fault.
4 1
A memory with 2 page frames contains pages 5 and 3 Time: 1 2 3 4 5 6 7 RS: 5 5 5 1 3 5 3 The first page fault will occur at time _____. Page _____ will be replaced by the first page fault.
4 since page 1 doesnt exist 5 since it isnt referenced for the longest
With a page size of 512 words and a program size of 1537 words, _____ words are lost to internal fragmentation.
511
The above load module is moved into memory starting at address 500.The variable i will reside at physical address _____.
620. The starting address 500 is added to the logical address 120.
A VM has 16 pages. The size of the sliding window is d = 8. Currently 4 page frames are free. The maximum size the WS can have is _____. The minimum size the WS can have is _____.
8 1
Address translation with a paged page table.
A 3 level hierarchy starts with a segment table. The entry s points to the page table of segment s and each entry of the page table points to one page of segment s in physical memory. A page table that is too large to keep in memory may be subdivided into pages, each entry still pointing to the same pages as before. To keep track of the pages constituting the page table, a higher order page table PT' of the page table PT is introduced. Each entry points to a page of the page table. The page number p is divided into two components, p1 and p2, resulting in a virtual address of the form (s, p1, p2, w). s selects the segment. p1 selects the entry in the page table PT' of the page table PT that points to page p1 of PT. p2 is an offset into page p1 of PT, which contains the frame number of the page containing the word corresponding to the virtual address (s, p1, p2, w).
Logical and physical address structure.
A 5-bit address is needed for an address space of 32 words. The address range is [00000:11111] (or [0:31] in decimal). When the space is divided into pages of size 8 then 3 bits are needed for the offset w, which has the range [000:111] within each page. The remaining 2 bits of the address give the page number p. The range [00:11] specifies the 4 pages, p0 to p3. The same address space can be divided differently. If the page size is 4, then only 2 bits are needed for w. The remaining 3 bits then identify 8 different page numbers, p0 to p7. Physical memory is divided into frames in a similar manner. The frame size must be identical to page size (same w). With a 6-bit physical address space, 16 frames are created (f0 to f15). If page 0 is mapped to frame 1, then p is mapped to f. All logical addresses starting with 000 are translated into physical addresses starting with 0001. The offset w is unchanged (bits xy). Similarly, if page 1 is mapped to frame 15, then logical addresses starting with 011 are translated to physical addresses starting with 1111.
Demand paging.
A VM is a large address space consisting of pages [0:n-1]. The portion occupied by the program (pages [0:r]) is kept on disk. The remaining pages are just an abstraction. A page table keeps track of which pages are currently in physical memory. If a page is resident, then the present bit is set and the entry field points to the corresponding frame. If execution crosses a page boundary into a non-resident page, the present bit triggers a page fault, which causes the page to be copied into a free frame. The page table is updated. Similarly, when execution references a non-resident data page, a page fault causes the page to be copied into memory and the page table to be updated accordingly.
With 3 page frames and RS = {0 1 2 0 3 0}, FIFO will cause _____ LRU.
A larger number of page faults than
Address translation with paging.
A logical address (p, w) needs to be translated into a physical address. The page number p is used to access the page table at offset p. The page table entry contains the frame number f holding the page p. The address (f, 0) is the starting address of the frame. The frame number f is copied into the physical address being formed. The offset w is copied from the logical address to the physical address unchanged. (f, w) identifies the word in physical memory corresponding to the word in the logical address space at address (p, w).
The translation lookaside buffer.
A logical address (s, p, w) is to be translated to a physical address (f, w). The translation mechanism first searches associatively all entries of the TLB for a match for (s, p). If no match is found, then the segment and page tables are used to find the frame f. The offset w is copied into the new address. The TLB slot with the least recently used entry is selected and the sp component of the logical address is stored along with the frame number f. If another address with the same s and p is to be translated, the translation finds a match for sp in the TLB. f is copied from the TLB without accessing any tables. The offset w' is copied from the logical address to complete the physical address (f, w').
Address translation with segmentation and paging.
A logical address (s, p, w) needs to be translated into a physical address. The segment number s is used to access the segment table at offset s. pw is the address within s and is compared to the segment size. If pw ≥ sze then the address is illegal. Otherwise the translation continues. The segment table entry at offset s points to the page table of segment s. The page number p is used to access the page table at offset p, which contains the frame number f of page p. The address (f, 0) is the starting address of the frame. The frame number f is copied into the physical address being formed. The offset w is copied from the logical address to the physical address. (f, w) identifies the word in physical memory corresponding to the word at logical address (s, p, w).
Address translation with segmentation.
A logical address (s, w) needs to be translated into a physical address. The segment number s is used to access the segment table entry at offset s. The size, sze, of the segment s is compared with w. If w ≥ sze, the address is illegal. Otherwise the translation continues. The entry contains the starting physical address sa of segment s. The starting address sa of the segment is copied into the physical address being formed. The offset w is added to the physical address sa thus forming the physical address corresponding to (s, w). The newly formed address sa + w identifies the word in physical address space corresponding to the word at logical address (s, w).
Static vs dynamic relocation
A program consists of multiple source modules, each written in a high-level language. Module S defines a variable i, which is later assigned a value. Function f resides in a different module. The compiler assumes a logical address 0 and assigns i to address 20. The store instruction st then references location 20. The location of f is unknown and is kept as a symbolic external reference. The linker also assumes a logical starting address of 0 and combines all object modules into one load module. S is relocated to reflect the starting address 100. The call now refers to the start of f. With static relocation, the loader must adjust all logical addresses to physical addresses when copying the module into memory at the starting physical address of 1000. With dynamic relocation, the load module is copied into memory also starting at address 1000 but without any changes to the addresses in the code. Relocation is done at runtime by adding the starting address 1000 to every address when referenced.
Program Transformations
A program consists of one or more source modules written in a high-level language or assembly language. Each module is translated separately into an object module using a compiler or assembler. Object modules are combined into a load module by a linker. The load module is kept on disk. Prior to execution, the load module is copied to physical memory by a loader. Various system libraries, in the form of object modules, may be included in the load module by the linker, the loader, or during execution.
Process of internal fragmentation
A program's logical address space consists of n pages (0 through n-1), into which all program components are combined. The program occupies pages 0 through k, while the remaining pages do not belong to the program and must not be accessible. If the program size is not a multiple of the page size, a portion of the last page k remains unused, resulting in internal fragmentation. To guarantee that every logical address refers to a location within the program, the address must be compared with the program size. Any address exceeding the program size must be rejected.
Segmentation with paging mapped to physical memory.
A system using paging and segmentation is mapped on a physical memory of 64 words arranged into 16 frames. The frame size and page size is 4 words. The segment table starts at address 0 and occupies 2 frames, thus up to 8 segments can be represented. The first segment table entry contains address 32. Thus page table of segment 0 starts at address 32. Similarly, the entry at offset 1 gives the page table address of segments 1 and the entry at offset 5 gives the page table address of segment 5. The remaining segments do not exist (denoted by "---"). Page table of segment 0 has 4 entries (28, 48, 52, 56), each pointing to one of the pages of segment 0. Page table of segment 1 has 3 entries (12, 20, 24), each pointing to one of the pages of segment 1. Page 3 does not exist. Page table of segment 5 has 1 entry (44), which points to page 0 of segment 5. Pages 1-3 do no exist. The frames at addresses 16, 36, and 40 are not part of the memory hierarchy and are thus free. A logical address (s, p, w) has 7 bits: 3 bits to access the 8 words of the segment table, and 2 bits each to access a page table and a page of 4 words. Ex: 82 = (5, 0, 2) A logical address is translated into a physical address by tracing through the memory hierarchy starting with the segment table. The logical address 82 is translated to the physical address 46.
The list contains 4 holes, A through D, with the given sizes. A: 5 B: 55 C: 11 D: 100 First-fit will place a request for 10 bytes into hole _____. Best-fit will place a request for 10 bytes into hole _____. Worst-fit will place a request for 10 bytes into hole _____. If the last request was placed into hole D then next-fit will place a subsequent request for 20 bytes into hole _____.
B C D B
Which strategy always needs to search all holes?
Best-fit
Which strategy tends to preserve large holes?
Best-fit
When # of processes is very small/very large
CPU utilization is low
The page fault rate _____ as d increases.
Decreases
aging page replacement algorithm
Does not maintain pages sorted in the exact LRU order, but groups together pages referenced during a period of d consecutive references. Each period is represented by 1 bit in a periodically shifting aging register.
The page-fault-frequency replacement algorithm.
Each of the first 4 references causes a page fault and the resident set grows to 4 pages. The next 4 references access only resident pages and cause no page faults or changes to the resident set. The next page fault at time 8 adds the referenced page 4 to the resident set. Since the distance between the current and last page fault, 8 - 3 = 5, is greater than d, pages 0 and 2, which have not been referenced since time 3, are removed from the resident set. No action is needed during the next 2 references and the resident set remains unchanged. At time 11, only the referenced page 2 is added but no pages are removed since the distance between the page faults, 11 - 8 = 3, is not greater than 4. The resident set increases by 1.
The size of the working set grows linearly with d.
False
Assume the code section in the above example contains the instructions:1. Branch to a location within the code section2. Load a value x from the static data section3. Add a constant operand 100 to x4. Store the new value x+100 in the dynamic data section Instruction 1 will use _____. Instruction 2 will use _____. Instruction 3 will use _____. Instruction 4 will use _____.
Flag cr Flag dr no flag flag fr
Overhead of page faults.
If a memory reference takes m units of time then executing t memory references without any page faults takes t * m units. If the processing of a page fault takes S time units then f page faults increase the execution time of a process by f * S. To keep the paging overhead to less than 10%, the time f * S needed to process all page faults must not exceed 1/10th of the time t * m needed for the t references. If m = 100 ns and S = 10 ms (= 10,000,000 ns) then the page fault rate, f/t, must not exceed 1 page fault per 1 million memory operations.
At a page fault, the resident set size can _____.
Increas by only 1, decrease by more than 1, or remain the same
The aging page replacement algorithm.
Initially, pages 0 - 3 are resident. The r-bits and the aging registers all contain zeros. After d references, the r-bits show that pages 0, 2, and 3 have been accessed at least once during the past d references. All aging registers are shifted to the right. The r-bits are shifted into the most significant positions of the aging registers and then reset to 0. During the next d references, pages 1 and 2 were accessed at least once and so the coresponding r-bits are 1. The aging registers are again shifted to the right. The r-bits are shifted into the most significant register positions and then reset to 0. During the next d references, pages 0 and 3 are accessed and the same steps of shifting and resetting the r-bits are repeated. If a page fault occurs then all registers are compared and the page with the smallest value is selected. Page 1 is replaced with the faulting page.
An object module is the input to the _____.
Linker
Swapping and compaction.
Memory contains 4 occupied blocks of the given sizes. A new request for a block of size 10 arrives but no hole is large enough. Swapping chooses a resident block to temporarily move to disk, thus creating enough space for the new request. Compaction moves resident blocks to create more space. The simplest approach is to move all blocks to one side of memory, thus creating a single large hole. The new request is then accommodated in the new large hole. Another approach is to stop moving blocks as soon as a hole large enough is created, thus reducing potentially unnecessary work. More sophisticated approaches use heuristics to move only blocks that are likely to generate most space, thus minimizing the overhead. Ex: Moving the single block of size 2 is sufficient.
Bound check
Most programs also do not need all pages of the entire logical address space and must be prevented from accessing any page not belonging to the program. Some systems implement a valid-bit in each page table entry and prevent access to pages not belonging to the program. But the valid bit does not protect the unused fragment on the last partially filled page. A better approach is to compare every logical address to the program size to prevent access to any memory locations not belonging to the program.
RS = { 0 0 0 0 1 1 1 1 1 2 } and only page 0 is currently resident. With d = 7, the page fault caused by page 2 will _____ . With d = 3, the page fault caused by page 2 will _____ .
Not remove any pages from the resident set Remove page 0 from the resident set
The size of f determines _____.
Number of frames in the physical space
The size of p determines _____.
Number of pages in the logical address space
The VM addresses use:s: 5 bitsp1: 3 bitsp2: 4 bits
Number of segments is 2^5 Number of pages per segment is 2^7
The size of w determines _____.
Number of words per page
The meaning of the present bit p. When p = 0 then the corresponding page resides _____. When p = 1 then the corresponding page resides _____.
On disk only in both physical memory and disk
Translate Logical Addresses into physical addresses. LA (2, 130) LA (0, 988) LA (0, 764)
Pa = 230 Illegal PA = 1964 (2, 130) refers to segment 2, which starts at address 100. Since the offset 130 < 278, the address is legal. Thus PA = 100 + 130 = 230. (0, 988) refers to segment 0, which starts at address 1200. Since the offset 988 ≥ 836, the address is illegal. (0, 764) refers to segment 0, which starts at address 1200. Since the offset 764 < 836, the address is legal. Thus PA = 1200 + 764 = 1964.
A system uses the second-chance page replacement algorithm. At time i, the four page frames contain the page numbers and r-bits shown below. The pointer is at the page to be considered next. At time i + 1, page p is referenced. Determine which of the values change (if any) when each page is referenced.
Page 5 is resident and the r-bit is already 1. No change takes place. Page 8 is not resident. An existing page must be replaced and the r-bit set to 1. The pointer is updated to point to the next page frame. Page 7 is resident but the r-bit is 0. The r-bit is set to 1.
Choice of page size.
Page table size depends on the number of pages. Each time page size is reduced by half, twice as many pages are needed for the same address space and thus the page table size doubles. Similarly, the TLB is able to cover twice as much address space with each entry when the page size is doubled. Each disk transfer has a fixed start-up cost, c, followed by a linear increase proportional to the amount of data. Transferring 2 pages of size n requires one more c than a page of size 2n. The program size is not a multiple of the page size. On average, 1/2 of the last page is lost to internal fragmentation. The loss is proportional to the page size. The principle of locality constrains execution to small areas on every page. A large page size contains more instructions and data that will not be used. Thus the page fault rate increases with page size.
The third-chance replacement algorithm.
Pages 0 - 3 are resident. Pages 2 and 3 have been referenced in the past and have the r-bit set to 1. No page has been modified. The pointer for starting a new search is at page 0. At time 1, page 0 is referenced. Since the page is resident, only the r-bit is set. The page fault at time 2 starts the search at page 0. Since the 2 bits are not 00, page 0 gets a second chance to remain resident. The r-bit is reset and the pointer moves to the next page. Page 1's r/m-bits are 00. Thus page 1 is replaced by page 4 and the pointer is advanced to the next page. At time 3, page 0 is referenced again, which sets the r-bit to 1. The r/m-bits of all pages are now 10. At time 4, page 2 is modified. The w-subscript indicates a write operation. The m-bit is set. The second page fault at time 5 starts the search with page 2. The r/m-bits are both set, giving page 2 an additional chance to remain resident. The r-bit is reset first. Next, pages 3, 0, and 4 are examined in sequence. Each time the r-bit is reset and the pointer advanced to the next page. Since no page with bits 00 has been found after a complete cycle, the search continues with page 2. The m-bit is reset and the pointer advanced to page 3, which is replaced by page 1.
The second-chance replacement algorithm.
Pages 0 through 3 are resident in frames 0 through 3. The pointer for starting a new search is at page 0. The bits following the vertical bars are the reference-bits r. Only page 1 has been referenced in the past and has the r-bit set to 1. At time 1 page 2 is referenced. The r-bit is set to 1 but the pointer does not change. At time 2 page 1 is referenced. Since the r-bit is already 1, no change is necessary. A page fault occurs at time 3. Since the pointer is at a page with r = 0, the page is replaced by page 4 and the pointer is advanced to the next page. The next page fault starts the search with page 1. Since r = 1, page 1 is given a second chance to stay resident. The r-bit is reset and the pointer is advanced. The r-bit of the next page 2 is also 1, allowing page 2 to remain resident. The r-bit of page 3 is 0 and so page 3 is replaced by the faulting page 0. The pointer cycles back to page 4.
Numbers of page tables and page table entries. For each process, _____. The OS maintains _____.
Pages are numbered consecutively starting with 0. A separate page table for each logical space.
Paging and fragmentation
Paging avoids external fragmentation by having all pages and page frames the same size so that any page fits into any frame without creating holes between frames. However, the size of a program is generally not an exact multiple of the page size and thus some space remains unused at the end of the last page.
Paging
Paging divides both the logical address space of a process and the physical memory (RAM) into contiguous, equal-sized partitions such that any logical partition can be mapped into any physical partition. Searching variable-sized holes becomes unnecessary.
Dynamic linking and sharing.
Process p is executing a main function pointed to by the code base register CRp. A call to an external function f has been replaced by a STUB. If f is called, the linker finds and loads f into memory. The STUB is replaced by a call to f, which transfers control to the new module by storing the now known address of f into CRp. After p has already called and loaded f, a second process q starts executing. CRq points at q's main function. Later q also needs to invoke the same function f. When q's STUB is executed, the loader finds out that f is already memory. The STUB is replaced by a call and control is transferred to f, which is now shared by p and q. Both processes share the same code via the respective CR registers while each is still accessing a different static and dynamic area via the DR and FR registers.
Principles of paging.
Process p1's logical address space consists of 3 pages, which are mapped to page frames 0, 1, and 6 in physical memory. Similarly, process p2's pages are mapped to frames 2 and 4. To keep track of the mapping, p1's page table (PT1) has 3 entries, one for each page. Each page table entry points to the beginning of the corresponding frame. Similarly, p2's page table entries point to the 2 frames holding pages 0 and 1.
Principles of segmentation.
Process p1's logical address space consists of 3 segments, which are mapped to variable-size areas in physical memory based on space availability. Similarly, process p2's segments are mapped to variable-size areas in physical memory. To keep track of the mapping, each process has a segment table (ST1 and ST2), where each entry corresponds to one of the segments. Each segment table entry points to the beginning of the corresponding segment in physical memory.
Page table size _____ as page size increases. Internal fragmentation _____ as page size increases. The memory space covered by the TLB _____ as page size increases. The average cost of disk I/O _____ as page size increases. Page fault rate _____ as page size increases.
Shrinks Grolws Grows Shrinks Grows
Address translation
Similar to paging, segmentation breaks each logical address into two components: a segment number s and an offset w within the segment. With an n-bit physical address, 2^n addresses can be formed. If k bits are used for the offset w, then 2^(n−k) segment numbers can be formed.
Memory consists of 3 occupied blocks of size 20 KB each and 4 holes of size 30 KB each: f moving data between memory and a disk is 3 times slower than moving data within memory, then to accommodate a new request of size 80, _____. A smart compaction algorithm could create a hole of size 80 by moving at most _____ block(s).
Swapping will be slower than compaction. 1
The LRU replacement algorithm.
The 4 frames contain pages 0 through 3. The queue shows that 3 is the most recently referenced page and 0 is the least frequently referenced page. At time 1, page 2 is referenced. The page is resident so no page fault results but the queue is reordered by moving 2 to the head. Similarly, no page faults are caused by the next 3 references but the queue is reordered each time. At time 5, page 4 causes a page fault. The page at the end of the list (page 2) is removed from the queue and the new page 4 is inserted at the head. Page 4 then replaces page 2 in memory. The next 2 references cause no changes to memory but continue reordering the queue.
50% continued
The 50% rule only refers to the number of holes but not the amount of space occupied by the holes. If the average hole size is equal to the average occupied block size then 1/3 of memory space is wasted. But a smaller average hole size implies better memory utilization since less memory is wasted on holes.
Intuition behind the 50% rule.
The 50% rule states that, on average, one hole exists for every 2 occupied blocks. The ratio cannot be changed by any allocation strategy, regardless of the block or hole sizes. 4 types of occupied blocks co-exist in memory: A has 2 hole neighbors. B and C have 1 hole neighbor each. D has no hole neighbors. Releasing a block of type A decreases the number of holes by 1 by coalescing the released block with the 2 neighboring holes. Releasing a block of type B or C does not change the number of holes. Only the size of the existing hole is increased. Releasing a block of type D increases the number of holes by 1 by creating a new hole. Since all block types are released with the same probability, a release does not change the number of holes on average. If the probability of finding an exactly matching hole for a given request is near zero, an allocation also does not change the number of holes. Only the size of the allocated hole is reduced. In a stable state the average # of releases equals the average # allocations. Since neither operation changes the number of holes, the hole-to-occupied-blocks ratio remains 1:2.
Virtual address translation. Size of segment table = size of page table = size of page = size of frame = 512 words. Physical memory has the following contents: PM: 0(2) 1(5) 2(3) 3(7) 4(9) The page table (PT) of segment 0 starts at physical address The page table (PT) of segment 3 starts at physical address Page 2 of segment 3 = PM[2 + 7]
The PT of segment 0 is in frame PM[0] = 2, so the PT of segment 0 starts at address 2 * 512 = 1024. The PT of segment 3 is in frame PM[3] = 7, so the PT of segment 3 starts at address 7 * 512 = 3584.
principle of locality
The TLB can store only a small number of translations. When all entries are full, a new translation must replace an existing one. The principle of locality states that locations accessed recently are more likely to be accessed again than locations accessed in the distant past. The TLB uses the principle of locality to always replace the least recently accessed entry.
The working-set page replacement algorithm.
The WS algorithm prescribes which pages must be resident but not in which frames. The current process has pages 0 - 4, some of which will be resident at different times. At time 0, pages 4, 3, and 0 are in the WS. The pages were loaded during the past 3 page faults at times -2, -1, and 0. At time 1, the sliding window of d = 4 still contains the 3 pages referenced previously plus the currently referenced page 2. The WS grows to 4 pages. At time 2, page 4 falls out of the sliding window and is removed from the WS, which now contains 3 pages. At time 3, the same pages are still in the sliding window. The WS does not change. At time 4, page 0 falls out of the sliding window and is removed from the WS but a new page 1 causes a page fault and is added to the WS. At time 5, the WS grows again to the maximum possible size of 4 by referencing a new page 4. During the next steps, only page 4 is referenced, which gradually reduces the WS to a single page.
The word size of an address space depends on _____.
The address size determines the number of words that can be addressed but not the word size. Each address can refer to a word whose size is independent of the address size.
With static relocation, the operand of the instruction st will be _____.
The instruction st refers to the the variable i stored at physical address 620.
Segmentation with paging
The main advantage of segmentation is the ability to create multiple variable-size address spaces. The main advantage of paging is the ability to place any page into any frame in memory. To gain the advantages of both, segmentation can be combined with paging.
A system uses segmentation with paging. Page size is 2048 words. A segment table contains the following segment sizes. 1 : 3839 3 : 4377 For each segment, determine: (a) the number of pages occupied by the segment (b) the largest valid LA = (s, p, w)
The number n of pages occupied by a segment is determined by dividing the segment size by the page size (rounded to the nearest higher integer): For segment 1: n = 3839 / 2048 = 2 For segment 3: n = 4377 / 2048 = 3 To determine the largest valid LA = (s, p, w): s is the segment number. p is the number of the last page. Since page numbers start at 0, p is the number of pages occupied by the segment minus 1. w is the offset on the last page such that pw < segment_size. Since pw = p * page_size + w, p * page_size + w < segment_size, and thus w < segment_size - p * page_size: For segment 1, w < 3839 - 1 * 2048 = 3839 - 2048 = 1791, w = 1790 For segment 3, w < 4377 - 2 * 2048 = 4377 - 4096 = 281, w = 280
If the logical address (3, 5) is mapped to the physical address (4, 5) then _____.
The page table entry at offset 3 is 4
Page replacement.
The page table uses the present bit to keep track of which pages are in physical memory, and the modified bit to keep track of which pages have been modified. As the program executes, some of the memory-resident pages become modified, making the copy on disk obsolete (page k). The modified bit is set to 1. When a page fault decides to replace page k in frame 5 with page r then page k must first be written back to disk before being overwritten by page r. When a page fault decides to replace page 2 with page 0 in frame 2 then page 2 can be overwritten without saving because an exact copy is still on disk.
The FIFO replacement algorithm.
The physical memory consists of 4 frames 0 through 3. Initially, the frames contain the pages 0 through 3, where 0 is the oldest and 3 is the youngest page. Pages referenced at times 1 through 4 are all resident and cause no page faults. Page 0 remains the oldest page in memory. The reference to page 4 at time 5 causes a page fault. Page 4 replaces the oldest page 0 and the pointer is advanced to page 1, which is now the oldest page in memory. The reference at time 6 causes no changes. The just removed page 0 is referenced again at time 7, causing the replacement of the now oldest page 1. Similarly, the next 3 references all cause a page fault because each referenced page has just been removed by the previous page fault.
The optimal replacement algorithm.
The physical memory consists of 4 frames: 0 through 3. Initially, the frames contain the pages 0 through 3. RS is the reference string. Pages 2, 0, 3, and 1 are referenced during the first 4 time steps and are all resident. No page faults occur and the frames remain unchanged. At time 5, a non-resident page 4 is referenced, causing a page fault. Page 4 must replace one of the resident pages. The algorithms searches the RS for the resident page that will be referenced in the most distant future. Pages 1, 0, and 2 are all referenced before 3. Thus page 3 is selected. The identified page 3 is replaced by page 4. The next 4 references to pages 1, 0 and 2 cause no page faults since all three pages are resident. The next page fault occurs at time 10 since page 3 has been overwritten previously. Pages 1, 2, and 4 are not referenced again in the future and thus one is chosen for replacement by page 3.
For each segment, determine: (a) the starting address of PT (b) the address where frame number of page 2 is found
The starting address of a PT is obtained by multiplying the frame number by the page size: For segment 1: 6 * 1024 = 6144 For segment 3: 7 * 1024 = 7168 Each PT contains frame numbers of pages, indexed by the page number p. Thus p is added to the starting address of the PT: For segment 1, the frame number of page 2 is found at address 6144 + 2 = 6146 For segment 3, the frame number of page 2 is found at address 7168 + 2 = 7170
The VM address uses:s1: 3 bits s2: 3 bits p1: 3 bits p2: 3 bits w: 8 bits
The total number of words that make up the VM is 2^20
Requirements for VM implementation. VM cannot be implemented without demand paging. VM cannot be implemented without page replacement. VM cannot be implemented without the modified bit.
True True False
Segmentation vs paging. Segment size is _____. Page size is _____. A segment may be placed into any segment frame. A page may be placed into any page frame. With segmentation, all components of a program reside in a contiguous logical address space. With paging, all components of a program reside in a contiguous logical address space. With segmentation, all components of a program reside in a contiguous area of physical memory. With paging, all components of a program reside in a contiguous area of physical memory. Segmentation leads to external fragmentation. Paging leads to external fragmentation.
Variable Fixed False True False True False False True False
Dynamic relocation using relocation registers.
When a single-module program is loaded into memory, the starting address 500 is loaded into the relocation register RR as the base address for future address calculations. The load instruction ld uses a flag, rr, to indicate that the operand 80 is not an absolute value but a logical address referring to 580. The CPU adds 500 to 80, which results in the physical address 580. When the program is moved to a new area of memory starting at address 100, the code does not change. Only RR is loaded with 100, which guarantees that correct physical addresses are generated at runtime. When a program consists of separate modules, different relocation registers point to the code (CR), the static data (DR), and the dynamic data (FR). Instructions that refer to the code area (Ex: branch) use a flag (cr) to tell the CPU to add the content of CR to the logical address 0. Thus the physical address is 500+0=500 and refers to the start of the code. Instructions that refer to static data (Ex: load) use the flag dr to tell the CPU to add the content of DR to the logical address. Thus the load instruction refers to address 220 within static data. Similarly, instructions that refer to the heap or stack use the flag fr to tell the CPU to add the content of FR to the logical address and thus refer to addresses within dynamic data.
present bit
a binary flag in each page table entry that indicates whether the corresponding page is currently resident in memory. If a page is resident, then the entry points to the frame that holds the page.
referenced bit (r-bit)
a bit associated with a page and is set automatically by the hardware whenever the page is referenced by any instruction.
Load control.
When only a single process is running, CPU utilization is low due to long waits for input/output. With additional processes running concurrently, CPU utilization increases steadily. After CPU utilization reaches the highest point, adding more processes degrades CPU utilization due to competition for memory frames. With even more processes competing for memory, the system begins to thrash. CPU utilization drops close to 0 and no real work is accomplished. CPU utilization is close to the maximum when the mean time between page faults, L, is equal to the time it takes to service each page fault. The OS can use the L = S criterion to adjust the number of processes n. When L < S, the OS cannot keep up with the frequent page faults. The OS must decrease n. When L > S, the time between page faults is high. The OS can increase n to allow more processes run concurrently.
With static linking, a function f is loaded into memory _____.
When the main program is loaded into memory
With dynamic linking, a function f is loaded into memory _____.
When the program calls f for the first time
Behavior of the optimal working set.
With d = 5, the window on the RS includes 5 page references. At time t1, the optimal working set consists of the pages 3 and 4. The resulting working set size is only 2 pages. Between time t1 and t2, only the same pages 3 and 4 appear in the window, and thus the working set size remains 2 pages. At time t2, the process starts transitioning into a new working set that includes different pages. During the transition phase, the set grows to 5 as old pages are evicted and new pages added. Following the transition phase, which has a large working set, the process settles into a new phase at time t3 where the set size fluctuates between 3 and 4. The working set size grows with d but the growth is not linear. When d is small, the size grows rapidly but diminishes with large d. d must be chosen past the steeply rising portion of the curve but increasing d further into the flat portion of the curve has little impact on the size and content of the set. An optimal d is determined experimentally.
Using an aging register.
With d = 50, a 4-bit aging register containing 0100 indicates that the page has not been accessed during the last 50 most recent references but has been accessed at least once during the 50 previous references. A register value 0000 indicates the page has not been accessed during the last 200 references.
Address translation
With paging, a logical address is broken into two components: a page number p and an offset w within the page. Similarly, a physical address is broken into two components: a frame number f and an offset w within the frame. The notations (p, w) and (f, w) denote the concatenation of the two address components. Ex: If p is 4 bits and w is 5 bits, then (2, 6) denotes the 9-bit address 0010 00110, which is the concatenation of the two components, 2 and 6, in binary. The OS must translate logical addresses of the form (p, w) into corresponding physical addresses (f, w):
Principles of segmentation
With paging, all components of a program, including code, static data, the stack, and other data structures, are combined into one contiguous address space divided into fixed-size pages. Since the components are of variable sizes, the boundaries between the logical components do not coincide with page boundaries. The misalignment makes the sharing and the protection of logical components difficult. Segmentation addresses the problem by providing multiple logical address spaces for each process, where each segment can have a different size.
Segment table is analogous to a page table but with two important differences:
With paging, all pages have the same size, 2^k. Since segments have variable sizes, 2^k cannot be the actual segment size but only the maximum possible segment size. To prevent access to locations beyond the segment, the segment size must be kept in the segment table entry and checked during address translation. With paging, the starting address of a frame can be determined from the frame number f, since all frames have a fixed size and thus all start with the address (f, 0). With segmentation, no frames exist and thus a segment table entry must contain the complete starting address of the segment, rather than just the segment number s.
modified-bit (m-bit)
a binary flag in each page table entry that indicates whether the corresponding page has been modified during execution. The modified bit is set to 1 automatically by any instruction that stores data into the page and is used by the operating system to minimize the movement of data to disk.
second-chance page replacement algorithm
a coarse-grain approximation of LRU. The algorithm uses the r-bit to divide all pages into only two categories: recently referenced and not recently referenced. A page is selected from the not-recently referenced category. Similar to FIFO, the algorithm maintains a pointer that cycles through the pages when searching for a page to be replaced. Because of the circular nature, the algorithm is also known as the clock algorithm.
page-fault-frequency replacement algorithm
a direct approach to controlling the page fault rate by adjusting the current resident set based on how frequently consecutive page faults occur. A constant d, determined experimentally, is used to decide if the page fault frequency is too high and thus the resident set should be increased. If the page fault frequency is acceptable then the resident set can be reduced by removing some of the pages not referenced recently.
Source module
a program or a program component written in a symbolic language, like C, or an assembly language, that must be translated by a compiler or assembler into executable machine code.
Load module
a program or combination of programs in a form ready to be loaded into main memory and executed.
First-fit
always starts the search from the beginning of the list and allocates the first hole large enough to accommodate the request.
Logical Address Space
an abstraction of physical memory, consisting of a sequence of imaginary memory locations in a range [0 : m-1], where m is the size of the logical address space.
Page table
an array that keeps track of which pages of a given logical address space reside in which page frames. Each page table entry corresponds to one page and contains the starting address of the frame containing the page.
segment table
an array that keeps track of which segment resides in which area of physical memory. Each entry corresponds to one segment and contains the starting address of the segment.
Thrashing
an execution state during which most of the time is spent on moving pages between the memory and the disk while the CPU is mostly idle and no process is making any real progress. Thrashing occurs when too many processes are sharing memory concurrently and no process has enough pages to operate without frequent page faults.
page fault
an interrupt that occurs when a program attempts to reference a non-resident page. The interrupt triggers the operating system to find the page on disk, copy the page into a frame, and set the present bit to 1.
aging register
associated with a page and is shifted periodically to the right by 1 bit. Unless the most significant bit is set to 1, the page is aging in the sense that the associated register value is steadily decreasing.
Static relocation
binds all logical addresses to physical addresses prior to execution.
A process executes the code br m ... m: ld R,x where the branch instruction is on a resident page and the instruction "ld" loads the content of the variable x into a register R.
can trigger 0, 1, or 2 page faults. If both the ld instruction and x are on the same page as br then no page fault is triggered. If ld or x is on a different page then 1 page fault is triggered. If ld and x are both on different pages from br then 2 page faults are triggered.
Virtual memory (VM)
collection of one or more logical address spaces, each of which may exceed the size of physical memory. A logical address is then referred to as a virtual address. A paged VM creates a single large contiguous address space per process. A paged VM with segmentation creates multiple large address spaces per process, each of which is paged.
A source module is the input to the _____.
compiler/assembler
Relocation register
contains the physical starting address of a program or program component in memory.
translation lookaside buffer (TLB)
fast associative memory buffer that maintains recent translations of logical addresses to frames in physical memory for faster retrieval.
Page
fixed-size contiguous block of a logical address space identified by a single number, the page number.
Page frame
fixed-size contiguous block of physical memory identified by a single number, the page frame number. A page frame is the smallest unit of data for memory management and may contain a copy of any page.
Word
fixed-size unit of data. Typically 4 bytes but can also be a single byte.
third-chance page replacement algorithm, also known as the not-recently-used page replacement algorithm
is a coarse-grain approximation of LRU, which divides pages into 4 categories based on the 4 possible combination of the r- bit and the m-bit. The third-chance algorithm is a refinement of the second-chance algorithm. The algorithm takes advantage of both the r-bit and m-bit associated with every page. Since replacing a modified page is more costly than replacing an unmodified page, the algorithm gives modified pages an additional chance to remain resident.
Logical Address
is an integer in the range [0 : m-1] that identifies a word in a logical address space. Prior to execution, a logical address space is mapped to a portion of physical memory and the program is copied into the corresponding locations.
Physical Address
is an integer in the range [0 : n-1] that identifies a word in a physical memory of size n. The address comprises a fixed number of bits. A memory of size n requires an address size of k bits, where n = 2^k
System libraries may be added to a _____.
load module
A load module is the input to the _____.
loader
p = 0 means the page is currently not resident in memory.p = 1 means the page is currently resident in memory.m = 0 means the page has not been modified.m = 1 means the page has been modified. A page must be written back to disk when _____. Immediately after a page replacement, the bits in the page table are _____. A page fault is triggered when _____.
p = 1 and m = 1 p = 1 and m = 0 p = 0 and m = 0
A page with the r/m-bits set to 01 has been _____. When a page with the bits 00 is modified, the bits are set to _____. With 3 frames, RS = {0 1 2 1 3} where the first reference modifies the page 0, and the pointer at page 0, the first page fault will replace page _____.
referenced and modified 11 1
Best-fit
searches the entire list and chooses the smallest hole large enough to accommodate the request.
FIFO page replacement algorithm
selects the page that has been resident in memory for the longest time. The algorithm is easy to implement, requiring only a single pointer to designate the oldest page in memory. When the page is replaced, the pointer is advanced to the next frame modulo n. The FIFO algorithm takes advantage of the principle of locality. Except for branch instructions, which constitute only a small percentage of all instructions, execution is sequential. As execution advances sequentially through the code, the likelihood of referencing a page used in the distant past diminishes with time. Similarly, many large data structures are processed in sequential order.
least-recently-used page replacement algorithm (LRU)
selects the page that has not been referenced for the longest time. The implementation requires a queue of length n, where n is the number of memory frames. The queue contains the numbers of all resident pages.
optimal page replacement algorithm
selects the page that will not be referenced for the longest time in the future. The algorithm is guaranteed to generate the smallest number of page faults for any reference string. However, the algorithm is unrealizable because the replacement decisions depend on future references, which are unknown at runtime. But the algorithm provides a useful lower bound on the number of page faults for comparison with other algorithms.
Next-fit
starts each search at the point of the last allocation.
The 50% rule
states that, if the probability of finding an exact match for a request approaches 0, one third of all memory partitions are holes and two thirds are occupied blocks. Formally, n = 0.5 m, where n is the number of holes and m is the number of occupied blocks.
Sharing
the act of linking the same copy of a module to multiple other modules. Sharing improves memory utilization by allowing multiple processes to share common routines or services (Ex: compilers, editors, word processors), or common data (Ex: dictionaries). Sharing is possible under both static and dynamic linking.
Program relocation
the act of moving a program component from one address space to another. The relocation may be between two logical address spaces or from a logical address space to a physical address space.
Page replacement
the act of overwriting a page in memory with a different page loaded from the disk when needed.
Linking
the act of resolving external references among object modules and can be done statically, before loading, or dynamically, while the program is already executing.
Load control
the activity of determining how many processes should be running concurrently at any given time to maximize overall system performance.
Effective access time
the average time to access memory in the presence of page faults. The effective access time, E, depends on the frequency of page faults:E=(1−P)∗m+P∗S where m is the time to access physical memory and S is the time to process a page fault.
hit ratio
the fraction of memory accesses that find a match in the TLB. The higher the TLB hit ratio, the lower the overhead of address translation.
External memory fragmentation
the loss of usable memory space due to holes between allocated blocks of variable sizes.
Internal Fragmentation
the loss of usable memory space due to the mismatch between the page size and the size of a program, which creates a hole at the end of the program's last page.
Object module
the machine-language output of a compiler or assembler generated from a source module. An object module may be self-contained and executable or multiple object modules may be linked together into a load module by a linker or linkage editor.
Page fault rate
the number of page faults, f, occurring during a number of memory references, t. The page fault rate can be expressed as P = f/t, where 0 ≤ P ≤ 1.P = 1 means that every memory reference results in a page fault, and P = 0 means that no page faults occur.
Demand paging
the principle of loading a page into memory only when the page is needed, rather than at the start of the execution.
reference string
the sequence of page numbers referenced by an executing program during a given time interval. Reference strings are used to compare different page replacement algorithms by counting the number of page faults generated.
working set (WS)
the set of pages referenced during the past d memory operations preceding t.
optimal working set
the set of pages that will be needed in the immediate future and thus should be resident. The size of the working set varies with the program's behavior. When execution is highly localized in long tight loops and static data structures, the set contains a small number of repeated page numbers. When execution involves many branches or highly dynamic data structures, the set contains many different page numbers. To determine the optimal working set at time t, a window of size d is superimposed on the reference string. Pages visible in the window belong to the set. The size and composition of the set change automatically as the window slides forward with each memory reference. The window size is determined by the typical behavior of a newly started program. During the first few memory operations, the number of pages referenced increases rapidly but the rate of increase diminishes with time. Thus d must be chosen to cover the period of rapid growth but not past the point where adding more pages is of only marginal benefit.
Memory compaction
the systematic shifting of modules in memory, generally in one direction, to consolidate multiple disjoint holes into one larger hole.
Swapping
the temporary removal of a module from memory. The module is saved on a disk and later moved back to memory. Dynamic relocation is necessary so that the module can be placed into a different location without modification.
working set page replacement algorithm
uses a trailing window of size d superimposed on the RS to determine the size and composition of the working set at time t. Analogous to the forward-looking window of the optimal working set, pages visible in the trailing window belong to the working set.
Segment
variable-size block of a logical address space identified by a single number, the segment number. With pure segmentation (no paging), a segment occupies a contiguous area of physical memory and is the smallest unit of data for memory management.