CS281 Final
Use the register and memory values in the table below, assume a 32 Bit MIPS machine. Register Value $1 12 $2 16 $3 20 $4 24 Mem Adr Value 12 16 16 20 20 24 24 28 Find the values of registers $1, $2, $3 after these instructions are executed. sub $3, $4, $1 lw $2, 4($3) addi $2, $3, 16
$1 = 12 $2 = 28 $3 = 12
What is the value of $8 and $9 at the end of this program? main: add $8, $0, $0 addi $9, $0, 5 loop: add $8, $8, $9 addi $9, $9, -1 bne $9, $0, loop End:
$8 = 15 $9 = 0
Which is equivalent to A OR B?
(NOT A) NAND (NOT B)
Which equation is NOT in sum-of-product form?
(a + b) (b` + c)
Consider a direct mapped cache containing 4K bytes of data storage grouped into 32 byte blocks, What tag would be associated with an access to memory location 220?
0
The next value for an SR-Latch when s = 0, r = 1 is ?
0
Which of the following machine instructions performs an addi operation? lw $t0, 0($t1): 100011 01001 01000 0000000000000000 $zero: 00000 sw $t0, 0($t1): 101011 01001 01000 0000000000000000 $t0: 01000 addi $t0, $t1, 15: 001000 01001 01000 0000000000001111 $t1: 01001 add $t0, $t1, $t2: 000000 01001 01010 01000 00000 10000000 $t2: 01010 sub $t0, $t1, $t2: 0000000 01001 01010 01000 00000 100010 $t3: 01011 mult $t1, $t2: 000100 01001 01010 00000 00000 011000 $t4: 01100 mflo $t0: 000000 00000 00000 01000 00000 010010 $t5: 01101 j JLabel: 000010 0000000000000000000000000101 $t6: 01110
0010000 01011 01100 0000000000001000
Instruction j Label Is at address 001110..0100. Given an immediate field of 0..1010 (26 bits), what address will the CPU construct?
001100..101000
A mux with 3-select lines has how many outputs?
1
Given a 3x8 decoder, how many outputs can be set at any given time?
1
For the instruction: beq $t0, $t1, Label The beq instruction's address is 20 and Label's address is 16. What is the machine instruction's 16-bit immediate field?
1..1110
A boolean expression is in the form of a minimized sum of products: F(A,B,C,D) = A`C` + A`B + AB, How many minterms did the original Boolean expression have?
10
Given the following data memory (DM) contents and assuming $t1 holds 416, what is the value of $t0 after executing the instruction sequence? lw $t0, -4($t1) xxx Data Memory(DM) 400 25 404 20 408 15 412 10 416 5
10
What comes after the binary number 0111?
1000
Which addition results in an overflow?
1010 + 1001
Which addition will result in an overflow?
1111+0111
Consider a direct mapped cache containing 4K bytes of data storage grouped into 32 byte blocks, How many Blocks(rows) would be in this cache?
128
Identify the base of hexadecimal.
16
Consider a direct mapped cache containing 4K bytes of data storage grouped into 32 byte blocks, Assume it takes 1 cycle to access the cache, and 300 cycles to access main memory. Also assume the cache starts out empty. How many cycles would it take to access memory sequentially one byte at a time from address 0 to 1599?
16600
Consider a direct mapped cache containing 4K bytes of data storage grouped into 32 byte blocks, Consider the following sequence of memory accesses: 120, 80, 20, 130, 50, 120, and 30. How many cache hits would there be?
2
Given the following register file contents, what will be the value of $t3 after executing the instruction sequence? slt $t2, $t3, $t1 addi $t3, $t2, 2 xxx Register File $t1 2 $t2 4 $t3 6
2
Given the following register file contents, what is the value of $t3 after execution the instruction sequence? bne $t1, $t2, L1 addi $t3, $t3, 5 L1: addi $t3, $t3, 5 xxx Register File $t1 5 $t2 5 $t3 10
20
A boolean expression is in the form of a minimized sum of products: F(A,B,C,D) = A`C` + A`B + AB, How many essential prime implicants can you find in the K-Map?
3
Consider a direct mapped cache containing 4K bytes of data storage grouped into 32 byte blocks, If memory addresses were 16 bits, how many bits would be in the tag for each data block?
4
Given the following data memory (DM) contents and assuming $t0 holds 7004, what is the offset value of the lw instruction if the content at address 7008 is being accessed? lw $t1, x($t0) xxxx Data Memory(DM) 7000 25 7004 20 7008 15
4
How many select lines does a 16x1 mux require?
4
Your computer memory is 1024 X 32. What is it's total size?
4KB
Given a system with memory alignment, which value of $t5 results in successful execution of the instruction, sw $t0, 0($t5)?
5224
Consider a direct mapped cache containing 4K bytes of data storage grouped into 32 byte blocks, What row(block) would be associated with an access to memory location 220?
6
Given stack: 7, 5, 3, 1 (top is 7). What is $t0 after the following push and pop operations? Push 9 to stack Pop stack to $t0 Pop stack to $t0 Push 11 to stack
7
In a 64KB four-way set-associative cache with 128 Byte blocks, how large (in bits) is the index field used to address the cache array?
7
What is X(base number) for 123 if (123)x = (01000010)_2?
7
What is a miss caused during the program initialization phase called?
A compulsory miss
A boolean expression is in the form of a minimized sum of products: F(A,B,C,D) = A`C` + A`B + AB, Which ones are the essential prime implicants?
A`C`, A`B, AB`
Given $t1 = 8, $t2 = 5, $t3 = 7, and $t4 = 3, what instruction sequence that stores the values of 3 + 7 in both register $t5 and the memory location DM[1005]?
Add $t5 = $t4 + $t3 Store $t5 to DM[1005]
Consider building a 1G x 64 RAM. How many address lines are needed? How many data input lines are needed?
Address Lines: 30 (1G = 2^30) Data Input Lines: 64 (1 Data Line per bit)
What are the sources of cache misses?
Compulsory Conflict Capacity
Compared to a 16K direct-mapped cache, what type of misses will a 16K fully associative cache have fewer of?
Conflict
A decoder?
Converts N inputs to a 1 on one of 2^N outputs.
The instruction. Load $t5 with DM[5150], falls into which instruction category?
Data transfer
Which of the following may lead to a reduction in cache capacity misses (cache miss due to cache capacity)?
Decreasing block size Increasing cache size
Which of the following statements about k-maps is INCORRECT?
Each cell in a K-map corresponds to a literal.
Simplify F = XYZ + XYZ` + X`Z
F = XY + X`Y
Which is NOT a reason for using a set-associative cache, as compared to a direct mapped cache?
Faster hit detection
When an instruction is read from the memory, it is called?
Fetch cycle
Which of the following statements about a flip-flop is NOT true?
Flip-flops are level-sensitive.
A group of bits that tell the computer to perform a specific operation is know as?
Instruction code
A sequential circuit's output?
Is dependent on the present and the past sequence of input values.
A boolean equation is converted to a circuit in what order?
Items within parentheses, then NOT, then AND, then OR
Which of the following is not a characteristic of the RISC architecture?
Large instruction set
What is the principal advantage of a write-through cache compared to a write-back cache?
Lower average miss penalty
Which of these statements about Mealy actions is incorrect?
Mealy action's change immediately in response to input value changes, and guarantee that an output value will last a least one clock cycle.
Consider M[R1] <- R2, Identify the operation.
Memory Write
Caches work by doing what?
Moving the current data into faster memories
Boolean operators are evaluated in which order?
NOT is evaluated first, then AND, and then OR.
Does (A + B)C = A + (BC)?
No
Which of the following statements is true of octal representation?
Octal means a base 8 number
A multiplexer is a combinational circuit that passes?
One of multiple data inputs to a single data output.
Which of the following statements about SR Latches?
Oscillate means to change from 0 to 1 to 0 to 1 repeatedly.
How do we improve the performance of a cache system?
Reduce the miss rate Speed up the time taken to get data in case of a miss Reduce the time taken to get data from the cache(reduce hit time)
Content of the program counter is added to the address part of the instruction in order to obtain the effective address is called?
Relative address mode
Consider the following code: for(i=0; i <100000; i++) Data[i]++; What kind of locality is exhibited by access to "Data"?
Spatial
Which of the following terms describe that the information which will be used in near future is likely to be in use already?
Temporal Locality
The difference between a D latch and a D flip-flop is?
The D latch is level-sensitive, while the D flip-flop is edge-triggered.
Which of the following are the disadvantages of a fully-associated cache?
The cost to build the hardware is too high Hard to implement a good replacement policy
A two-input XOR gate outputs 1 if
The input values differ
If e = 0 for a D latch, what is the value of the output q?
The previously stored bit
How many total bits can a 1G x 64 RAM hold? How many megabytes does this represent?
Total Bits: 2^36 (# of Address Lines * # of bits per line: 2^30 + 2^6) Megabytes: 2^13 ($ of bits / 2^23)
A + (BC) = (A + B)(A + C)
True
A JK flip-flop is presently in the RESET state and must go to the SET state on the next clock pulse. J must be 1 and K must be X(Don't Care)
True
Are these two functions the same? y = ab + bc + ac y = ab + a`bc + ac
True
a + b = a(b + b`) + b(a + a`)
True
Identify a true statement about two's complement representation.
Two's complement representation inverts every bit of a binary number and adds 1 to the number
Which equation best captures the following logic: A baseball team wins a game if it plays all nine innings and scores the most runs, or if the opponent forfeits. Inputs: N = 1 indicates all nine innings were played, R = 1 indicates most runs, O = 1 indicates an opponent forfeits Outputs: W = 1 indicates a baseball team wins a game
W = (N AND R) OR O
Which of the following statements about equivalent states is incorrect?
When removing an equivalent state, the incoming and outgoing transitions can be removed.
The method to update the memory as soon as a word is removed from the cache is called?
Write-back
Which of the following is NOT a valid Boolean algebra property?
a + a = 0
A function is
a relation of input values to an output values
Convert y = (a` + c)(a + b) into Sum of Products.
a`b + ca + cb
Given a function of a,b, and c, which equation is in sum-of-minterms form?
ab + bc
Which of the following is a sum-of-minterm representation of a(c + bc`)?
ab`c + abc + abc`
Given the instruction sequence below, which instruction executes after the jal instruction? 20 sw $t0, 0($t2) 24 addi $t0, $t0, 5 28 jal CalcEq 32 sw $t0, 0($t2) ... CalcEq: 80 add $t1, $t0, $t0 84 addi $t1, $t1, 5 88 jr $ra
add $t1, $t0, $t0
Which of the instruction sequences is equivalent to the following expression?? if ($t1 != $t2) $t3 = $t3 -1
beq $t1, $t2, L1 sub $t3, $t3, 1 L1:
Boolean Algebraic properties
can lead to a simpler expression and thus a simpler circuit.
sum-of-minterms form is a
canonical form of a Boolean equation where the right-side expression is a sum-of-products
Which of the following is a compact notation for f(a,b,c) = a`b`c + ab`c?
f(a,b,c) = ∑m(1, 4, 5)
Given a memory location stored in $t2, which of the following instructions loads the content of the memory to register $t0?
lw $t0, 0($t2)
Given the following data memory (DM) and register file contents, which instruction performs the operation DM[5308] = DM[5300] + DM[5304]? xxxx DM 5300 10 5304 20 5308 30 xxx Register File $t3 5300 $t4 5304 $t5 5308
lw $t0, 0($t3) lw $t1, 0($t4) add $t2, $t0, $t1 sw $t2, 0($t5)
Given the following data memory (DM) and register file contents, which instruction performs the operation DM[5308] = DM[5300]? xxxx DM 5300 5308 5304 5304 5308 5300 xxx Register File $t3 5300 $t4 5304 $t5 5308
lw $t0, 0($t3) sw $t0, 0($t5)
Given the following data memory (DM) asnd assuming $t0 holds 5304, $t1 holds 5308, which instruction sequence perfforms the operation DM[5308] = DM[5300]? xxxx Data Memory(DM) 5300 10 5304 20 5308 30
lw $t1, -4($t0) sw $t1, 4($t0)
For a subroutine with 2 arguments and no return value, which instruction loads the second argument to $t5?
lw $t5 0($sp)
A timing diagram
show's a circuit's output values for given input values that change over time
An expression in sum-of-products form consists
solely of an ORing of product terms
Which of the following machine instructions performs? 000000 01011 01110 01001 00000 100010 lw $t0, 0($t1): 100011 01001 01000 0000000000000000 $zero: 00000 sw $t0, 0($t1): 101011 01001 01000 0000000000000000 $t0: 01000 addi $t0, $t1, 15: 001000 01001 01000 0000000000001111 $t1: 01001 add $t0, $t1, $t2: 000000 01001 01010 01000 00000 10000000 $t2: 01010 sub $t0, $t1, $t2: 0000000 01001 01010 01000 00000 100010 $t3: 01011 mult $t1, $t2: 000100 01001 01010 00000 00000 011000 $t4: 01100 mflo $t0: 000000 00000 00000 01000 00000 010010 $t5: 01101 j JLabel: 000010 0000000000000000000000000101 $t6: 01110
sub
Given the following data memory (DM) and register file contents, which instruction performs the operation DM[5300] = 5304? xxxx DM 5300 30 5304 40 5308 50 xxx Register File $t3 5300 $t4 5304 $t5 5308
sw $t4, 0($t3)
Simplify f(x,y,z) = xyz`(x + y) + z`(x + y`)` + x(x` + yz)` + 1(z + xy`) + x`` + z`
x + y + z
Which of these are in Sum of Product form?
y = a + b y = ab + b`c
A two-input XNOR gate is equivalent to which equation?
y = a`b` + ab
Convert y = a`b + bc to Sum of Minterms
y = a`bc + a`bc` + abc
Which is y = ab + a` in sum-of-minterms form?
y = ab + a`b + a`b`
