Digital Electronics Chapter 9

SET

1. The stored HIGH state of a latch circuit. 2. A latch input that makes the latch store a logic 1

Edge detector

A circuit in an edge-triggered flip-flop that converts the active edge of a CLOCK input to an active-level pulse at the internal latch's SET and RESET inputs.

Edge-sensitive

Edge-triggered.

Rise time (tr)

Elapsed time from the 10% point to the 90% point of the rising edge of a signal.

Level-sensitive

Enabled by a logic HIGH or LOW level.

Edge-triggered

Enabled by the positive or negative edge of a digital waveform.

Asynchronous

Not synchronized to the system clock.

Synchronous

Synchronized to the system clock.

Leading edge

The edge of a pulse that occurs earliest in time.

Trailing edge

The edge of a pulse that occurs latest in time.

Asynchronous inputs

The inputs of a flip-flop that change the flip-flop's Q outputs immediately, without waiting for a pulse at the CLK input. Examples include preset and clear inputs.

Synchronous inputs

The inputs of a flip-flop that do not affect the flip-flop's Q outputs unless a clock pulse is applied. Examples include D,J, and K inputs.

Falling edge

The part of a signal where the logic level is in transition from a HIGH to a LOW.

Rising edge

The part of a signal where the logic level is in transition from a LOW to a HIGH.

RESET

1. The stored LOW state of a latch circuit. 2. A latch input that makes the latch store a logic 0

Sequential circuit

A digital circuit whose output depends not only on the present combination of inputs but also on the history of the circuit

Transparent latch (gated D latch)

A latch whose output follows its data input when its ENABLE input is active

Pulse

A momentary variation of voltage from one logic level to the opposite level and back again.

Flip-flop

A sequential circuit based on a latch whose output changes when its CLOCK input receives an edge.

Latch

A sequential circuit with two inputs called SET and RESET, which make the latch store a logic 0 (reset) or 1 (set) until actively changed

Toggle

Alternate between opposite binary states with each applied clock pulse.

Gated SR Latch

An SR latch whose ability to change states is controlled by an extra input called the ENABLE input

Clear

An asynchronous reset function.

Master reset

An asynchronous reset input used to set a sequential circuit to a known initial state.

Preset

An asynchronous set function.

CLOCK

An enabling input to a sequential circuit that is sensitive to the positive- or negative-going edge of a waveform.

Pulse width (tw)

Elapsed time from the 50% point of the leading edge of a pulse to the 50% point of the trailing edge.

Fall time (tf)

Elapsed time from the 90% point to the 10% point of the falling edge of a signal.

Steering gates

Logic gates, controlled by the ENABLE input of a gated latch, that steer a SET or RESET pulse to the correct input of an ST latch circuit.

Edge

The HIGH-to-LOW (negative edge) or LOW-to-HIGH (positive edge) transition of a pulse waveform.

Amplitude

The instantaneous voltage of a waveform. Often used to mean maximum amplitude, or peak voltage, of a pulse.