EEL 4740 Final Exam Practice
Using the revenue model presented in module 1, what is the percentage revenue loss if D=2 and w=10?
(D (3W-D)/2w^2) * 100%
According to Moore's law, IC transistor capacity doubles every __________ 18 months 4 years 8 years 3 years
18 months
What is the size register for a FSM state with 5 states? 3 bit 5 bit 4 bit 2 bit
3 bit
In the following entity, what is the size of lights_in vector? port ( lights_in: in std_logic_vector (0 to 3); lights_out: out std_logic_vector); 2 bit not enough info 4 bit 3 bit
4 bit
A single purpose processor design can be optimized, by optimizing: FSM Datapath All of the above FSMD Original Program
All of the above
Look up Table (LUT) is part of _______ Fuses Interconnections CLB (I/O blocks)
CLB
______ stores and manipulates system's data. register datapath controller ram
Datapath
In the following VHDL statement "after" clause is used to indicate a ____________ i.e y <= not a after 1 ns; sequence time period delay state
Delay
When modeling FSM in VHDL, a(n) _________________ type can be used for the states class new signal enumeration
Enumeration
To implement the same functionality which IC technology will have the largest size? FPGA VLSI ASIC
FPGA
A given ASIC design can be used for any embedded applications. true false
False
Generally an embedded metric can be improved without affecting others true false
False
In a VHDL process statement for a flip-flop, a synchronous "reset" must be included in the sensitivity list. True False
False
Which of the following is not a basic element of FPGA? Interconnections CLB (I/O) Blocks Fuses
Fuses
Which processor has low NRE cost, short time-to-market, and high flexibility? ASIC custom single purpose single purpose general purpose
General purpose processor
The complex state diagram called FSMD is used for the design of custom single purpose processors. FSMD can also be referred to as ______ MLS FSM HLSM LSM
HLSM
Which of the following is NOT an FPGA application? ASIC emulation and verification IPAD CPU CPU accelerators image processing and enhancements
IPAD CPU
For _______ FSM output depends on both current state and inputs mealy moore sequential controller
Mealy
For ______ FSM output depends only on current state sequential moore mealy controller
Moore
Which of the following VHDL statements must be used to turn on an active low output? output <= '0'; output <= '1';
Output <= '0';
In VHDL a ______ statement process statement with a sensitivity list is used for sequential logic. process structural statetype behavioral
Process
What is the most important feature of a processor to control a pacemaker that must be implanted in the patient's body? safety power consumption size cost
Safety
A _______ is a digital circuit whose outputs are a function of the present as well the previous input values. digital analog combinational sequential
Sequential
___________ is an integrated circuit that integrates all components of an embedded into a single chip. FPGA PLD General purpose processor SoC
SoC
VHDL code has three parts. Which of the following is not part of the VHDL code? Entity Test Bench Library Architecture
Test Bench
In FSMD, states and arcs may include arithmetic expressions true false
True
Which IC technology has the highest NRE? ASIC FPGA VLSI
VLSI
Which IC technology offers the best size, power, and performance? VLSI FPGA ASIC PLD
VLSI
Each product has a "market window." If the product is released on the market late in the window; there will be _________ in revenues a gain an increase a loss a conflict
a loss
In Moore FSM all of the above desired output values are listed next to each state input conditions that cause a transition from one state to the another are shown next to each arc each arc condition is ANDed with rising ( or falling) clock edge , all inputs are synchronous
all of the above
A controller consist of a state register and a ______ logic block combinational sequential control programmable
combinational
SRAM based FPGAs with on board are not reprogrammable. True False
false
Which library must be used for integer arithmetic operations? ieee.std_logic_1164.all; ieee.numeric_std.all;
ieee.numeric_std.all;
Which VHDL library package is specifically used for unsigned numbers and operations? ieee.std_logic_unsigned.all; ieee.numeric_std.all; ieee.std_signed.all;
ieee.std_logic_unsigned.all;
Which of the following is not an embedded system? digital camera digital television anti lock brakes system in a car laptop
laptop
Which of the following is NOT a common characteristic of embedded systems? single functioned no cost limit real time power
no cost limit
In VHDL, signals are used to represent internal variables that are not on the module input or output. i.e. signal p,d : std_logic; true false
true
_________ cost is the monetary cost of manufacturing each copy of the system? total nre unit product
unit
