Hard Memory Questions
The virtual memory (space) of a process P contains 10 pages. The system, using Demand Paging, allocates ten frames to Process P. We assume that Process P does not waste memory. Process P generated 1000 page memory references. What is the page fault rate? (Answer 1.0 if it cannot be determined with the information provided)
0.01
Consider a CPU with a 20 bit address bus and a 8192 byte page size. This system supports virtual memory. Use the page table below to answer these questions. Each entry of table contains an hexadecimal value (starts with "0x"). Make sure to answer ALL these questions with adding the prefix "0x" and omit leading zeros if any. Top entry in the page table is for Page 0. The objective is to translate the logical address LA =0x1423. Each entry of the page table has this format: 1 bit 5 bits Validity bit Frame Number The page offset is _____ . The page number is _____ . The frame # is _____ . If the page is in the physical space, then the physical address is ______ . If the page is not in the physical space, answer "0xFFFF" (without quotes).
0x1423 0x0 0xA 0x15423
Fill in multiple blanks. Consider a CPU with a 20 bit address bus and a 8192 byte page size. This system supports virtual memory. Use the page table below to answer these questions. Each entry of table contains an hexadecimal value (starts with "0x"). Make sure to answer ALL these questions with adding the prefix "0x" and omit leading zeros if any. Top entry in the page table is for Page 0. The objective is to translate the logical address LA =0x3534. Each entry of the page table has this format: 1 bit 5 bits Validity bit Frame Number The page offset is ______ . The page number is ______ . The frame # is ______ . If the page is in the physical space, then the physical address is ______ . If the page is not in the physical space, answer "0xFFFF" (without quotes). 0x2A 0x33 0x3D 0x02 0x35 0x2A 0x3B 0x25
0x1534 0x1 0x13 0x27534
Fill in multiple blanks. Consider a CPU with a 20 bit address bus and a 8192 byte page size. This system supports virtual memory. Use the page table below to answer these questions. Each entry of table contains an hexadecimal value (starts with "0x"). Make sure to answer ALL these questions with adding the prefix "0x" and omit leading zeros if any. Top entry in the page table is for Page 0. The objective is to translate the logical address LA =0x56A5. Each entry of the page table has this format: 1 bit 5 bits Validity bit Frame Number The page offset is ______ . The page number is ______ . The frame # is ______ . If the page is in the physical space, then the physical address is ______ . If the page is not in the physical space, answer "0xFFFF" (without quotes). 0x2A 0x33 0x3D 0x02 0x35 0x2A 0x3B 0x25
0x16A5 0x2 0x1D 0x3B6A5
Consider a CPU with a 20 bit address bus and a 8192 byte page size. This system supports virtual memory. Use the page table below to answer these questions. Each entry of table contains an hexadecimal value (starts with "0x"). Make sure to answer ALL these questions with adding the prefix "0x" and omit leading zeros if any. Top entry in the page table is for Page 0. The objective is to translate the logical address LA =0x77B6. Each entry of the page table has this format: 1 bit 5 bits Validity bit Frame Number The page offset is _____. The page number is _____. The frame # is ______. If the page is in the physical space, then the physical address is ______. If the page is not in the physical space, answer "0xFFFF" (without quotes).
0x17B6 0x3 0x2 0xFFFF
Consider a CPU with a 20 bit address bus and a 8192 byte page size. This system supports virtual memory. Use the page table below to answer these questions. Each entry of table contains an hexadecimal value (starts with "0x"). Make sure to answer ALL these questions with adding the prefix "0x" and omit leading zeros if any. Top entry in the page table is for Page 0. The objective is to translate the logical address LA =0x98C7. Each entry of the page table has this format: 1 bit 5 bits Validity bit Frame Number The page offset is ____. The page number is ____. The frame # is _____. If the page is in the physical space, then the physical address is ____. If the page is not in the physical space, answer "0xFFFF" (without quotes).
0x18C7 0x4 0x15 0xFFFF
Fill in multiple blanks. Consider a CPU with a 20 bit address bus and a 8192 byte page size. This system supports virtual memory. Use the page table below to answer these questions. Each entry of table contains an hexadecimal value (starts with "0x"). Make sure to answer ALL these questions with adding the prefix "0x" and omit leading zeros if any. Top entry in the page table is for Page 0. The objective is to translate the logical address LA =0xB9D8. Each entry of the page table has this format: 1 bit 5 bits Validity bit Frame Number The page offset is _____. The page number is _____. The frame # is ______. If the page is in the physical space, then the physical address is ______. If the page is not in the physical space, answer "0xFFFF" (without quotes).
0x19D8 0x5 0xA 0x159D8
Consider a CPU with a 20 bit address bus and a 8192 byte page size. This system supports virtual memory. Use the page table below to answer these questions. Each entry of table contains an hexadecimal value (starts with "0x"). Make sure to answer ALL these questions with adding the prefix "0x" and omit leading zeros if any. Top entry in the page table is for Page 0. The objective is to translate the logical address LA =0xDAE9. Each entry of the page table has this format: 1 bit 5 bits Validity bit Frame Number The page offset is _____ . The page number is _____ . The frame # is _____ . If the page is in the physical space, then the physical address is _____ . If the page is not in the physical space, answer "0xFFFF" (without quotes).
0x1AE9 0x6 0x1B 0xFFFF
Consider a CPU with a 20 bit address bus and a 8192 byte page size. This system supports virtual memory. Use the page table below to answer these questions. Each entry of table contains an hexadecimal value (starts with "0x"). Make sure to answer ALL these questions with adding the prefix "0x" and omit leading zeros if any. Top entry in the page table is for Page 0. The objective is to translate the logical address LA =0xEBFA. Each entry of the page table has this format: 1 bit 5 bits Validity bit Frame Number The page offset is _____ . The page number is _____ . The frame # is ______ . If the page is in the physical space, then the physical address is ______ . If the page is not in the physical space, answer "0xFFFF" (without quotes).
0xBFA 0x7 0x5 0xFFFF
The virtual memory (space) of a process P contains 10 pages. The system, using Demand Paging, allocates five frames to Process P. We assume that Process P does not waste memory. Process P generated 1000 page memory references. What is the page fault rate? (Answer 1.0 if it cannot be determined with the information provided)
1
The objective is to rank these "implementations" of Least Recently Used (LRU) for page replacement (Demand Paging). The implementation that exactly (or most closely) implements LRU will get Rank 1. Implementations similarly close to LRU will get the same number. Select "victim" based on "Time-of-use" filed in page table Use a stack of referenced pages' numbers Second-chance algorithm Clock algorithm Second-chance algorithm with two reference bits.
1 1 3 3 2
Assuming that demand paging is using static equal allocation to processes. Fill in the allocation for each process assuming that there are 4 processes in the system and 4096 frames available. P1 P2 P3 P4 Virtual Size 1024 2048 1024 4096 Allocated Physical Space
1024 1024 1024 1024
The total number of available frames in the physical space is 128. The virtual space of a process P is 256 pages large. Process P will get _____ frames allocated at most.
128
Answer this question using the Second-chance page replacement algorithm. Seven pages are stored in a circular buffer as shown below: Page # 5 16 1 7 2 6 3 Reference bit 1 0 1 1 1 1 1 The algorithm is currently pointing to Page 2 as the next victim and scanning to the right. The page selected for replacement is Page . Fill in the reference bit for each page after the algorithm selected the "victim". Page # 5 16 1 7 2 6 3 Reference bit
16 0 0 1 1 0 0 0
Suppose that the effective access time in microseconds for a Demand Paging system is: Effective Access Time = 0.100 + 25,000 p where p is the page fault rate. The page fault rate p should be _____ 10-6 at most such that the effective access time is less than 0.150 microseconds.
2
The total number of available frames in the physical space is 128. The virtual space of a process P is 64 pages large. The CPU on the system has instructions that can have up to two memory operands. To executed correctly, Process P should get _____ frames allocated at least.
3
The objective is to rank page replacement policies from the easiest to the hardest to implement. 1 is the easiest Optimal Least Recently Used First in First Out Last In First Out
4 3 2 1
The virtual memory (space) of a process P contains five pages. The system, using Demand Paging, allocates five frames to Process P. We assume that Process P does not waste memory. When Process P executes, it will experience at least ________ page faults. 5 3 None of these answers 6 4
5
The virtual memory (space) of a process P contains five pages. The system, using Demand Paging, allocates four frames to Process P. We assume that Process P does not waste memory. When Process P executes, it will experience at least ________ page faults. 5 6 3 None of these answers 4
5
Assuming that demand paging is using static proportional allocation to processes. Fill in the allocation for each process assuming that there are 4 processes in the system and 4096 frames available. P1 P2 P3 P4 Virtual Size 1024 2048 1024 4096 Allocated Physical Space
512 1024 512 2048
The total number of available frames in the physical space is 128. The virtual space of a process P is 64 pages large. Process P will get _____ frames allocated at most.
64
Check all that apply about demand paging. The virtual memory of a process P consists of n pages. Process P is assigned m frames such that m = n. We assume that Process P does not waste memory. Process P will trigger at least m page faults Process P will trigger at most m page faults Process P will trigger at most n page faults Process P will trigger at least n page faults
All of the above
Trashing is occurring when __________________. CPU utilization decreases as the degree of multiprogramming increases. CPU utilization decreases as the degree of multiprogramming decreases. CPU utilization increases as the degree of multiprogramming increases. CPU utilization plateaus as the degree of multiprogramming increases. None of these answers
CPU utilization decreases as the degree of multiprogramming increases.
Check all page replacement policies that may suffer from the Belady's anomaly. Least Recently Used First-In First-Out stack algorithm(s) Optimal Last-In First-Out
Last-In First-Out First-In First-Out
A demand paging system assigns one frame to each process. If there is high temporal locality, this policy will always outperform every other page replacement algorithm. First-In First-Out second-chance algorithm Least Recently Used (LRU) None of these answers Last-In First-Out
None of these answers
Check all that is happening during trashing. Page faults are very frequents The OS is using CPU more for swap-in ans swap-out than for productive work by processes. Files are deleted The disk grows more fragmented.
Page faults are very frequents The OS is using CPU more for swap-in ans swap-out than for productive work by processes.
Check all that apply about demand paging. The virtual memory of a process P consists of n pages. Process P is assigned m frames such that m < n. We assume that Process P does not waste memory. Process P will trigger at most m page faults Process P will trigger at least n page faults Process P will trigger at most n page faults Process P will trigger at least m page faults
Process P will trigger at least n page faults Process P will trigger at least m page faults
Check all that apply about demand paging. The virtual memory of a process P consists of n pages. Process P is assigned m frames such that m > n. We assume that Process P does not waste memory. Process P will trigger at most n page faults Process P will trigger at least m page faults Process P will trigger at least n page faults Process P will trigger at most m page faults
Process P will trigger at most n page faults Process P will trigger at least n page faults Process P will trigger at most m page faults
Check all that applies to Least Recently Used page replacement algorithm for demand paging. The higher the spatial locality the higher the page fault rate The higher the temporal locality the higher the page fault rate None of these answers The higher the temporal locality the smaller the page fault rate The higher the spatial locality the smaller the page fault rate
The higher the temporal locality the smaller the page fault rate
In demand paging, the working set model is used by the _________ algorithm. dynamic allocation window allocation proportional allocation static equal allocation
dynamic allocation
Modern operating system use demand paging with ________________. dynamic allocation static equal partition static proportional allocation dynamic proportional allocation None of these answers
dynamic allocation
Trashing can be prevented by __________________. increasing the degree of multiprogramming only as long as the CPU utilization increases barring a process from getting frames from other processes allowing frames borrowing between processes. allow a process to keep frames as long as it needs them
increasing the degree of multiprogramming only as long as the CPU utilization increases barring a process from getting frames from other processes
Demand paging is using dynamic allocation when it ___________________. it varies the number of allocated frames based on the process's needs uses equal allocation algorithm uses the proportional allocation algorithm uses least recently used algorithm
it varies the number of allocated frames based on the process's needs
In the textbook, the author mentions (generically) that the CPU scheduler adjusts the degree of multiprogramming. Based on what we learned about processes scheduling, does the author means strictly the CPU scheduler? Check the processes scheduler that impact the degree of multiprogramming. long-term scheduler midterm (memory) scheduler short-term (CPU) scheduler terminator scheduler paging scheduler
long-term scheduler midterm (memory) scheduler
Belady's anomaly ______ that _____ allocated to a process will yield a ______ rate.
refutes fewer frames higher page fault
For demand paging, the working set is a set of pages____________________. the process used in the recent past (during some preset period D). the process uses throughout its lifetime the process will likely use in the near future the process requires to start working.
the process used in the recent past (during some preset period D)