Lesson 2 - The fetch-execute cycle

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Describe how special purpose registers are used in the fetch stage of the fetch execute cycle.

- The PC holds the address of the next instruction to be fetched - The address in the PC is copied to the MAR -The PC is incremented -The instruction is copied in the MDR -The instruction from the MDR is copied to the CIR

Execute Phase

-Reading operand data to the accumulator from RAM - Performing arithmetical calculations on operand data. -Performing logical functions (conditional/loops) -Writing data from the accumulator to the RAM

Fetch Phase

1, Get the memory address of the current instruction from the PC 2, Pass the address to the memory address register (MAR) 3, Send address along the address bus 4, The RAM retrieves the data stored in the address and passes it along the data bus to the MDR. 5, The data stores in the MDR is ready to be decoded.

The fetch execute cycle (exam question)

1, the address contained in the PC is copied to the MAR 2, the instruction is copied from the memory location in the MAR and is placed in the MDR 3, the instruction is copied from the MDR and placed in the CIR 4, the value in the PC is incremented so that it points to the next instruction to be fetched. 5, the instruction is decoded 6, the instruction is executed

Decode Phase

1,The MDR passes data to the CU which decodes the instruction. 2, Signals to the ALU what instruction needs to be completed.

Opcodes VS Operands

Opcode: a single instruction that tells the processor what operation to perform Operand: is the data or location which the operation will be performed on. ADD4 opcode: ADD operand: 4

Register transfer notation

Used to describe how data is passed between the CPU registers during the execution of instructions

Common Notations

[PC] means load the contents [[MAR]] double brackets means load the contents of the memory location referred to in the MAR MDR(L) means part of the register contents or a location in RAM <-- left arrow points to where the data is being saved too. - When two data operations are placed on the same line by a semi-colon, it means that the transfers are taking place simultaneously.


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