Microprocessor System (MCSL51E) - Chapter 4: Instructions and Memory

PUSH, POP

- Data are transferred between a register or a memory location and the stack by these instructions. - Variations of these instructions allow immediate data to be pushed onto the stack, the flags to be transferred between the stack; all 16-bit registers can transfer between the stack and registers. (2)

DRAM Controller

- Designed to control DRAM memory components. - Usually built in to the chip set and contained address MUX, refresh counters,and the circuitry required to do a periodic DRAM refresh.

.286, .386, .486, .586, .686

- Either of these directives follows the .MODEL statement to use the 16-bit instruction mode and precedes it for the 32-bit instruction mode. - These directives are used to select one of these other microprocessors.

Memory Model

- It can be used to shorten the program slightly, but they can cause problems for larger programs. - Not compatible with all assembler programs.

AX, DX-AX, EDX-EAX

- The 8-bit multiplication always multiplies register AL by an operand with the product found in _______. - The 16 -bit multiplication always multiplies register AX by an operand with the product found in ______. - The 32-bit multiply always multiplies register EAX by an operand with the product found in _______.

CMOV

- The Pentium Pro-Core2 contained this new instruction called conditional move. - This instruction only performs the move if the condition is true.

AND, OR, XOR

- These instructions perform logic functions on a byte, word, or doubleword stored in a register or memory location. - All flags change with these instructions, with carry and overflow cleared.

.IF, .ENDIF

- These statements are useful in assembly language for making decisions. - The instructions cause the assembler to generate conditional jump statements that modify the flow of the program.

ADD

- This addition instruction can be 8, 16, 32, or 64 bits. - Allows addressing mode except segment register addressing. - Most flags change when this instruction executes.

ASSUME

- This directive tells the assembler what segment names you have assigned to CS, DS, ES, and SS when full segment definitions are in effect. - In 80386 and above, this directive also indicates the segment name for FS and GS.

AAM (ASCII Adjust after Multiplication)

- This instruction has an interesting added feature that allows it to convert a binary number into unpacked BCD. - It converts a binary number between 00H-63H into unpacked BCD in AX. - This instruction divides AX by 10, and leaves the remainder in AL and quotient in AH.

CMP (comparison)

- This instruction is a special form of subtraction that does not store the difference; instead, the flags change to reflect the difference. - Used to compare an entire byte or word located in any register except segment, or memory location.

NEG

- This instruction performs arithmetic inversion. - Two's complements an operand.

NOT

- This instruction performs logical inversion. - One's complements an operand.

DEC (decrement)

- This instruction subtracts 1 from the contents of a register or a memory location. - The only addressing modes not allowed in this instruction are immediate or segment addressing. - Does not affect the carry flag.

SUB (subtract)

- This subtraction is a byte, word, doubleword, or quadword, and is performed on a register or a memory location. - The only form of addressing it does not allow is segment register addressing. - It affects the same flag bits as ADD.

ADC (add-with-carry)

A different type of addition that adds two operands and the contents of the carry flag.

LOOP

A special condition jump instruction decrements CX and jumps to the label when CX is not 0.

AAA

ASCII Adjust After Addition

AAS

ASCII Adjust After Subtraction

AAD

ASCII Adjust before Division

AAA, AAS, AAM, AAD

ASCII data are added, subtracted, multiplied or divided when the operations are adjusted with these instructions. These instructions does not work on 64-bit mode. (4)

IRET

After the procedure, this special instruction returns control to the software. It not only removes IP and CS from the stack, it also removes the flags from the stack.

DB

Assembler directive: Define Byte

DD

Assembler directive: Define Doubleword

DW

Assembler directive: Define Word

DUP

Assembler directive: Duplicate

Data Segment

By default, all memory-addressing modes address data in this segment unless BP or EBP addresses memory.

DAA

Decimal Adjust after Addition

DAS

Decimal Adjust after Subtraction

1 for a byte, 2 for a word, 4 for a doubleword

Either/both DI and SI increment/decrement by _________ operation, by __________ operation, and by _________ operation.

Location of the data

First operand of the shift and rotate instructions.

C, A, S, Z, P, O

Flags affected by ADD. (6)

AL, AH

For an 8 -bit division, the AX register divides by the operand, after which quotient appears in ______ and the remainder appears in ______.

W-bit

Found in many instructions, this bit selects the size of the data transfer.

ESI, EDI

If 80386-Core2 operates in protected mode, these registers are used with string instructions. (2)

Type 5 interrupt

If the value in the register compared with memory is not within the upper and lower boundary, this interrupt ensues.

CLI

If this instruction executes, it clears I to disable the INTR pin.

STI

If this instruction executes, it sets I to enable the INTR pin.

LFS, LGS, LSS

In 80386 and above, these additional instructions are included to load a 16-bit register and FS, GS, or SS. (3)

PUSHAD, POPAD

In 80386 and above, these instructions transfer all the 32-bit registers between the microprocessor and the stack. (2)

PUSHFD, POPFD

In 80386 and above, these instructions transfer the contents of the EFLAGS between the microprocessor and the stack. (2)

AX, DX

In the 16-bit division, the DX-AX register divides by the operand, after which the _____ register contains the quotient and _____ register contains the remainder.

EAX, EDX

In the 32-bit division, the EDX-EAX register divides by the operand, after which the _____ register contains the quotient and _____ register contains the remainder.

SHRD, SHLD

In the 80386 through the Core2 processors, these two additional double-precision shifts exist.

CMPXCHG8B

In the Pentium-Core2 processors, this instruction compares and exchanges quadword data.

IDIV

Instruction for signed division of byte, word, or doubleword.

IMUL

Instruction for signed multiplication of byte, word, or doubleword.

DIV

Instruction for unsigned division of byte, word, or doubleword.

MUL

Instruction for unsigned multiplication of byte, word, or doubleword.

INTO (interrupt on an overflow)

It is a conditional interrupt that calls an interrupt service procedure if overflow flag = 1.

Procedure

It is a group of instructions that perform one task and are used from any point in a program.

Stack Frame

It is a mechanism used to pass parameters to a procedure through the stack memory. It also holds local memory variables for the procedure.

CMPXCHG

It is an additional comparison instruction, which is a combination of comparison and exchange instructions, found in the 80486-Core2 processors.

Real Mode Interrupt Vector

It is an interrupt vector that is 4 bytes long and contain the address (IP and CS) of the interrupt service procedure.

Protected Mode Interrupt Vector

It is an interrupt vector that is 8 bytes long and the vector table ,ay be relocated to any section of the memory

Interrupt

It is either software instructions similar to CALL, or hardware signals used to CALL procedures. This process interrupts the current program and calls a procedure.

3-bit binary register code

It specifies the REG and R/M field when the MOD = 11.

AX, BX, CX, DX, SP, BP, DI, SI

List of 16-bit registers. (8)

EAX, EBX, ECX, EDX, ESP, EBP, EDI, ESI

List of 32-bit registers. (8)

AH, AL, BH, BL, CH, CL, DH, DL

List of 8-bit registers. (8)

LODS, STOS, MOVS, INS, OUTS

List of data movement instructions for strings. (5)

MOV, PUSH, POP, XCHG, XLAT, IN, OUT, LEA, LOS, LES, LSS, LGS, LFS, LAHF, SAHF

List of data movement instructions. (15)

D-bit

Located in many instructions, this bit selects the direction of the data flow.

Single-bit error

Most error-correction integrated circuits are able to correct only a __________.

PUSHA, POPA

Opcodes/instructions that transfer all the 16-bit registers between the stack and the registers. These are invalid in 64-bit modes. (2)

PUSHF, POPF

Opcodes/instructions that transfer data between the stack and the flags. (2)

Immediate shift / Rotate Count / CL

Second operand of the shift and rotate instructions.

DI, SI

String data transfer instructions use either or both of these registers to address memory. (2)

SBB

Subtract with carry/borrow instruction.

FS, GS

The 80386 through the Pentium 4 include these two additional segment registers.

XADD (add-with-an-exchange)

The 80486 through the Core2 microprocessors have this additional instruction that combines an addition with an exchange.

stack frame data

The BP register addresses this data.

REPE, REPNE

The SCAS and CMPS instructions repeat with these prefixes.

instruction (fixed-port addressing), register DX (variable-port addressing)

The address of the I/O device is either stored in these.

8086/8088

The assembler assumes that software is being developed for these microprocessors unless indicated.

user interrupts

The first 32 interrupt vectors are defined by Intel. The remaining 224 are _________.

override prefixes

The first byte of an instruction contains the opcode, which specifies the operation performed by the mpu, and may be preceded by one or more _________.

256

The microprocessor contains this amount of interrupt vectors in the first 1K bytes of memory.

Dividend

The remainder after the signed division always assumes the sign of the __________.

MOV, PUSH, POP

The segment registers are addressed only by these instructions. The instruction may transfer a segment register to a 16-bit register, or vice versa. (3)

Indirect Jump

The two forms of this jump: (1) jump to the location stored in a register and (2) jump to the location stored in a memory word (near indirect) or doubleword (far indirect).

DB, DW, DD, DUP

These assembler directives store data in the memory system. (4)

BYTE PTR, WORD PTR, DWORD PTR, QWORD PTR

These directives appear with the INC instruction when contents of a memory location are addressed by a pointer. (4)

LEA, LDS, LES

These instructions load a register or registers with an effective address. (3)

LDS

These instructions loads any 16-bit register and DS with an effective address.

LES

These instructions loads any 16-bit register and ES with an effective address.

Data Movement Instructions

These instructions transfer data between registers, a register and memory, a register and the stack, memory and the stack, the accumulator and I/O, and the flags and the stack.

Arithmetic and Logic operators

These operators can be used in assembly language. An example is MOV AX, 34*3, which loads AX with 102.

BP, EBP

These registers address data in the stack segment. (2)

.REPEAT, .UNTIL

These statements allow an assembly language program to use the REPEAT-UNTIL construct.

.WHILE, .ENDW

These statements allow an assembly language program to use the WHILE construction.

IN, OUT

These transfer data between AL, AX, or EAX and an external I/O device. (2)

Memory-to-Memory Transfers

These transfers are allowed with the MOVS instruction.

Far Jump

This allows a jump to any location in the memory system or intersegment.

Data Connection

This connection on a memory component is used to enter information to be stores in a memory location and also to retrieve information read from a memory location.

Address Connection

This connection on a memory component is used to select one of the memory locations within the device.

BCD data

This data add or subtract in packed form by adjusting the result of the addition with DAA or the subtraction with DAS.

EQU

This directive allows data or labels to be equated to labels.

ENDS

This directive identifies the end of a memory segment when full-segment definitions are in use.

SEGMENT

This directive identifies the start of a memory segment.

ENDP

This directive indicate the end of a procedure.

PROC

This directive indicate the start of a procedure. It defines the name and type of a procedure.

Direction Flag (D)

This flag chooses the auto-increment or auto-decrement mode of operation for DI and SI for string instructions.

I (interrupt enable flag)

This flag controls the INTR pin connection.

C (carry flag bit)

This flag is clear, set, and complemented by the CLC, STC, and CMC instructions.

INC (increment)

This instruction adds 1 to the byte, word, or doubleword contents of a register or memory location. It affects the same flag bits as ADD except the carry flag.

SCAS (scan string)

This instruction compares AL, AX, or EAX with the contents of the extra segment memory location addressed by DI.

CMPS (string compare)

This instruction compares the byte, word, or doubleword contents of two sections of memory. One section is addressed by DI in the extra segment, and the other is addressed by SI in the data segment.

BOUND

This instruction compares the contents of any 16-bit register against the contents of two words of memory: an upper and lower boundary.

XLAT (translate)

This instruction converts the data in AL into a number stored at the memory location addressed by BX plus AL.

ENTER

This instruction creates the stack frame.

Special IMUL Immediate Instruction

This instruction exists on the 80186-Core2 processors that contains three operands.

INS

This instruction inputs data from an I/O device addressed by DX and stores it in the memory location addressed by DI.

CALL

This instruction links to a procedure. It is a combination of a PUSH and JMP instruction. It pushes the return address on the stack and then jumps to the procedure.

LEA

This instruction loads any 16-bit register with an effective address.

OUTS

This instruction outputs the contents of the memory location addressed by SI and sends it to the I/O device addressed by DX.

TEST

This instruction performs the AND operation, but the logical product is lost. It changes the flag bits to indicate the outcome.

far CALL

This instruction places both IP and CS on the stack.

near CALL

This instruction places the contents of IP on the stack.

LEAVE

This instruction removes the stack frame from the stack.

RET

This instruction returns from a procedure by removing the return address from the stack and placing it into IP, or IP and CS.

MOVS

This instruction transfers a byte, word, or transfers a byte, word, or doubleword from the memory location addressed by SI into the location addressed by DI.

LODS

This instructions loads AL, AX, or EAX with data from with data from the memory location addressed by SI.

STOS

This instructions stores AL, AX, or EAX in the memory location addressed by DI.

Software interrupt instruction (INT)

This interrupt instruction often replace system calls; it saves 3 bytes of memory each time it replaces call instructions

Conditional jump

This is a short jump that test one or more of the following flag bits: C, Z, O, P, or S.

Short Jump

This jump allows a branch to within +127 and -128 bytes.

EPROM

This memory can be erased if exposed to ultraviolet light.

Flash Memory

This memory is programmed in the system by using a 12V or 5.0V programming pulse.

SRAM

This memory retains data for as long as the system power supply is attached. Available in sizes up to 128K x 8

DRAM

This memory retains data for only a short period, usually 2-4ms. It must be refreshed periodically. It also have multiplexed address inputs that requires an external MUX to provide each half of the address at the appropriate time.

SI offset address

This offset address is located in the data segment.

DI offset address

This offset address is located in the extra segment.

REP

This prefix may be attached to any string instruction to repeat it. It repeat the string the number of times found in register CX.

REPNE

This prefix repeats the string instruction while a not-equal condition exists.

REPE

This prefix repeats the string instruction while an equal condition exists.

segment override prefix

This prefix selects a different segment register for a memory location than the default segment.

Memory Address Decoder

This selects an EPROM or RAM at a particular area of the memory. Commonly found include the 74LS138 3-to-8 line decoder, 74LS139 2-to-4 line decoder, and programmed selection logic in a PLD.

MOD

This selects the addressing mode of operation for a machine language instruction's R/M field.

short, near, far

Three types of unconditional jump instructions.

REX

To access the 64-bit registers, this new prefix is added that contains the fourth bit.

CLD

To clear D to 0, use this instruction to select the auto-increment mode.

STD

To set D to 1, use this instruction to select the auto-decrement mode.

Near Jump

Using a displacement of +/- 32k, this allows a jump to any location in the current code segment or intrasegment.

colon (:)

Whenever a label appears with JMP instruction or conditional jump, the label, located in the label field, must be followed by this symbol.