Midterm Review Com-Org 1

Condition codes

These refer to the setting of one (1) or more status flags.

WAIT

This causes the processor to repeatedly check for and handle This causes the processor to repeatedly check for and handle proceeding.

Jcc Dest

This checks the state of one or more status flags in the register. If the flags are in the specified state or condition, a JMP operation to the target instruction specified by the operand is performed

INS Dest, Source

This copies data from the I/O port specified by the source operand to the destination operand, which is a memory location.

IN Dest, Source

This copies data from the I/O port specified by the source operand to the destination operand, which is a register location.

OUT Dest, Source

This copies the byte, word, or doubleword value from the source register to the I/O port specified by the destination operand.

OUTS Dest, Source

This copies the byte, word, or doubleword value from the source operand, which is a memory location, to the I/O port specified with the destination operand.

POP Dest

This copies the stock top to the destination and increments theESP.

PUSH Source

This decrements the extended stack pointer (ESP) and copiesthesourceoperandtothe stack top.

Source operand reference

This encompasses the input for the operation. An operation may involve one or more source operands.

Result operand reference

This encompasses the results of the operation.

Next instruction reference

This indicates where the processor should fetch the next instruction.

Data processing instructions

This involves the logical instructions AND, OR, XOR, add and subtract instructions, and the test and compare instructions.

NOP

This is a one-byte or multi-byte instruction that takes up space in the instruction stream but does not impact the machine context. This instruction performs no operation.

MOV Dest, Source

This is used to move data between registers or between registers and memory.

CALL Proc

This saves the procedure linking information on the stack and branches to the called procedure that is specified by the operand.

Operation code

This specifies the operation to be performed. It is also known as the opcode.

HLT

This stops instruction execution and places the processor in a halt state

XCHG Op1, Op2

This swaps the contents between two registers or between registerand memory.

computer

has a set of instructions that allow users to formulate any data processing task

Input/Output (I/O) instructions

instructions encompasses the operation of transferring external data into the memory and vice versa

Intel x86 instruction set

involves complex array of operation types, including some specialized instructions.

Operands

represented symbolically, making it possible to write machine language programs in symbolic form

L

represents the number of bytes that are translated at the specified address in R1

Location of the source operand

· (either memory, register, or top of a stack)

Procedural instructions

· The Intel x86 provides four (4) instructions that supports procedural call/return which are: CALL, ENTER, LEAVE, and RETURN.

For data storage

· The entry or exit of data into registers and memory locations

Status flags and condition codes instructions

: In Intel x86 status flags are set through arithmetic and compare operations

A, NBE

Above; Not below or equal (greater than, unsigned)

B, NAE, C

Below; Not above or equal (less than, unsigned); Carry set

Load and store instructions

In the ARM instruction set, only the load and the store instructions can access memory locations

Location of the source operand

Location of the source operand

NP, PO

No parity; Parity odd

The multiply instructions operate on word or halfword operands and can produce normal or long results.

Portions of two (2) operands are operated in parallel. These instructions are useful in image processing applications.

S

Sign (negative

transfer of control instructions

Significant fraction of instructions in any program encompasses function that changes the sequence of instruction execution.

Status register access instructions

The ARM instruction set provides the ability to read and write portions of the status register

Branch instructions:

The ARM instruction set supports a branch instruction that allows a conditional branch forward or backward up to 32MB

Direct Memory Access (DMA)

The I/O module and the main memory exchange data directly, without the involvement of the processor

For data processing

The arithmetic and logic instructions

Instruction set

The collection of different instructions that a processor can execute is then called the processor's

For data movement

The input and output instructions

Data Transfer

The most fundamental type of machine instruction is the data transfer instruction

Multiply instructions

The multiply instructions operate on word or halfword operands and can produce normal or long results.

machine instructions or computer instructions

The operation of a processor is determined by the instructions it executes,

Programmed I/O

The processor executes a program that provides itself a direct control over the I/O operations.

Interrupt-Driven I/O

The processor issues an I/O command, continues to execute other instructions, and is interrupted by the I/O module when the latter task is completed.

For control

The test and branch instructions

Memory management instructions:

These are considered specialized instructions that deals with memory segmentation

Extended instructions

These are instructions for unpacking data by sign or zero, and extending bytes to halfwords or words, and halfword to words.

JMP Dest

This transfers program control to a different point in the instruction stream without recording the return information.

RET

This transfers the program control to a return address located on the top of the stack.

System control instructions

are instructions that can only be executed while the processor is in a certain privileged state, or is executing a program in a distinct privileged area of the memory.

Conversion instructions

are instructions that changes the format or operate on the format of data are instructions that changes the format or operate on the format of data

data transfer operations

can be considered as the simplest type. If both source and destination are registers, then the processor simply transfers the data internally

operand R2

contains the address of the start of an 8-bit code.

Advanced RISC Machines (ARM) instruction set

encompasses a large collection of operation types that may fall under any of the principal categories