exam 3
79. ____________________ ports enable the CPU and bus to interact with a keyboard in the same way they interact with a disk drive or video display.
I/O
31. A ____ is a shared electrical or optical channel that connects two or more devices. a. trace b. bus c. route d. connection
b
31. Each cell in the matrix representing one part of a digital image is called a ____. a. bubble b. pixel c. dot d. block
b
32. There are typically multiple storage and I/O devices connected to a computer, collectively referred to as ____. a. core devices b. peripheral devices c. perimeter devices d. companion devices
b
36. When the CPU is the focus of all computer activity, it's also the ____. a. bus clock b. bus master c. bus slave d. bus protocol
b
40. A ____ is a simple processor attached to a peer-to-peer bus that decides which devices must wait when multiple devices want to become a bus master. a. bus master unit b. bus arbitration unit c. bus controller d. bus interface
b
42. A ____ connects secondary storage devices to the system bus. a. memory bus b. storage bus c. system bus d. local bus
b
45. A(n) ____ is a communication pathway from the CPU to a peripheral device. a. connection port b. I/O port c. device port d. block port
b
52. As buffer size increases above ____ bytes, CPU cycle consumption decreases at a linear rate. a. 4 b. 8 c. 12 d. 16
b
53. The ____ states that when multiple resources are required to produce something useful, adding more of a single resource produces fewer benefits. a. law of regression b. law of diminishing returns c. law of diminished value d. law of diversity
b
95. ____________________ is incorporated into all modern videoconferencing standards to reduce use of available data transfer capacity.
compression
73. Computer system components coordinate their activities by sending signals over the ____________________.
control bus
93. ____________________ compression is required in many applications, such as accounting records, executable programs, and most stored documents.
costless
75. In traditional computer architecture, the ____________________ is the focus of all computer activity.
cpu
33. The ____ carries commands, command responses, status codes, and similar messages. a. bus clock b. command bus c. CPU d. control bus
d
37. When the CPU is the focus of all computer activity, all other devices are ____. a. bus masters b. bus primates c. bus limiters d. bus slaves
d
41. The ____ connects only the CPU and memory. a. storage bus b. local bus c. system bus d. memory bus
d
46. In most computers, an I/O port is a ____. a. system address b. memory block c. network device d. memory address
d
47. One task performed by a storage device controller is translating logical write operations into ____ write operations. a. stack b. bugger c. cache d. physical
d
54. Most performance benefits of a cache occur during ____. a. write operations b. mixed operations c. buffered operations d. read operations
d
58. When three cache levels are in use, the cache farthest from the CPU is called a ____ cache. a. level zero b. level one c. level two d. level three
d
6. Performance is improved if storage and I/O devices can transmit data between themselves with explicit CPU involvement.
false
7. Peer-to-peer bus protocols are substantially less complex but more expensive than master-slave bus protocols.
false
8. A monochrome display can display black, white, and many shades of gray in between, so it requires 8 bits per pixel.
false
9. Secondary storage devices are much faster than the system bus.
false
84. Mismatches in data transfer rate and data transfer unit size are addressed in part by ____________________, which consumes substantial CPU resources.
interrupt processor
82. A portion of the CPU, separate from the components that fetch and execute instructions, monitors the bus continuously for interrupt signals and copies them to a(n) ____________________.
interrupt register
94. ____________________ compression is usually applied only to audio and video data because the human brain tolerates missing audio and video data and can usually "fill in the blanks."
lossy
91. ____________________ is a more traditional approach to multiprocessing that uses two or more processors on a single motherboard or set of interconnected motherboards.
multiprocessor
72. The ____________________ distributes electrical power to directly attached devices or their device controllers.
power bus
86. As single bits are transferred over the wireless connection, they're added to the buffer in ____________________ order.
sequential
83. A special-purpose register called the ____________________ always points to the next empty address in the stack and is incremented or decremented automatically each time the stack is pushed or popped.
stack pointer
76. ____________________ buses connect a subset of computer components and are specialized for these components' characteristics and communication between them.
subsidary
81. When the CPU detects an interrupt, it executes a master interrupt handler program called the ____________________.
supervisor
29. Using data compression alters the balance of processor resources and communication or storage resources in a computer system.
true
30. A significant advantage of MIDI is its compact storage format.
true
30. MP3 compresses the audio data stream by discarding information about masked sounds or representing them with fewer bits.
true
4. On paper, pixel size corresponds to the smallest drop of ink that can be placed accurately on the page.
true
5. Serial channels in buses are more reliable than parallel channels at very high speeds.
true
8. The memory bus has a much higher data transfer rate than the system bus because of its shorter length, higher clock rate, and (in most computers) large number of parallel communication lines.
true
9. An IDL can represent image components as embedded fonts, vectors, curves and shapes, and embedded bitmaps.
true
77. The ____________________ bus improves computer system performance by removing video traffic from the system bus and providing a high-capacity one-way communication channel optimized for video data.
video bus
27. Zip files and archives are examples of lossless compression.
true
32. The ____ of a display is the number of pixels displayed per linear measurement unit. a. resolution b. refinement c. accuracy d. pitch
a
34. Devices attached to a system bus coordinate and synchronize their activities with a common ____. a. bus clock b. control bus c. data bus d. system bus
a
39. In a ____, any device can assume control of the bus or act as a bus master for transfers to any other device. a. peer-to-peer bus b. star bus c. linear bus d. ring bus
a
44. Data, address, and command bits are transmitted across PCI bus line subsets called "____." a. lanes b. ports c. stripes d. bundles
a
49. A ____ is a reserved area of main memory accessed on a last-in, first-out (LIFO) basis. a. stack b. queue c. chain d. heap
a
51. If a buffer isn't large enough to hold and entire unit of data transfer, an error called a ____ occurs. a. buffer overflow b. buffer underflow c. heap overflow d. buffer fault
a
57. The ratio of cache hits to read accesses is called the cache's ____. a. hit ratio b. efficiency c. performance d. hit boundary
a
60. Many computer system designers rely on ____ to implement disk caching. a. the OS b. specialized disk controller hardware c. applications d. firmware
a
65. ____ is a technique that reduces the number of bits used to encode data, such as a file or a stream of video images transmitted across the Internet. a. Compression b. Dispersion c. Randomization d. Coordination
a
68. With ____ compression, data inputs that are compressed and then decompressed are different from, but still similar to, the original input. a. lossy b. lossless c. universal d. ideal
a
29. Phonemes sound similar when voiced repetitively by the same person.
true
55. A ____ is a processor that guesses what data will be requested in the near future and loads this data from the storage device into the cache before it's actually requested. a. cache miss b. cache controller c. cache hit d. cache algorithm
b
59. When three cache levels are in use, the cache closest to the CPU is called a ____ cache. a. level zero b. level one c. level two d. level three
b
61. The latest trend in high-performance CPU design embeds multiple CPUs and cache memory on a single chip—an approach called ____. a. multiple-processor architecture b. multicore architecture c. multipath architecture d. partial execution architecture
b
63. The phrase ____ describes approaches to increasing processing and other computer system power by using larger and more powerful computers. a. scaling out b. scaling up c. scaling down d. scaling wide
b
67. With ____ compression, any data input that's compressed and then decompressed is exactly the same as the original input. a. lossy b. lossless c. perfect d. ideal
b
70. Lossy compression of audio and video can achieve compression ratios up to ____. a. 25:1 b. 50:1 c. 75:1 d. 100:1
b
85. A(n) ____________________ is a small reserved area of main memory (usually DRAM or SRAM) that holds data in transit from one device to another and is required to resolve differences in data transfer unit size.
buffer
87. A(n) ____________________ can improve system performance when two devices have different data transfer rates, as when copying music files from a PC to an iPod via a USB 2.0 connection.
buffer
74. In the simplest sense, a(n) ____________________ is just a set of communication lines.
bus
35. The ____ governs the format, content, and timing of data, memory addresses, and control messages sent across the bus. a. bus clock b. bus size c. bus protocol d. bus master
c
38. Under direct memory access, a device called a ____ is attached to the bus and to main memory. a. controller b. DMA master c. DMA controller d. DRM controller
c
43. ____ is a family of bus standards found in nearly all small and midrange computers and many larger ones. a. Peripheral Component Interface b. Peripheral Connection Interface c. Peripheral Component Interconnect d. Peripheral Component Interchange
c
48. If the CPU is idle while a device completes an access request, the CPU cycles that could have been (but weren't) devoted to instruction execution are called ____. a. I/O channels b. I/O hooks c. I/O wait states d. I/O peers
c
50. The main goal of buffering and caching is to ____. a. control data channels b. improve I/O performance c. improve overall system performance d. reduce system load
c
56. When the data needed isn't in the cache, the access is called a ____. a. cache hit b. cache fault c. cache miss d. cache pull
c
64. ____ is an approach that partitions processing and other tasks among multiple computer systems. a. Scaling up b. Scaling down c. Scaling out d. Scaling in
c
69. The term ____ describes the ratio of data size in bits or bytes before and after compression. a. compression value b. compression efficiency c. compression ratio d. compression value
c
88. Like a buffer, a(n) ____________________ is a reserved area of high-speed memory (usually RAM) that improves system performance.
cache
89. When a read operation accesses data already contained in the cache, the access is called a(n) ____________________.
cache hit
90. A cache miss requires performing a(n) ____________________ to or from the storage device.
cache swap
62. ____ is a cost-effective approach to computer system design when a single computer runs many different application programs or services. a. Partial execution architecture b. Multipath architecture c. Multicore architecture d. Multiple-processor architecture
d
66. A ____ is a mathematical compression technique implemented as a program. a. compression system b. compression routine c. compression utility d. compression algorithm
d
71. The ____________________ transmits data between computer system components.
data bus
92. Most compression algorithms have a corresponding ____________________ algorithm that restores compressed data to its original or nearly original state.
decompression
80. Storage and I/O devices are normally connected to the system bus or a subsidiary bus through a(n) ____________________.
device controller
78. A(n) ____________________ bus, such as a Universal serial Bus, connects one or more external devices to the system bus.
external
10. IDLs are a simple form of compression.
false
11. The CPU communicates with a peripheral device by moving data to or from an I/O port's dedicated bus.
false
12. Phosphors emit colored light in liquid crystal displays.
false
13. A buffer for an I/O device is typically implemented on the sending computer.
false
16. Color laser output uses four separate print generators.
false
16. One way to limit wait states is to use an SDRAM cache between the CPU and SRAM primary storage.
false
19. A full-featured 64-bit CPU, even one with multiple ALUs and pipelined processing, typically requires fewer than 50 million transistors.
false
19. Modern bar codes encode data in three dimensions.
false
21. Multiple-processor architecture is not common in workstations.
false
23. Moving image quality improves as the number of frames per second (fps) decreases.
false
24. The largest computational problems, such as those encountered in modeling three-dimensional physical phenomena, can be solved by a single computer as long as it has enough computing resources.
false
24. Typically, digital cameras capture 14 to 20 fps.
false
26. Reducing the size of stored or transmitted data can improve performance whenever there's a dearth of processing power.
false
28. Continuous speech is a series of nonstop interconnected phonemes.
false
28. Lossless compression ratios higher than 50:1 are difficult or impossible to achieve with audio and video data.
false
3. With serial communication lines in a bus, each line carries only one bit value or signal at a time, and many lines are required to carry data, address, and control bits.
false
4. Until the 2000s, system buses were always constructed with serial electrical lines.
false
5. Decades ago, printers adopted 1/32 of an inch as a standard pixel size.
false
6. For people and computers, a printed character must exactly match a specific pixel map to be recognizable.
false
1. A system bus connects computer system components, including the CPU, memory, storage, and I/O devices.
true
1. For video display, a pixel displays no light or light of a specific color and intensity.
true
10. Devices with low data transfer demand can use a single PCI bus lane, and devices with higher requirements can increase their available data transfer rate by using additional lanes.
true
11. LCD displays have less contrast than other flat panel displays because color filters reduce the total amount of light passing through the front of the panel.
true
12. A PC usually transmits data one bit at a time over a wireless connection, and a laser printer prints an entire page at once.
true
13. Because plasma displays actively generate colored light near the display surface, they're brighter and have a wider viewing angle than LCDs.
true
14. During a write operation, a cache acts similarly to a buffer.
true
14. OLED displays combine many of the best features of LCD and plasma displays.
true
15. Data written to a cache during a write operation isn't automatically removed from the cache after it's written to the underlying storage device.
true
17. An advantage of optical over mechanical mice is a lack of moving parts that can be contaminated with dust and dirt.
true
17. Disk caching is common in modern computer systems, particularly in file and database servers.
true
18. The OS is the best source of file access information because it updates information dynamically as it services file access requests.
true
2. A system bus can be conceptually or physically divided into specialized subsets, including the data, address, control, and power buses.
true
2. Image quality improves as dots per inch increases.
true
20. When multiple processors occupy a single motherboard, they share primary storage and a single system bus.
true
22. A digital still camera captures and stores one image at a time.
true
22. Both multicore and multiple-processor architectures are examples of scaling up because they increase the power of a single computer system.
true
23. Until the 1990s, scaling up was almost always a more cost-effective strategy to increase available computer power because communication between computers was extremely slow compared with communication between a single computer's components.
true
25. Most portable data capture devices combine a keyboard, mark or bar-code scanner, and wireless connection to a wired base station, cash register, or computer system.
true
25. People routinely download megabytes or gigabytes of data via the Internet and store gigabytes of data on handheld devices, terabytes on desktop computers, and petabytes to exabytes in corporate and government data centers.
true
