Operating System Chapter 8: Memory management services
Absolute address
Relative address bound to
Limit register
Range of the physical addresses of a process.
Page table
Table containing page indices and offsets.
Logical address space
Set of all logical addresses of a program.
Pure code
Syn. "Reentrant code".
TLB miss
When the page number is not in the TLB, and a reference to that page must be made.
Physical address
Address as seen by the memory unit.
Logical address
Address generated by the CPU.
Relocatable address
Adress relative from the beginning of the program, assigned by the compiler.
Relocation register
Base register used by the MMU, to relocate the user code to the corresponding physical address space.
Execution-time address binding
Binding delayed until run-time, so that the process can move in memory. Special hardware needed, and logical and physical address spaces differ.
Paging
Breaking physical memory into fixed-sized blocks (frames) and logical memory into pages. No external fragmentation.
Memory stall
CPU has to wait because not all data from the main memory is available.
Relocatable code
Code of which it is not known at compile time where it will reside in memory. Change of starting address requires the code to reload.
Reentrant code
Code that does not change during execution, can be shared (usually through shared pages).
Absolute code
Code that will be in a fixed place in memory, generated at compile time. Complete recompilation needed if the starting address changes.
Frame table
Contains all physical frames, if they are free or not, and which process is allocated to it.
Static linking
Dynamically linked libraries - Copying of the library code at compile time.
Dynamic linking
Dynamically linked libraries - Linking occurs at execution-time, using stubs that tell the loader how to load the library and which one to load.
Stub
Dynamically linked libraries - Reference telling how to load a system library using dynamic linking.
Translation-look-aside buffer (TLB)
Fast-access buffer containing a part of the page table, with the physical address. Avoids two memory accesses (one to the page table and one to the byte).
CPU-register
Fast-access memory on CPU, accessible within one CPU-cycle.
Load-time address binding
Final binding is delayed until load time. Same logical and physical address space.
Best-fit
Find the smallest hole that can satisfy the process-load request. Produces the smallest leftover hole.
Worst-fit
Finds the biggest possible hole, creating the biggest leftover hole.
50-percent rule
For every N allocated blocks, another 0,5N blocks will be wasted due to external fragmentation.
Internal fragmentation
Free, unused memory within a fixed size block.
Compile-time address binding
Generation of absolute code (fixed location in main memory). Same logical and physical address space.
Hole
Group of free partitions.
Clustered page table
Hash page table for 64-address bit spaces, with each entry mapping several pages.
Forward-mapped paging
Hierarchical paging, starting from the outer page table inward.
Page number
Index in a page table.
Relocatable link loader
Loads the routine into memory and updates the program's address tables
Segmentation
Logical address space is a collection of segments, with a name and a length.
Virtual address
Logical address that differs from the physical address.
Binding
Mapping an address space to another.
Sparse memory space
Memory space with a lot of non-contiguous memory references.
Variable-partition method
OS keeps a table of free partitions, using different allocation algorithms.
Transient OS code
OS services that come and go as needed.
Page offset
Offset in the page base address.
Segment table
Ordered table maintained by the hardware, containing the segment base and segment limit.
Hierarchical paging
Page table can page a page table, to limit the size of the page table.
Hashed page table
Page table that can handle address spaces larger than 32-bits, with the hash value being the virtual page number.
Page-table base register (PTBR)
Pointer to page tables stored in main memory.
Memory address register
Register in the memory unit where the physical address will be loaded into.
Page-table length register (PTLR)
Register indicating the size of the page table.
Physical address space
Set of all addresses corresponding to the logical addresses.
Compaction
Shuffling the blocks to make a big hole. Solves external fragmentation, resource and time intensive.
Base register
Smallest legal physical address of a process.
First-fit
Stop looking for holes as soon as one is found big enough to satisfy the request.
Backing store
Storage devices where processes are temporarily swapped to from the main memory.
Ready queue
Swapping - Queue maintained by the system of all the processes in the backing store.
Dynamically linked library
System library linked to user programs during either compile-time or by using stubs.
Swapping
Temporarily moving processes in and out of the main memory to a backing store, to increase the degree of multiprogramming.
Two-level paging
The page table is also paged, limiting the size of the page table.
Dynamic storage allocation problem
The problem of how to satisfy a request of size n from a list of free holes.
Swap time
Time it takes to swap a process back in and context switch, fairly high.
Memory management unit (MMU)
Unit containing a relocation register, for dynamic relocation of user code.
External fragmentation
Unused contiguous blocks, because the free block(s) could not accommodate the loading of a bigger process.
Page sharing
Using common pages as reentrant code, or for interprocess communication.
Multiple-partition method
When a partition is free, a waiting program is loaded into it.