Test

Which one of the following is NOT the three abilities any interrupt system must have? a.The ability for the hardware to request action from computer. b.The ability for the computer to determine the source. c.The ability to support both positive and negative edge-triggered interrupts. d.The ability for the computer to acknowledge the interrupt.e.None of the above

C

A polled interrupt system employs separate connections for each device so that the computer can give automatic resolution

F

All interrupts on the TM4C microcontrollers are polled

F

Bit 0 of the special register PRIMASKis the interrupt mask bit, I. If the bit is 1, then interrupts are allowed, which we will define as enabled

F

In a polled interrupt system, interrupt is disabled, busy waiting is used instead

F

The following instruction setup SysTick with interrupt disabled. TNVIC_ST_CTRL_R = 0x00000007

F

You must acknowledge all interrupt service routines by clearing the flag of the requested interrupt

F

A higher priority interrupt can suspend the execution of a lower priority ISR, with 0 being the highest priority and 7 being the lowest prior

T

At reset, BASEPRIis set to accept interrupts at all priority levels

T

Bit 0 of the special register PRIMASKis the interrupt mask bit, I. If the bit is 0, then interrupts are allowed, which we will define as enabled

T

In a polled interrupt system, interrupt is enabled, busy waiting is used instead

T

Interrupt vectors are stored in ROM at the beginning of memo

T

The following instruction setup SysTick with interrupt enabled. TNVIC_ST_CTRL_R = 0x00000007

T

411.Which one of the following is NOT one of the 5 conditions that must be true for an interrupt to be generated? a.interrupt priority level must be 0 b.device arm c.NVIC enable d.global enable e.hardware event trigger

a

The following code set an edge-triggered interrupt to be which one of the following? GPIO_PORTF_IS_R &= ~0x10; GPIO_PORTF_IBE_R &= ~0x10; GPIO_PORTF_IEV_R &= ~0x10; a.Falling edge b.Rising edge c.Both edges d.None of the above

a

516.Nested Vectored Interrupt Controller :a.Control some exceptions b.Controls all exceptions c.Controls only vectored interrupts d.Controls only polled interrupts e.None of the above

b

Which interrupt does the following code enable?NVIC_EN0_R |= 0x40000000; // (h) enable interrupt 30 in NVIC a.Port A edge-triggered b.Port B edge-triggered c.Port F edge-triggered d.SysTick interrupt e.None of the abov

c

The following code tells us which bit in Port F is used to generate edge-triggered interrupt? void GPIOPortF_Handler(void){ GPIO_PORTF_ICR_R =0x10; FallingEdges = FallingEdges + 1;} a.Bit 1 b.Bit 2 c.Bit 3 d.Bit 4 e.Noneof the above

d

Which priority does the following code sets PortF to?NVIC_PRI7_R = (NVIC_PRI7_R&0xFF1FFFFF)|0x00A00000; a.2 b.3 c.4 d.5 e.None of the above

d