2.10
What is the name of the temporary register reserved for the assembler in MIPS?
$at (assembler temporary).
What is the value of the jump opcode?
2.
What is the maximum program size if the branch address is limited to 16 bits?
216.
What is the maximum program size if the jump instruction is used?
226.
What is the maximum number of bits available for the branch address in the jump instruction?
26 bits.
What is the size of the 26-bit field in a jump instruction?
26 bits.
What is the maximum number of instructions that can be represented by a 28-bit address?
268,435,456.
What is the size of a MIPS word?
32 bits or 4 bytes.
What is the maximum number of bytes that can be addressed by a 32-bit address?
4 GB.
What is the size of a MIPS instruction?
4 bytes.
What is the maximum number of instructions that can be represented by a 32-bit address?
4,294,967,296.
What is the opcode for the conditional branch instruction?
5.
What is the format of the bne instruction fields?
6 bits for the opcode, 5 bits for each operand, and 16 bits for the branch address.
What is the format of the bne instruction?
6 bits for the opcode, 5 bits for each operand, and 16 bits for the branch address.
What is the format of the J-type instruction fields?
6 bits for the operation field and the rest for the address field.
What is the format of the J-type instruction?
6 bits for the operation field and the rest for the address field.
What is the maximum number of instructions that can be represented by a 16-bit address?
65,536.
What is a core dump?
A file containing the complete contents of a computer's memory at the time of the dump
What is an addressing mode?
A regime delimited by varied use of operands and/or addresses
What is the solution for large constants in MIPS?
The load upper immediate (lui) instruction.
What are the optimizations for instruction addresses used in branches and jumps in MIPS?
They are shown after the general solution for large constants.
What is the difference between sequential word addresses?
They differ by 4, the number of bytes in a word.
What is the range of PC-relative addressing?
±215 words from current instruction
What is the maximum number of bytes that can be addressed by a 28-bit address?
1 GB.
What is the maximum number of bits available for the branch address in the conditional branch instruction?
16 bits.
What is the size of the 16-bit field in a branch instruction?
16 bits.
What does subtract in row 4 and column 2 of the bottom section mean?
The funct field is 100010two and the op field is 000000two.
What is the MIPS address relative to in PC-relative addressing?
Address of the following instruction (PC + 4)
What is PC-relative addressing?
Addressing regime using PC and constant
What does Appendix A (Assemblers, Linkers, and the SPIM Simulator) cover?
All instructions.
What is the opcode for four instructions found in COD Appendix A?
Bltz/gez.
What is PC-relative addressing?
Branch address is sum of PC and constant in instruction
How does MIPS stretch the distance of the branch?
By having PC-relative addressing refer to the number of words to the next instruction instead of the number of bytes.
What is the symbolic representation of the MIPS machine language limited by?
By whatever the creator of an assembler chooses to include.
Where is the floating point value in row 2, column 1 defined?
COD Chapter 3 (Arithmetic for Computers).
What chapter describes Arithmetic for Computers?
COD Chapter 3.
What is the disadvantage of using PC-relative addressing?
Cannot address distant instructions
What is the instruction addi used for?
Copying the left-most bit of the 16-bit immediate field into the upper 16 bits of a word.
Why is PC-relative addressing used for conditional branches?
Destination likely to be close to branch
What is the significance of the 16-bit field in branch instructions?
It can branch four times as far by interpreting the field as a relative word address rather than as a relative byte address.
What does the MIPS encoding figure show?
Fields for MIPS machine language
What are MIPS addressing modes?
Immediate, register, base/displacement, PC-relative, pseudodirect
What is the maximum distance a jump instruction can jump?
It can jump 1 GB in either direction.
What does COD Chapter 3 (Arithmetic for Computers) describe?
Instructions given in mnemonics using color.
What type of instructions are described in full name using color?
Instructions in COD Appendix A (Assemblers, Linkers, and the SPIM Simulator).
What does the bne instruction do?
It adds 2 words or 8 bytes to the address of the following instruction, specifying the branch destination relative to that following instruction instead of relative to the branch instruction or using the full destination address.
What is the maximum distance a branch instruction can branch?
It can branch 64 MB in either direction.
What is the ideal register for PC-relative addressing?
Program counter (PC)
What does the assembler do when a conditional branch instruction branches farther than can be represented in the 16 bits?
It inserts an unconditional jump to the branch target, and inverts the condition so that the branch decides whether to skip the jump.
What is the significance of the hardware in the symbolic representation of the MIPS machine language?
It is limited by the hardware, but the assembler can enhance it.
What is the enhanced language of the assembler?
It is not found in the processor and is used to explain the architecture of the computer.
What is the significance of the immediate field's size restriction?
It may be a problem for memory addresses in loads and stores as well as for constants in immediate instructions.
What is the disadvantage of keeping all MIPS instructions 32 bits long?
It may not be convenient to have a 32-bit constant or 32-bit address.
How does the MIPS jump instruction replace the PC?
It replaces only the lower 28 bits of the PC, leaving the upper 4 bits of the PC unchanged.
What is the significance of the 26-bit field in jump instructions?
It represents a 28-bit byte address.
What is the benefit of keeping all MIPS instructions 32 bits long?
It simplifies the hardware.
What does the jump instruction do?
It uses the full address, corresponding to the label Loop.
What addressing regime is used for procedure calls in MIPS?
J-type format for jump and jump-and-link instructions
What is the simplest addressing format used by MIPS jump instructions?
J-type, consisting of 6 bits for the operation field and the rest for the address field.
What is pseudodirect addressing?
Jump address is 26 bits of instruction concatenated with upper bits of PC
What is an example of using the notation in the figure?
Load word in row 4 and column 3.
What is the instruction ori used for?
Loading 0s into the upper 16 bits to create 32-bit constants.
What is the advantage of using PC-relative addressing?
Making the common case fast by addressing nearby instructions
What is immediate addressing?
Operand is a constant within the instruction
What is register addressing?
Operand is a register
What is base/displacement addressing?
Operand is at memory location whose address is sum of register and constant in instruction
What is instruction set extension?
Process of expanding architecture to move software compatibly upward to next generation
What is an example of a field defined elsewhere in the figure?
R-format in row 0 and column 0.
What is machine language decoding?
Reverse-engineering machine language to create original assembly language
What is the alternative to specifying a branch address in the conditional branch instruction?
Specifying a register that would always be added to the branch address.
What does an underscore in the notation mean?
The field is used elsewhere.
What must the loader and linker be careful of when placing a program?
They must be careful to avoid placing a program across an address boundary of 256 MB (64 million instructions); otherwise, a jump must be replaced by a jump register instruction preceded by other instructions to load the full 32-bit address into a register.
Why were 64-bit address extensions added to microprocessors?
To accommodate larger programs
What is the purpose of the addi instruction?
To add a 16-bit immediate value to a register.
What is the purpose of the figure showing MIPS encoding?
To aid in translating between assembly language and machine language
What is the purpose of the upper 16 bits set by the lui instruction?
To allow a subsequent instruction to specify the lower 16 bits of the constant.
What is the purpose of the bne instruction?
To branch to a specified address if two registers are not equal.
What is the role of the assembler in handling large constants?
To break them into pieces and reassemble them into a register.
What is the need for the assembler to have a temporary register?
To create long values when breaking large constants into pieces.
What is the purpose of the assembler temporary register ($at)?
To create long values when breaking large constants into pieces.
What is the purpose of instruction set extension?
To expand architecture to move software compatibly upward to next generation
What is the purpose of the notation used in the figure?
To give the value of a field by row and column.
What is the role of the assembler in the symbolic representation of the MIPS machine language?
To handle the creation of long values and breaking large constants into pieces.
What is the purpose of addressing modes?
To identify operands for instructions
What is the purpose of the j instruction?
To jump to a specified address.
What is the purpose of the lui instruction?
To load a 16-bit immediate value into the upper 16 bits of a register.
What is the purpose of the ori instruction?
To perform a logical OR operation between a register and a 16-bit immediate value.
What is the purpose of incrementing the PC early?
To point to the next instruction
What is the purpose of load upper immediate (lui) instruction?
To set the upper 16 bits of a constant in a register.
What does the MIPS encoding figure help with?
Translating by hand between assembly language and machine language
When are 32-bit immediate operands used in MIPS?
When constants are bigger than 16 bits.
Do most microprocessors have 64-bit address extensions?
Yes