Computer Architecture

_________ states that integrated circuit resources double every 18-24 months

Moore's Law

Describe MISD in Flynn's Taxonomy

Multiple instructions applied to one set of data. There is no commercial implementation

What are the conventions for register names in assembly

$t0 - $t9 are temporary values $s0 - $s7 are for saved variables

What are the ASCII codes for 0-9

0x30 - 0x39

What is the code for A

0x41

What is the code for a

0x61

If a clock frequency is 100 GHz what is the clock period

1 GHz = 1 cycle per nano second 1*10^(-9) Therefore 100 GHz = 100 cycles per nano second = 1 cycles per 1x10^(-11)seconds => 10ps

1 Mhz is related to what cycle time

1 micro second

1 KHz is related to what cycle time

1 millisecond

1 Ghz is related to what cycle time

1 ns

How long are MIPS instructions

1 word (32 bits)

How big are registers in MIPS

1 word/ 32 bits

Describe SIMD in Flynn's Taxonomy

One instruction is applied to multiple data. This is in Vector architectures, Multimedia extensions and Graphics processor units

What are the parts of an R-Type MIPS instruction

Op Code,rd,rs,rt,shamt,Funct

Where do pipelined processors fit in Flynn's Taxonomy

Pipelined processors do not fit directly into any of the Flynn's classifications

The Von Newmann architecture is also know as the ____ Architecture

Princeton

What are the types of MIPS instructions

R - Type, I - Type, Branches/ Jumps

What does simplicity favor regularity mean

Regularity makes implementation simpler and enables higher performance at lower cost

__________ is the total time required for a computer to complete a task, including disk accesses, memory accesses, I/O activities, operating system overhead, and CPU ececution time

Response time

Clock Cycles / Instruction (clock cycles per instruction) is impacted by

The compiler

Instructions Count / Program (instructions per program) is the responsibility of

The compiler software designer, the high-level software designer

Increasing the number of transitions from 1-0 or 0-1 increased what?

The energy consumed

What are the dimensions in Flynn's Taxonomy

The instructions and the Data

What does increasing the clock rate increase?

The power deployed

What is the difference between Parallel processing and instruction level paralleism

The programmer must explicitly be aware and write programs to take advantage of multiple processors in parallel processing In parallel the programmer does not have to be aware of instruction level parallelism is just increases throughput reguardless

What is an Instruction Set

The repertoire of instructions of a computer.

Describe MIMD in Flynn's Taxonomy

This is in Multi core Processors there are two types Tighetly-coupled MIMD and Loosely-coupled MIMD

Where do arithmetic and logical operations occurs

only on registers

How would you store an item $t0 in the 8th element of an array of words that starts at $s0

sw $t0, 32($s0)

___________ is the total amount of work done in a given time.

throughput

Describe SISD in Flynn's Taxonomy

unicycle non-pipelined CPU. CPU has a set of data, it applies one instruction and gets one result.

The ____ bus is a set of parallel wires. This bus is unidirectional from (CPU => Memory/IO system). It allows the CPU to specify where to read or write data or instructions

Address

Whate the the communication lines between the CPU, Main memory and the Input/Output system

An address bus, a data bus, and a control bus

What is the formula for CPU time as related to clock cycles and clock frequency

CPU time = # of cycles / frequency

What is the formula for CPU time as related to clock cycles and clock period

CPU time = # of cycles X clock period

What are the metrics to evaluate the performance of a computer system

Cost, Speed, and Energy/Power

The ____ bus is a set of parallel wires. This bus is bidirectional (CPU <==> Memory/IO system)

Data

What are the classes of parallelism in applications

Data-Level Parallelism (DLP) and Task-Level Parallelism (TLP)

What is load balancing

Ensuring that work is distributed as fairly as possible between processors

Making the __________ case fast will tend to enhance performance more than the most complex case

common

What does the data bus carry from the CPU to the Memory/IO system

data

How would you load an item into $t0 from the 8th element of an array of words that starts at $s0

lw $t0, 32($s0)

How many Pico seconds (ps) are in a nano second (ns)

1000

Picoseconds are how many seconds

10^(-12)

Nanoseconds are how many seconds

10^(-9)

What is the highest ASCII code

127

How many Bytes are in a KB

2^10

How many Bytes are in a MB

2^20

How many Bytes are in a GB

2^30

How many registers are in MIPS

32

How many address are needed to store a word in MIPS

4, MIPS words are 32 bits => 4 bytes and each byte has a unique address

How long is the Shamt field in an R-Type instruction

5 bits

how long are the (rs,rd,rt) fields in an R-Type instruction

5 bits

How long is the Funct field in an R-Type instruction

6 bits

How long is the op field in an R-Type instruction

6 bits

What does the Von Newmann architecture consist of

A CPU, Fast Storage (main memory), slow external mass storage, and input-output mechanisms

What is Flynn's Taxonomy

A classification of different computer systems

What does a CPU consist of

A program counter, an instruction register, and ALU, various registers, and communication lines with the main memory

The input to a compiler is a program written is a _________ language

High Level

What are I - Type instructions

Immediate type instructions (mnemonic , value)

Name the types of Architectural Parallelism important in this class

Instruction-Level Parallelism and Vector architecture/GPUS (DLP)

What does the data bus carry from the Memory/IO system to the CPU

Instructions

What does the Instruction set Architecture impact

Instructions Count / Program (instructions per program), Clock Cycles / Instruction (clock cycles per instruction), Seconds / Clock Cycle (seconds per clock cycle)

What are R - Type instructions

Instructions that only involve instructions (mnemonic op1,op2,op3 where op 1 -3 are registers)

What are the Classifications in Flynn's Taxonomy

Single Instruction Single Data (SISD), Single Instruction Multiple Data (SIMD), Multiple Instruction Single Data (MISD), Multiple Instruction Multiple Data (MIMD)

Show how to add two variable g and h in registers $s0 and $s1 in and store the result in i $s2

add $s2,$s1,$s0

The input of an assembler is written in an ____________ language

assembler

A compiler produces a program in __________ language

assembly

The output of an assembler is a program in __________ language

binary (machine)

How do the vast majority of machines address memory

byte addressed, where each byte has a unique address

What are Branches/Jumps

changes the execution of a program